xref: /openbmc/linux/arch/arm64/include/asm/debug-monitors.h (revision 7ee31a3aa8f490c6507bc4294df6b70bed1c593e)
1caab277bSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
2478fcb2cSWill Deacon /*
3478fcb2cSWill Deacon  * Copyright (C) 2012 ARM Ltd.
4478fcb2cSWill Deacon  */
5478fcb2cSWill Deacon #ifndef __ASM_DEBUG_MONITORS_H
6478fcb2cSWill Deacon #define __ASM_DEBUG_MONITORS_H
7478fcb2cSWill Deacon 
8d7a33f4fSDave P Martin #include <linux/errno.h>
9d7a33f4fSDave P Martin #include <linux/types.h>
10f98deee9SArd Biesheuvel #include <asm/brk-imm.h>
1103923696SDave P Martin #include <asm/esr.h>
12951757aeSDave P Martin #include <asm/insn.h>
13d7a33f4fSDave P Martin #include <asm/ptrace.h>
14951757aeSDave P Martin 
1551ba2481SMarc Zyngier /* Low-level stepping controls. */
1651ba2481SMarc Zyngier #define DBG_MDSCR_SS		(1 << 0)
1751ba2481SMarc Zyngier #define DBG_SPSR_SS		(1 << 21)
1851ba2481SMarc Zyngier 
1951ba2481SMarc Zyngier /* MDSCR_EL1 enabling bits */
2051ba2481SMarc Zyngier #define DBG_MDSCR_KDE		(1 << 13)
2151ba2481SMarc Zyngier #define DBG_MDSCR_MDE		(1 << 15)
2251ba2481SMarc Zyngier #define DBG_MDSCR_MASK		~(DBG_MDSCR_KDE | DBG_MDSCR_MDE)
2351ba2481SMarc Zyngier 
24478fcb2cSWill Deacon #define	DBG_ESR_EVT(x)		(((x) >> 27) & 0x7)
25478fcb2cSWill Deacon 
26478fcb2cSWill Deacon /* AArch64 */
27478fcb2cSWill Deacon #define DBG_ESR_EVT_HWBP	0x0
28478fcb2cSWill Deacon #define DBG_ESR_EVT_HWSS	0x1
29478fcb2cSWill Deacon #define DBG_ESR_EVT_HWWP	0x2
30478fcb2cSWill Deacon #define DBG_ESR_EVT_BRK		0x6
31478fcb2cSWill Deacon 
32bcf5763bSVijaya Kumar K /*
33bcf5763bSVijaya Kumar K  * Break point instruction encoding
34bcf5763bSVijaya Kumar K  */
35951757aeSDave P Martin #define BREAK_INSTR_SIZE		AARCH64_INSN_SIZE
36bcf5763bSVijaya Kumar K 
37bcf5763bSVijaya Kumar K /*
38bcf5763bSVijaya Kumar K  * BRK instruction encoding
39bcf5763bSVijaya Kumar K  * The #imm16 value should be placed at bits[20:5] within BRK ins
40bcf5763bSVijaya Kumar K  */
41bcf5763bSVijaya Kumar K #define AARCH64_BREAK_MON	0xd4200000
42bcf5763bSVijaya Kumar K 
43bcf5763bSVijaya Kumar K /*
44a9ae04c9SMark Brown  * BRK instruction for provoking a fault on purpose
45a9ae04c9SMark Brown  * Unlike kgdb, #imm16 value with unallocated handler is used for faulting.
46a9ae04c9SMark Brown  */
47a9ae04c9SMark Brown #define AARCH64_BREAK_FAULT	(AARCH64_BREAK_MON | (FAULT_BRK_IMM << 5))
48a9ae04c9SMark Brown 
49c696b934SDave P Martin #define AARCH64_BREAK_KGDB_DYN_DBG	\
50c696b934SDave P Martin 	(AARCH64_BREAK_MON | (KGDB_DYN_DBG_BRK_IMM << 5))
51bcf5763bSVijaya Kumar K 
52bcf5763bSVijaya Kumar K #define CACHE_FLUSH_IS_SAFE		1
53bcf5763bSVijaya Kumar K 
542dd0e8d2SSandeepa Prabhu /* kprobes BRK opcodes with ESR encoding  */
55453b7740SWill Deacon #define BRK64_OPCODE_KPROBES	(AARCH64_BREAK_MON | (KPROBES_BRK_IMM << 5))
56*7ee31a3aSJean-Philippe Brucker #define BRK64_OPCODE_KPROBES_SS	(AARCH64_BREAK_MON | (KPROBES_BRK_SS_IMM << 5))
579842ceaeSPratyush Anand /* uprobes BRK opcodes with ESR encoding  */
58453b7740SWill Deacon #define BRK64_OPCODE_UPROBES	(AARCH64_BREAK_MON | (UPROBES_BRK_IMM << 5))
592dd0e8d2SSandeepa Prabhu 
60478fcb2cSWill Deacon /* AArch32 */
61478fcb2cSWill Deacon #define DBG_ESR_EVT_BKPT	0x4
62478fcb2cSWill Deacon #define DBG_ESR_EVT_VECC	0x5
63478fcb2cSWill Deacon 
64478fcb2cSWill Deacon #define AARCH32_BREAK_ARM	0x07f001f0
65478fcb2cSWill Deacon #define AARCH32_BREAK_THUMB	0xde01
66478fcb2cSWill Deacon #define AARCH32_BREAK_THUMB2_LO	0xf7f0
67478fcb2cSWill Deacon #define AARCH32_BREAK_THUMB2_HI	0xa000
68478fcb2cSWill Deacon 
69478fcb2cSWill Deacon #ifndef __ASSEMBLY__
70478fcb2cSWill Deacon struct task_struct;
71478fcb2cSWill Deacon 
72478fcb2cSWill Deacon #define DBG_ARCH_ID_RESERVED	0	/* In case of ptrace ABI updates. */
73478fcb2cSWill Deacon 
74ee6214ceSSandeepa Prabhu #define DBG_HOOK_HANDLED	0
75ee6214ceSSandeepa Prabhu #define DBG_HOOK_ERROR		1
76ee6214ceSSandeepa Prabhu 
77ee6214ceSSandeepa Prabhu struct step_hook {
78ee6214ceSSandeepa Prabhu 	struct list_head node;
79ee6214ceSSandeepa Prabhu 	int (*fn)(struct pt_regs *regs, unsigned int esr);
80ee6214ceSSandeepa Prabhu };
81ee6214ceSSandeepa Prabhu 
8226a04d84SWill Deacon void register_user_step_hook(struct step_hook *hook);
8326a04d84SWill Deacon void unregister_user_step_hook(struct step_hook *hook);
8426a04d84SWill Deacon 
8526a04d84SWill Deacon void register_kernel_step_hook(struct step_hook *hook);
8626a04d84SWill Deacon void unregister_kernel_step_hook(struct step_hook *hook);
87ee6214ceSSandeepa Prabhu 
88ee6214ceSSandeepa Prabhu struct break_hook {
89ee6214ceSSandeepa Prabhu 	struct list_head node;
90ee6214ceSSandeepa Prabhu 	int (*fn)(struct pt_regs *regs, unsigned int esr);
9126a04d84SWill Deacon 	u16 imm;
9226a04d84SWill Deacon 	u16 mask; /* These bits are ignored when comparing with imm */
93ee6214ceSSandeepa Prabhu };
94ee6214ceSSandeepa Prabhu 
9526a04d84SWill Deacon void register_user_break_hook(struct break_hook *hook);
9626a04d84SWill Deacon void unregister_user_break_hook(struct break_hook *hook);
9726a04d84SWill Deacon 
9826a04d84SWill Deacon void register_kernel_break_hook(struct break_hook *hook);
9926a04d84SWill Deacon void unregister_kernel_break_hook(struct break_hook *hook);
100ee6214ceSSandeepa Prabhu 
101478fcb2cSWill Deacon u8 debug_monitors_arch(void);
102478fcb2cSWill Deacon 
1036f883d10SWill Deacon enum dbg_active_el {
10451ba2481SMarc Zyngier 	DBG_ACTIVE_EL0 = 0,
10551ba2481SMarc Zyngier 	DBG_ACTIVE_EL1,
10651ba2481SMarc Zyngier };
10751ba2481SMarc Zyngier 
1086f883d10SWill Deacon void enable_debug_monitors(enum dbg_active_el el);
1096f883d10SWill Deacon void disable_debug_monitors(enum dbg_active_el el);
110478fcb2cSWill Deacon 
111478fcb2cSWill Deacon void user_rewind_single_step(struct task_struct *task);
112478fcb2cSWill Deacon void user_fastforward_single_step(struct task_struct *task);
1133a5a4366SWill Deacon void user_regs_reset_single_step(struct user_pt_regs *regs,
1143a5a4366SWill Deacon 				 struct task_struct *task);
115478fcb2cSWill Deacon 
116478fcb2cSWill Deacon void kernel_enable_single_step(struct pt_regs *regs);
117478fcb2cSWill Deacon void kernel_disable_single_step(void);
118478fcb2cSWill Deacon int kernel_active_single_step(void);
119478fcb2cSWill Deacon 
120478fcb2cSWill Deacon #ifdef CONFIG_HAVE_HW_BREAKPOINT
121478fcb2cSWill Deacon int reinstall_suspended_bps(struct pt_regs *regs);
122478fcb2cSWill Deacon #else
123478fcb2cSWill Deacon static inline int reinstall_suspended_bps(struct pt_regs *regs)
124478fcb2cSWill Deacon {
125478fcb2cSWill Deacon 	return -ENODEV;
126478fcb2cSWill Deacon }
127478fcb2cSWill Deacon #endif
128478fcb2cSWill Deacon 
1291442b6edSWill Deacon int aarch32_break_handler(struct pt_regs *regs);
1301442b6edSWill Deacon 
131b322c65fSDouglas Anderson void debug_traps_init(void);
132b322c65fSDouglas Anderson 
133478fcb2cSWill Deacon #endif	/* __ASSEMBLY */
134478fcb2cSWill Deacon #endif	/* __ASM_DEBUG_MONITORS_H */
135