xref: /openbmc/linux/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi (revision bbabba4ece74c51b98e7c8dbd8fa4725d0ae9baf)

// SPDX-License-Identifier: GPL-2.0
/*
 * SoM: https://www.ti.com/lit/zip/sprr439
 *
 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
 */

/dts-v1/;

#include "k3-j721s2.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	memory@80000000 {
		device_type = "memory";
		/* 16 GB RAM */
		reg = <0x00 0x80000000 0x00 0x80000000>,
		      <0x08 0x80000000 0x03 0x80000000>;
	};

	/* Reserving memory regions still pending */
	reserved_memory: reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		secure_ddr: optee@9e800000 {
			reg = <0x00 0x9e800000 0x00 0x01800000>;
			alignment = <0x1000>;
			no-map;
		};
	};

	transceiver0: can-phy0 {
		/* standby pin has been grounded by default */
		compatible = "ti,tcan1042";
		#phy-cells = <0>;
		max-bitrate = <5000000>;
	};
};

&wkup_pmx0 {
	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
		pinctrl-single,pins = <
			J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (D19) MCU_OSPI0_CLK */
			J721S2_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F15) MCU_OSPI0_CSn0 */
			J721S2_WKUP_IOPAD(0x030, PIN_OUTPUT, 0) /* (G17) MCU_OSPI0_CSn1 */
			J721S2_WKUP_IOPAD(0x038, PIN_OUTPUT, 0) /* (F14) MCU_OSPI0_CSn2 */
			J721S2_WKUP_IOPAD(0x03c, PIN_OUTPUT, 0) /* (F17) MCU_OSPI0_CSn3 */
			J721S2_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (C19) MCU_OSPI0_D0 */
			J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F16) MCU_OSPI0_D1 */
			J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (G15) MCU_OSPI0_D2 */
			J721S2_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (F18) MCU_OSPI0_D3 */
			J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (E19) MCU_OSPI0_D4 */
			J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (G19) MCU_OSPI0_D5 */
			J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (F19) MCU_OSPI0_D6 */
			J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (F20) MCU_OSPI0_D7 */
			J721S2_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (E18) MCU_OSPI0_DQS */
			J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E20) MCU_OSPI0_LBCLKO */
		>;
	};
};

&main_pmx0 {
	main_i2c0_pins_default: main-i2c0-pins-default {
		pinctrl-single,pins = <
			J721S2_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AH25) I2C0_SCL */
			J721S2_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AE24) I2C0_SDA */
		>;
	};

	main_mcan16_pins_default: main-mcan16-pins-default {
		pinctrl-single,pins = <
			J721S2_IOPAD(0x028, PIN_INPUT, 0) /* (AB24) MCAN16_RX */
			J721S2_IOPAD(0x024, PIN_OUTPUT, 0) /* (Y28) MCAN16_TX */
		>;
	};
};

&main_i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c0_pins_default>;
	clock-frequency = <400000>;

	exp_som: gpio@21 {
		compatible = "ti,tca6408";
		reg = <0x21>;
		gpio-controller;
		#gpio-cells = <2>;
		gpio-line-names = "USB2.0_MUX_SEL", "CANUART_MUX1_SEL0",
				  "CANUART_MUX2_SEL0", "CANUART_MUX_SEL1",
				  "GPIO_RGMII1_RST", "GPIO_eDP_ENABLE",
				   "GPIO_LIN_EN", "CAN_STB";
	};
};

&main_mcan16 {
	status = "okay";
	pinctrl-0 = <&main_mcan16_pins_default>;
	pinctrl-names = "default";
	phys = <&transceiver0>;
};

&ospi0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0x0>;
		spi-tx-bus-width = <8>;
		spi-rx-bus-width = <8>;
		spi-max-frequency = <25000000>;
		cdns,tshsl-ns = <60>;
		cdns,tsd2d-ns = <60>;
		cdns,tchsh-ns = <60>;
		cdns,tslch-ns = <60>;
		cdns,read-delay = <4>;
	};
};