1d0a064beSNishanth Menon// SPDX-License-Identifier: GPL-2.0 2d0a064beSNishanth Menon/* 3d0a064beSNishanth Menon * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ 4d0a064beSNishanth Menon */ 5d0a064beSNishanth Menon 6d0a064beSNishanth Menon/dts-v1/; 7d0a064beSNishanth Menon 8d0a064beSNishanth Menon#include "k3-am654.dtsi" 9d0a064beSNishanth Menon 10d0a064beSNishanth Menon/ { 11d0a064beSNishanth Menon compatible = "ti,am654-evm", "ti,am654"; 12d0a064beSNishanth Menon model = "Texas Instruments AM654 Base Board"; 13d0a064beSNishanth Menon 14d0a064beSNishanth Menon chosen { 15d0a064beSNishanth Menon stdout-path = "serial2:115200n8"; 16d0a064beSNishanth Menon bootargs = "earlycon=ns16550a,mmio32,0x02800000"; 17d0a064beSNishanth Menon }; 18d0a064beSNishanth Menon 19d0a064beSNishanth Menon memory@80000000 { 20d0a064beSNishanth Menon device_type = "memory"; 21d0a064beSNishanth Menon /* 4G RAM */ 22d0a064beSNishanth Menon reg = <0x00000000 0x80000000 0x00000000 0x80000000>, 23d0a064beSNishanth Menon <0x00000008 0x80000000 0x00000000 0x80000000>; 24d0a064beSNishanth Menon }; 25d0a064beSNishanth Menon 26d0a064beSNishanth Menon reserved-memory { 27d0a064beSNishanth Menon #address-cells = <2>; 28d0a064beSNishanth Menon #size-cells = <2>; 29d0a064beSNishanth Menon ranges; 30d0a064beSNishanth Menon secure_ddr: secure_ddr@9e800000 { 31d0a064beSNishanth Menon reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */ 32d0a064beSNishanth Menon alignment = <0x1000>; 33d0a064beSNishanth Menon no-map; 34d0a064beSNishanth Menon }; 35d0a064beSNishanth Menon }; 36d0a064beSNishanth Menon}; 374201af25SNishanth Menon 3819a1768fSVignesh R&wkup_pmx0 { 3919a1768fSVignesh R wkup_i2c0_pins_default: wkup-i2c0-pins-default { 4019a1768fSVignesh R pinctrl-single,pins = < 4119a1768fSVignesh R AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */ 4219a1768fSVignesh R AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ 4319a1768fSVignesh R >; 4419a1768fSVignesh R }; 4519a1768fSVignesh R}; 4619a1768fSVignesh R 473f94859fSVignesh R&main_pmx0 { 483f94859fSVignesh R main_uart0_pins_default: main-uart0-pins-default { 493f94859fSVignesh R pinctrl-single,pins = < 503f94859fSVignesh R AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */ 513f94859fSVignesh R AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */ 523f94859fSVignesh R AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */ 533f94859fSVignesh R AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ 543f94859fSVignesh R >; 553f94859fSVignesh R }; 5619a1768fSVignesh R 5719a1768fSVignesh R main_i2c2_pins_default: main-i2c2-pins-default { 5819a1768fSVignesh R pinctrl-single,pins = < 5919a1768fSVignesh R AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */ 6019a1768fSVignesh R AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */ 6119a1768fSVignesh R >; 6219a1768fSVignesh R }; 6319a1768fSVignesh R}; 6419a1768fSVignesh R 6519a1768fSVignesh R&main_pmx1 { 6619a1768fSVignesh R main_i2c0_pins_default: main-i2c0-pins-default { 6719a1768fSVignesh R pinctrl-single,pins = < 6819a1768fSVignesh R AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */ 6919a1768fSVignesh R AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */ 7019a1768fSVignesh R >; 7119a1768fSVignesh R }; 7219a1768fSVignesh R 7319a1768fSVignesh R main_i2c1_pins_default: main-i2c1-pins-default { 7419a1768fSVignesh R pinctrl-single,pins = < 7519a1768fSVignesh R AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */ 7619a1768fSVignesh R AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */ 7719a1768fSVignesh R >; 7819a1768fSVignesh R }; 79*e577d794SVignesh R 80*e577d794SVignesh R ecap0_pins_default: ecap0-pins-default { 81*e577d794SVignesh R pinctrl-single,pins = < 82*e577d794SVignesh R AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */ 83*e577d794SVignesh R >; 84*e577d794SVignesh R }; 853f94859fSVignesh R}; 863f94859fSVignesh R 874201af25SNishanth Menon&wkup_uart0 { 884201af25SNishanth Menon /* Wakeup UART is used by System firmware */ 894201af25SNishanth Menon status = "disabled"; 904201af25SNishanth Menon}; 913f94859fSVignesh R 923f94859fSVignesh R&main_uart0 { 933f94859fSVignesh R pinctrl-names = "default"; 943f94859fSVignesh R pinctrl-0 = <&main_uart0_pins_default>; 953f94859fSVignesh R}; 9619a1768fSVignesh R 9719a1768fSVignesh R&wkup_i2c0 { 9819a1768fSVignesh R pinctrl-names = "default"; 9919a1768fSVignesh R pinctrl-0 = <&wkup_i2c0_pins_default>; 10019a1768fSVignesh R clock-frequency = <400000>; 10119a1768fSVignesh R 10219a1768fSVignesh R pca9554: gpio@39 { 10319a1768fSVignesh R compatible = "nxp,pca9554"; 10419a1768fSVignesh R reg = <0x39>; 10519a1768fSVignesh R gpio-controller; 10619a1768fSVignesh R #gpio-cells = <2>; 10719a1768fSVignesh R }; 10819a1768fSVignesh R}; 10919a1768fSVignesh R 11019a1768fSVignesh R&main_i2c0 { 11119a1768fSVignesh R pinctrl-names = "default"; 11219a1768fSVignesh R pinctrl-0 = <&main_i2c0_pins_default>; 11319a1768fSVignesh R clock-frequency = <400000>; 11419a1768fSVignesh R 11519a1768fSVignesh R pca9555: gpio@21 { 11619a1768fSVignesh R compatible = "nxp,pca9555"; 11719a1768fSVignesh R reg = <0x21>; 11819a1768fSVignesh R gpio-controller; 11919a1768fSVignesh R #gpio-cells = <2>; 12019a1768fSVignesh R }; 12119a1768fSVignesh R}; 12219a1768fSVignesh R 12319a1768fSVignesh R&main_i2c1 { 12419a1768fSVignesh R pinctrl-names = "default"; 12519a1768fSVignesh R pinctrl-0 = <&main_i2c1_pins_default>; 12619a1768fSVignesh R clock-frequency = <400000>; 12719a1768fSVignesh R}; 12819a1768fSVignesh R 12919a1768fSVignesh R&main_i2c2 { 13019a1768fSVignesh R pinctrl-names = "default"; 13119a1768fSVignesh R pinctrl-0 = <&main_i2c2_pins_default>; 13219a1768fSVignesh R clock-frequency = <400000>; 13319a1768fSVignesh R}; 134*e577d794SVignesh R 135*e577d794SVignesh R&ecap0 { 136*e577d794SVignesh R pinctrl-names = "default"; 137*e577d794SVignesh R pinctrl-0 = <&ecap0_pins_default>; 138*e577d794SVignesh R}; 139