1d0a064beSNishanth Menon// SPDX-License-Identifier: GPL-2.0 2d0a064beSNishanth Menon/* 310332cd6SSuman Anna * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/ 4d0a064beSNishanth Menon */ 5d0a064beSNishanth Menon 6d0a064beSNishanth Menon/dts-v1/; 7d0a064beSNishanth Menon 8d0a064beSNishanth Menon#include "k3-am654.dtsi" 9c67f7388SKeerthy#include <dt-bindings/input/input.h> 109ba5a8a5SGrygorii Strashko#include <dt-bindings/net/ti-dp83867.h> 11d0a064beSNishanth Menon 12d0a064beSNishanth Menon/ { 13d0a064beSNishanth Menon compatible = "ti,am654-evm", "ti,am654"; 14d0a064beSNishanth Menon model = "Texas Instruments AM654 Base Board"; 15d0a064beSNishanth Menon 16d0a064beSNishanth Menon chosen { 17d0a064beSNishanth Menon stdout-path = "serial2:115200n8"; 18d0a064beSNishanth Menon bootargs = "earlycon=ns16550a,mmio32,0x02800000"; 19d0a064beSNishanth Menon }; 20d0a064beSNishanth Menon 21d0a064beSNishanth Menon memory@80000000 { 22d0a064beSNishanth Menon device_type = "memory"; 23d0a064beSNishanth Menon /* 4G RAM */ 24d0a064beSNishanth Menon reg = <0x00000000 0x80000000 0x00000000 0x80000000>, 25d0a064beSNishanth Menon <0x00000008 0x80000000 0x00000000 0x80000000>; 26d0a064beSNishanth Menon }; 27d0a064beSNishanth Menon 28d0a064beSNishanth Menon reserved-memory { 29d0a064beSNishanth Menon #address-cells = <2>; 30d0a064beSNishanth Menon #size-cells = <2>; 31d0a064beSNishanth Menon ranges; 32954ec513SSuman Anna 33e5c956c4SNishanth Menon secure_ddr: secure-ddr@9e800000 { 34d0a064beSNishanth Menon reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */ 35d0a064beSNishanth Menon alignment = <0x1000>; 36d0a064beSNishanth Menon no-map; 37d0a064beSNishanth Menon }; 38954ec513SSuman Anna 39954ec513SSuman Anna mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { 40954ec513SSuman Anna compatible = "shared-dma-pool"; 41954ec513SSuman Anna reg = <0 0xa0000000 0 0x100000>; 42954ec513SSuman Anna no-map; 43954ec513SSuman Anna }; 44954ec513SSuman Anna 45954ec513SSuman Anna mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 { 46954ec513SSuman Anna compatible = "shared-dma-pool"; 47954ec513SSuman Anna reg = <0 0xa0100000 0 0xf00000>; 48954ec513SSuman Anna no-map; 49954ec513SSuman Anna }; 50954ec513SSuman Anna 51954ec513SSuman Anna mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { 52954ec513SSuman Anna compatible = "shared-dma-pool"; 53954ec513SSuman Anna reg = <0 0xa1000000 0 0x100000>; 54954ec513SSuman Anna no-map; 55954ec513SSuman Anna }; 56954ec513SSuman Anna 57954ec513SSuman Anna mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 { 58954ec513SSuman Anna compatible = "shared-dma-pool"; 59954ec513SSuman Anna reg = <0 0xa1100000 0 0xf00000>; 60954ec513SSuman Anna no-map; 61954ec513SSuman Anna }; 62f82c5e0aSSuman Anna 63f82c5e0aSSuman Anna rtos_ipc_memory_region: ipc-memories@a2000000 { 64f82c5e0aSSuman Anna reg = <0x00 0xa2000000 0x00 0x00100000>; 65f82c5e0aSSuman Anna alignment = <0x1000>; 66f82c5e0aSSuman Anna no-map; 67f82c5e0aSSuman Anna }; 68d0a064beSNishanth Menon }; 69c67f7388SKeerthy 70c67f7388SKeerthy gpio-keys { 71c67f7388SKeerthy compatible = "gpio-keys"; 72c67f7388SKeerthy autorepeat; 73c67f7388SKeerthy pinctrl-names = "default"; 74c67f7388SKeerthy pinctrl-0 = <&push_button_pins_default>; 75c67f7388SKeerthy 76c67f7388SKeerthy sw5 { 77c67f7388SKeerthy label = "GPIO Key USER1"; 78c67f7388SKeerthy linux,code = <BTN_0>; 79c67f7388SKeerthy gpios = <&wkup_gpio0 24 GPIO_ACTIVE_LOW>; 80c67f7388SKeerthy }; 81c67f7388SKeerthy 82c67f7388SKeerthy sw6 { 83c67f7388SKeerthy label = "GPIO Key USER2"; 84c67f7388SKeerthy linux,code = <BTN_1>; 85c67f7388SKeerthy gpios = <&wkup_gpio0 27 GPIO_ACTIVE_LOW>; 86c67f7388SKeerthy }; 87c67f7388SKeerthy }; 88d0a064beSNishanth Menon}; 894201af25SNishanth Menon 9019a1768fSVignesh R&wkup_pmx0 { 9119a1768fSVignesh R wkup_i2c0_pins_default: wkup-i2c0-pins-default { 9219a1768fSVignesh R pinctrl-single,pins = < 9319a1768fSVignesh R AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */ 9419a1768fSVignesh R AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ 9519a1768fSVignesh R >; 9619a1768fSVignesh R }; 97c67f7388SKeerthy 98e5c956c4SNishanth Menon push_button_pins_default: push-button-pins-default { 99c67f7388SKeerthy pinctrl-single,pins = < 100c67f7388SKeerthy AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */ 101c67f7388SKeerthy AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */ 102c67f7388SKeerthy >; 103c67f7388SKeerthy }; 10407481770SVignesh Raghavendra 105e5c956c4SNishanth Menon mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default { 10607481770SVignesh Raghavendra pinctrl-single,pins = < 10707481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */ 10807481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */ 10907481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */ 11007481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */ 11107481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2) MCU_OSPI0_D2 */ 11207481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */ 11307481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4) MCU_OSPI0_D4 */ 11407481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5) MCU_OSPI0_D5 */ 11507481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */ 11607481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */ 11707481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */ 11807481770SVignesh Raghavendra >; 11907481770SVignesh Raghavendra }; 120ca3be22dSVignesh Raghavendra 121e5c956c4SNishanth Menon wkup_pca554_default: wkup-pca554-default { 122ca3be22dSVignesh Raghavendra pinctrl-single,pins = < 123ca3be22dSVignesh Raghavendra AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */ 1249ba5a8a5SGrygorii Strashko >; 1259ba5a8a5SGrygorii Strashko }; 126ca3be22dSVignesh Raghavendra 127e5c956c4SNishanth Menon mcu_cpsw_pins_default: mcu-cpsw-pins-default { 1289ba5a8a5SGrygorii Strashko pinctrl-single,pins = < 1299ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */ 1309ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5) MCU_RGMII1_RX_CTL */ 1319ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* (M2) MCU_RGMII1_TD3 */ 1329ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* (M3) MCU_RGMII1_TD2 */ 1339ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* (M4) MCU_RGMII1_TD1 */ 1349ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* (M5) MCU_RGMII1_TD0 */ 1359ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* (L2) MCU_RGMII1_RD3 */ 1369ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* (L5) MCU_RGMII1_RD2 */ 1379ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* (M6) MCU_RGMII1_RD1 */ 1389ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* (L6) MCU_RGMII1_RD0 */ 139*69db725cSGrygorii Strashko AM65X_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* (N1) MCU_RGMII1_TXC */ 1409ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* (M1) MCU_RGMII1_RXC */ 1419ba5a8a5SGrygorii Strashko >; 1429ba5a8a5SGrygorii Strashko }; 1439ba5a8a5SGrygorii Strashko 144e5c956c4SNishanth Menon mcu_mdio_pins_default: mcu-mdio1-pins-default { 1459ba5a8a5SGrygorii Strashko pinctrl-single,pins = < 1469ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */ 1479ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */ 148ca3be22dSVignesh Raghavendra >; 149ca3be22dSVignesh Raghavendra }; 15019a1768fSVignesh R}; 15119a1768fSVignesh R 1523f94859fSVignesh R&main_pmx0 { 1533f94859fSVignesh R main_uart0_pins_default: main-uart0-pins-default { 1543f94859fSVignesh R pinctrl-single,pins = < 1553f94859fSVignesh R AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */ 1563f94859fSVignesh R AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */ 1573f94859fSVignesh R AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */ 1583f94859fSVignesh R AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ 1593f94859fSVignesh R >; 1603f94859fSVignesh R }; 16119a1768fSVignesh R 16219a1768fSVignesh R main_i2c2_pins_default: main-i2c2-pins-default { 16319a1768fSVignesh R pinctrl-single,pins = < 16419a1768fSVignesh R AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */ 16519a1768fSVignesh R AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */ 16619a1768fSVignesh R >; 16719a1768fSVignesh R }; 1685da94b50SVignesh R 1695da94b50SVignesh R main_spi0_pins_default: main-spi0-pins-default { 1705da94b50SVignesh R pinctrl-single,pins = < 1715da94b50SVignesh R AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */ 1725da94b50SVignesh R AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */ 1735da94b50SVignesh R AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */ 1745da94b50SVignesh R AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */ 1755da94b50SVignesh R >; 1765da94b50SVignesh R }; 177fd58466aSFaiz Abbas 178fd58466aSFaiz Abbas main_mmc0_pins_default: main-mmc0-pins-default { 179fd58466aSFaiz Abbas pinctrl-single,pins = < 180fd58466aSFaiz Abbas AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */ 181fd58466aSFaiz Abbas AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */ 182fd58466aSFaiz Abbas AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */ 183fd58466aSFaiz Abbas AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */ 184fd58466aSFaiz Abbas AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */ 185fd58466aSFaiz Abbas AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */ 186fd58466aSFaiz Abbas AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */ 187fd58466aSFaiz Abbas AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */ 188fd58466aSFaiz Abbas AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */ 189fd58466aSFaiz Abbas AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */ 190fd58466aSFaiz Abbas AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */ 191fd58466aSFaiz Abbas AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */ 192fd58466aSFaiz Abbas >; 193fd58466aSFaiz Abbas }; 1947e7e7dd5SRoger Quadros 195e5c956c4SNishanth Menon main_mmc1_pins_default: main-mmc1-pins-default { 19613f74fc6SFaiz Abbas pinctrl-single,pins = < 19713f74fc6SFaiz Abbas AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */ 19813f74fc6SFaiz Abbas AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */ 19913f74fc6SFaiz Abbas AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */ 20013f74fc6SFaiz Abbas AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */ 20113f74fc6SFaiz Abbas AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */ 20213f74fc6SFaiz Abbas AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */ 20313f74fc6SFaiz Abbas AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */ 20413f74fc6SFaiz Abbas AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */ 20513f74fc6SFaiz Abbas >; 20613f74fc6SFaiz Abbas }; 20713f74fc6SFaiz Abbas 208e5c956c4SNishanth Menon usb1_pins_default: usb1-pins-default { 2097e7e7dd5SRoger Quadros pinctrl-single,pins = < 2107e7e7dd5SRoger Quadros AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */ 2117e7e7dd5SRoger Quadros >; 2127e7e7dd5SRoger Quadros }; 21319a1768fSVignesh R}; 21419a1768fSVignesh R 21519a1768fSVignesh R&main_pmx1 { 21619a1768fSVignesh R main_i2c0_pins_default: main-i2c0-pins-default { 21719a1768fSVignesh R pinctrl-single,pins = < 21819a1768fSVignesh R AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */ 21919a1768fSVignesh R AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */ 22019a1768fSVignesh R >; 22119a1768fSVignesh R }; 22219a1768fSVignesh R 22319a1768fSVignesh R main_i2c1_pins_default: main-i2c1-pins-default { 22419a1768fSVignesh R pinctrl-single,pins = < 22519a1768fSVignesh R AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */ 22619a1768fSVignesh R AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */ 22719a1768fSVignesh R >; 22819a1768fSVignesh R }; 229e577d794SVignesh R 230e577d794SVignesh R ecap0_pins_default: ecap0-pins-default { 231e577d794SVignesh R pinctrl-single,pins = < 232e577d794SVignesh R AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */ 233e577d794SVignesh R >; 234e577d794SVignesh R }; 2353f94859fSVignesh R}; 2363f94859fSVignesh R 2374201af25SNishanth Menon&wkup_uart0 { 2384201af25SNishanth Menon /* Wakeup UART is used by System firmware */ 2394cc34aa8SNishanth Menon status = "reserved"; 2404201af25SNishanth Menon}; 2413f94859fSVignesh R 2423f94859fSVignesh R&main_uart0 { 2433f94859fSVignesh R pinctrl-names = "default"; 2443f94859fSVignesh R pinctrl-0 = <&main_uart0_pins_default>; 245c68272cbSLokesh Vutla power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>; 2463f94859fSVignesh R}; 24719a1768fSVignesh R 24819a1768fSVignesh R&wkup_i2c0 { 24919a1768fSVignesh R pinctrl-names = "default"; 25019a1768fSVignesh R pinctrl-0 = <&wkup_i2c0_pins_default>; 25119a1768fSVignesh R clock-frequency = <400000>; 25219a1768fSVignesh R 25319a1768fSVignesh R pca9554: gpio@39 { 25419a1768fSVignesh R compatible = "nxp,pca9554"; 25519a1768fSVignesh R reg = <0x39>; 25619a1768fSVignesh R gpio-controller; 25719a1768fSVignesh R #gpio-cells = <2>; 258ca3be22dSVignesh Raghavendra pinctrl-names = "default"; 259ca3be22dSVignesh Raghavendra pinctrl-0 = <&wkup_pca554_default>; 260ca3be22dSVignesh Raghavendra interrupt-parent = <&wkup_gpio0>; 261ca3be22dSVignesh Raghavendra interrupts = <25 IRQ_TYPE_EDGE_FALLING>; 262ca3be22dSVignesh Raghavendra interrupt-controller; 263ca3be22dSVignesh Raghavendra #interrupt-cells = <2>; 26419a1768fSVignesh R }; 26519a1768fSVignesh R}; 26619a1768fSVignesh R 26719a1768fSVignesh R&main_i2c0 { 26819a1768fSVignesh R pinctrl-names = "default"; 26919a1768fSVignesh R pinctrl-0 = <&main_i2c0_pins_default>; 27019a1768fSVignesh R clock-frequency = <400000>; 27119a1768fSVignesh R 27219a1768fSVignesh R pca9555: gpio@21 { 27319a1768fSVignesh R compatible = "nxp,pca9555"; 27419a1768fSVignesh R reg = <0x21>; 27519a1768fSVignesh R gpio-controller; 27619a1768fSVignesh R #gpio-cells = <2>; 27719a1768fSVignesh R }; 27819a1768fSVignesh R}; 27919a1768fSVignesh R 28019a1768fSVignesh R&main_i2c1 { 28119a1768fSVignesh R pinctrl-names = "default"; 28219a1768fSVignesh R pinctrl-0 = <&main_i2c1_pins_default>; 28319a1768fSVignesh R clock-frequency = <400000>; 28419a1768fSVignesh R}; 28519a1768fSVignesh R 28619a1768fSVignesh R&main_i2c2 { 28719a1768fSVignesh R pinctrl-names = "default"; 28819a1768fSVignesh R pinctrl-0 = <&main_i2c2_pins_default>; 28919a1768fSVignesh R clock-frequency = <400000>; 29019a1768fSVignesh R}; 291e577d794SVignesh R 292e577d794SVignesh R&ecap0 { 293e577d794SVignesh R pinctrl-names = "default"; 294e577d794SVignesh R pinctrl-0 = <&ecap0_pins_default>; 295e577d794SVignesh R}; 2965da94b50SVignesh R 2975da94b50SVignesh R&main_spi0 { 2985da94b50SVignesh R pinctrl-names = "default"; 2995da94b50SVignesh R pinctrl-0 = <&main_spi0_pins_default>; 3005da94b50SVignesh R #address-cells = <1>; 3015da94b50SVignesh R #size-cells= <0>; 3025da94b50SVignesh R ti,pindir-d0-out-d1-in = <1>; 3035da94b50SVignesh R 3045da94b50SVignesh R flash@0{ 3055da94b50SVignesh R compatible = "jedec,spi-nor"; 3065da94b50SVignesh R reg = <0x0>; 3075da94b50SVignesh R spi-tx-bus-width = <1>; 3085da94b50SVignesh R spi-rx-bus-width = <1>; 3095da94b50SVignesh R spi-max-frequency = <48000000>; 3105da94b50SVignesh R #address-cells = <1>; 3115da94b50SVignesh R #size-cells= <1>; 3125da94b50SVignesh R }; 3135da94b50SVignesh R}; 314fd58466aSFaiz Abbas 315fd58466aSFaiz Abbas&sdhci0 { 316fd58466aSFaiz Abbas pinctrl-names = "default"; 317fd58466aSFaiz Abbas pinctrl-0 = <&main_mmc0_pins_default>; 318fd58466aSFaiz Abbas bus-width = <8>; 319fd58466aSFaiz Abbas non-removable; 320fd58466aSFaiz Abbas ti,driver-strength-ohm = <50>; 321337c4a88SFaiz Abbas disable-wp; 322fd58466aSFaiz Abbas}; 3237e7e7dd5SRoger Quadros 32413f74fc6SFaiz Abbas/* 32513f74fc6SFaiz Abbas * Because of erratas i2025 and i2026 for silicon revision 1.0, the 32613f74fc6SFaiz Abbas * SD card interface might fail. Boards with sr1.0 are recommended to 32713f74fc6SFaiz Abbas * disable sdhci1 32813f74fc6SFaiz Abbas */ 32913f74fc6SFaiz Abbas&sdhci1 { 33013f74fc6SFaiz Abbas pinctrl-names = "default"; 33113f74fc6SFaiz Abbas pinctrl-0 = <&main_mmc1_pins_default>; 33213f74fc6SFaiz Abbas ti,driver-strength-ohm = <50>; 33313f74fc6SFaiz Abbas disable-wp; 33413f74fc6SFaiz Abbas}; 33513f74fc6SFaiz Abbas 3367e7e7dd5SRoger Quadros&usb1 { 3377e7e7dd5SRoger Quadros pinctrl-names = "default"; 3387e7e7dd5SRoger Quadros pinctrl-0 = <&usb1_pins_default>; 3397e7e7dd5SRoger Quadros dr_mode = "otg"; 3407e7e7dd5SRoger Quadros}; 3417e7e7dd5SRoger Quadros 3427e7e7dd5SRoger Quadros&dwc3_0 { 3437e7e7dd5SRoger Quadros status = "disabled"; 3447e7e7dd5SRoger Quadros}; 3457e7e7dd5SRoger Quadros 3467e7e7dd5SRoger Quadros&usb0_phy { 3477e7e7dd5SRoger Quadros status = "disabled"; 3487e7e7dd5SRoger Quadros}; 349aa6eaaa2SVignesh R 350aa6eaaa2SVignesh R&tscadc0 { 351aa6eaaa2SVignesh R adc { 352aa6eaaa2SVignesh R ti,adc-channels = <0 1 2 3 4 5 6 7>; 353aa6eaaa2SVignesh R }; 354aa6eaaa2SVignesh R}; 355aa6eaaa2SVignesh R 356aa6eaaa2SVignesh R&tscadc1 { 357aa6eaaa2SVignesh R adc { 358aa6eaaa2SVignesh R ti,adc-channels = <0 1 2 3 4 5 6 7>; 359aa6eaaa2SVignesh R }; 360aa6eaaa2SVignesh R}; 3611b89dc93SKishon Vijay Abraham I 3621b89dc93SKishon Vijay Abraham I&serdes0 { 3631b89dc93SKishon Vijay Abraham I status = "disabled"; 3641b89dc93SKishon Vijay Abraham I}; 3651b89dc93SKishon Vijay Abraham I 3661b89dc93SKishon Vijay Abraham I&serdes1 { 3671b89dc93SKishon Vijay Abraham I status = "disabled"; 3681b89dc93SKishon Vijay Abraham I}; 3691b89dc93SKishon Vijay Abraham I 3701b89dc93SKishon Vijay Abraham I&pcie0_rc { 3711b89dc93SKishon Vijay Abraham I status = "disabled"; 3721b89dc93SKishon Vijay Abraham I}; 3731b89dc93SKishon Vijay Abraham I 3741b89dc93SKishon Vijay Abraham I&pcie0_ep { 3751b89dc93SKishon Vijay Abraham I status = "disabled"; 3761b89dc93SKishon Vijay Abraham I}; 3771b89dc93SKishon Vijay Abraham I 3781b89dc93SKishon Vijay Abraham I&pcie1_rc { 3791b89dc93SKishon Vijay Abraham I status = "disabled"; 3801b89dc93SKishon Vijay Abraham I}; 3811b89dc93SKishon Vijay Abraham I 3821b89dc93SKishon Vijay Abraham I&pcie1_ep { 3831b89dc93SKishon Vijay Abraham I status = "disabled"; 3841b89dc93SKishon Vijay Abraham I}; 38543570f78SSuman Anna 38643570f78SSuman Anna&mailbox0_cluster0 { 387fef84512SLokesh Vutla interrupts = <436>; 38843570f78SSuman Anna 38943570f78SSuman Anna mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 { 39043570f78SSuman Anna ti,mbox-tx = <1 0 0>; 39143570f78SSuman Anna ti,mbox-rx = <0 0 0>; 39243570f78SSuman Anna }; 39343570f78SSuman Anna}; 39443570f78SSuman Anna 39543570f78SSuman Anna&mailbox0_cluster1 { 396fef84512SLokesh Vutla interrupts = <432>; 39743570f78SSuman Anna 39843570f78SSuman Anna mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { 39943570f78SSuman Anna ti,mbox-tx = <1 0 0>; 40043570f78SSuman Anna ti,mbox-rx = <0 0 0>; 40143570f78SSuman Anna }; 40243570f78SSuman Anna}; 40343570f78SSuman Anna 40443570f78SSuman Anna&mailbox0_cluster2 { 40543570f78SSuman Anna status = "disabled"; 40643570f78SSuman Anna}; 40743570f78SSuman Anna 40843570f78SSuman Anna&mailbox0_cluster3 { 40943570f78SSuman Anna status = "disabled"; 41043570f78SSuman Anna}; 41143570f78SSuman Anna 41243570f78SSuman Anna&mailbox0_cluster4 { 41343570f78SSuman Anna status = "disabled"; 41443570f78SSuman Anna}; 41543570f78SSuman Anna 41643570f78SSuman Anna&mailbox0_cluster5 { 41743570f78SSuman Anna status = "disabled"; 41843570f78SSuman Anna}; 41943570f78SSuman Anna 42043570f78SSuman Anna&mailbox0_cluster6 { 42143570f78SSuman Anna status = "disabled"; 42243570f78SSuman Anna}; 42343570f78SSuman Anna 42443570f78SSuman Anna&mailbox0_cluster7 { 42543570f78SSuman Anna status = "disabled"; 42643570f78SSuman Anna}; 42743570f78SSuman Anna 42843570f78SSuman Anna&mailbox0_cluster8 { 42943570f78SSuman Anna status = "disabled"; 43043570f78SSuman Anna}; 43143570f78SSuman Anna 43243570f78SSuman Anna&mailbox0_cluster9 { 43343570f78SSuman Anna status = "disabled"; 43443570f78SSuman Anna}; 43543570f78SSuman Anna 43643570f78SSuman Anna&mailbox0_cluster10 { 43743570f78SSuman Anna status = "disabled"; 43843570f78SSuman Anna}; 43943570f78SSuman Anna 44043570f78SSuman Anna&mailbox0_cluster11 { 44143570f78SSuman Anna status = "disabled"; 44243570f78SSuman Anna}; 44307481770SVignesh Raghavendra 44410332cd6SSuman Anna&mcu_r5fss0_core0 { 445954ec513SSuman Anna memory-region = <&mcu_r5fss0_core0_dma_memory_region>, 446954ec513SSuman Anna <&mcu_r5fss0_core0_memory_region>; 44710332cd6SSuman Anna mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; 44810332cd6SSuman Anna}; 44910332cd6SSuman Anna 45010332cd6SSuman Anna&mcu_r5fss0_core1 { 451954ec513SSuman Anna memory-region = <&mcu_r5fss0_core1_dma_memory_region>, 452954ec513SSuman Anna <&mcu_r5fss0_core1_memory_region>; 45310332cd6SSuman Anna mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>; 45410332cd6SSuman Anna}; 45510332cd6SSuman Anna 45607481770SVignesh Raghavendra&ospi0 { 45707481770SVignesh Raghavendra pinctrl-names = "default"; 45807481770SVignesh Raghavendra pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; 45907481770SVignesh Raghavendra 46007481770SVignesh Raghavendra flash@0{ 46107481770SVignesh Raghavendra compatible = "jedec,spi-nor"; 46207481770SVignesh Raghavendra reg = <0x0>; 4637c172b30SPratyush Yadav spi-tx-bus-width = <8>; 46407481770SVignesh Raghavendra spi-rx-bus-width = <8>; 4657c172b30SPratyush Yadav spi-max-frequency = <25000000>; 46607481770SVignesh Raghavendra cdns,tshsl-ns = <60>; 46707481770SVignesh Raghavendra cdns,tsd2d-ns = <60>; 46807481770SVignesh Raghavendra cdns,tchsh-ns = <60>; 46907481770SVignesh Raghavendra cdns,tslch-ns = <60>; 47007481770SVignesh Raghavendra cdns,read-delay = <0>; 47107481770SVignesh Raghavendra #address-cells = <1>; 47207481770SVignesh Raghavendra #size-cells = <1>; 47307481770SVignesh Raghavendra }; 47407481770SVignesh Raghavendra}; 475be28d4daSBenoit Parrot 4769ba5a8a5SGrygorii Strashko&mcu_cpsw { 4779ba5a8a5SGrygorii Strashko pinctrl-names = "default"; 4789ba5a8a5SGrygorii Strashko pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>; 4799ba5a8a5SGrygorii Strashko}; 4809ba5a8a5SGrygorii Strashko 4819ba5a8a5SGrygorii Strashko&davinci_mdio { 4829ba5a8a5SGrygorii Strashko phy0: ethernet-phy@0 { 4839ba5a8a5SGrygorii Strashko reg = <0>; 4849ba5a8a5SGrygorii Strashko ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 4859ba5a8a5SGrygorii Strashko ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 4869ba5a8a5SGrygorii Strashko }; 4879ba5a8a5SGrygorii Strashko}; 4889ba5a8a5SGrygorii Strashko 4899ba5a8a5SGrygorii Strashko&cpsw_port1 { 4909ba5a8a5SGrygorii Strashko phy-mode = "rgmii-rxid"; 4919ba5a8a5SGrygorii Strashko phy-handle = <&phy0>; 4929ba5a8a5SGrygorii Strashko}; 493af03de2bSNishanth Menon 494af03de2bSNishanth Menon&mcasp0 { 495af03de2bSNishanth Menon status = "disabled"; 496af03de2bSNishanth Menon}; 497af03de2bSNishanth Menon 498af03de2bSNishanth Menon&mcasp1 { 499af03de2bSNishanth Menon status = "disabled"; 500af03de2bSNishanth Menon}; 501af03de2bSNishanth Menon 502af03de2bSNishanth Menon&mcasp2 { 503af03de2bSNishanth Menon status = "disabled"; 504af03de2bSNishanth Menon}; 505af03de2bSNishanth Menon 506af03de2bSNishanth Menon&dss { 507af03de2bSNishanth Menon status = "disabled"; 508af03de2bSNishanth Menon}; 509