1d0a064beSNishanth Menon// SPDX-License-Identifier: GPL-2.0 2d0a064beSNishanth Menon/* 310332cd6SSuman Anna * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/ 4d0a064beSNishanth Menon */ 5d0a064beSNishanth Menon 6d0a064beSNishanth Menon/dts-v1/; 7d0a064beSNishanth Menon 8d0a064beSNishanth Menon#include "k3-am654.dtsi" 9c67f7388SKeerthy#include <dt-bindings/input/input.h> 109ba5a8a5SGrygorii Strashko#include <dt-bindings/net/ti-dp83867.h> 11d0a064beSNishanth Menon 12d0a064beSNishanth Menon/ { 13d0a064beSNishanth Menon compatible = "ti,am654-evm", "ti,am654"; 14d0a064beSNishanth Menon model = "Texas Instruments AM654 Base Board"; 15d0a064beSNishanth Menon 16d0a064beSNishanth Menon chosen { 17d0a064beSNishanth Menon stdout-path = "serial2:115200n8"; 18d0a064beSNishanth Menon }; 19d0a064beSNishanth Menon 20d0a064beSNishanth Menon memory@80000000 { 21d0a064beSNishanth Menon device_type = "memory"; 22d0a064beSNishanth Menon /* 4G RAM */ 23d0a064beSNishanth Menon reg = <0x00000000 0x80000000 0x00000000 0x80000000>, 24d0a064beSNishanth Menon <0x00000008 0x80000000 0x00000000 0x80000000>; 25d0a064beSNishanth Menon }; 26d0a064beSNishanth Menon 27d0a064beSNishanth Menon reserved-memory { 28d0a064beSNishanth Menon #address-cells = <2>; 29d0a064beSNishanth Menon #size-cells = <2>; 30d0a064beSNishanth Menon ranges; 31954ec513SSuman Anna 32e5c956c4SNishanth Menon secure_ddr: secure-ddr@9e800000 { 33d0a064beSNishanth Menon reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */ 34d0a064beSNishanth Menon alignment = <0x1000>; 35d0a064beSNishanth Menon no-map; 36d0a064beSNishanth Menon }; 37954ec513SSuman Anna 38954ec513SSuman Anna mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { 39954ec513SSuman Anna compatible = "shared-dma-pool"; 40954ec513SSuman Anna reg = <0 0xa0000000 0 0x100000>; 41954ec513SSuman Anna no-map; 42954ec513SSuman Anna }; 43954ec513SSuman Anna 44954ec513SSuman Anna mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 { 45954ec513SSuman Anna compatible = "shared-dma-pool"; 46954ec513SSuman Anna reg = <0 0xa0100000 0 0xf00000>; 47954ec513SSuman Anna no-map; 48954ec513SSuman Anna }; 49954ec513SSuman Anna 50954ec513SSuman Anna mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { 51954ec513SSuman Anna compatible = "shared-dma-pool"; 52954ec513SSuman Anna reg = <0 0xa1000000 0 0x100000>; 53954ec513SSuman Anna no-map; 54954ec513SSuman Anna }; 55954ec513SSuman Anna 56954ec513SSuman Anna mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 { 57954ec513SSuman Anna compatible = "shared-dma-pool"; 58954ec513SSuman Anna reg = <0 0xa1100000 0 0xf00000>; 59954ec513SSuman Anna no-map; 60954ec513SSuman Anna }; 61f82c5e0aSSuman Anna 62f82c5e0aSSuman Anna rtos_ipc_memory_region: ipc-memories@a2000000 { 63f82c5e0aSSuman Anna reg = <0x00 0xa2000000 0x00 0x00100000>; 64f82c5e0aSSuman Anna alignment = <0x1000>; 65f82c5e0aSSuman Anna no-map; 66f82c5e0aSSuman Anna }; 67d0a064beSNishanth Menon }; 68c67f7388SKeerthy 69c67f7388SKeerthy gpio-keys { 70c67f7388SKeerthy compatible = "gpio-keys"; 71c67f7388SKeerthy autorepeat; 72c67f7388SKeerthy pinctrl-names = "default"; 73c67f7388SKeerthy pinctrl-0 = <&push_button_pins_default>; 74c67f7388SKeerthy 7585423386SKrzysztof Kozlowski switch-5 { 76c67f7388SKeerthy label = "GPIO Key USER1"; 77c67f7388SKeerthy linux,code = <BTN_0>; 78c67f7388SKeerthy gpios = <&wkup_gpio0 24 GPIO_ACTIVE_LOW>; 79c67f7388SKeerthy }; 80c67f7388SKeerthy 8185423386SKrzysztof Kozlowski switch-6 { 82c67f7388SKeerthy label = "GPIO Key USER2"; 83c67f7388SKeerthy linux,code = <BTN_1>; 84c67f7388SKeerthy gpios = <&wkup_gpio0 27 GPIO_ACTIVE_LOW>; 85c67f7388SKeerthy }; 86c67f7388SKeerthy }; 8779b08ae7SAswath Govindraju 88ec1b5482SNishanth Menon evm_12v0: regulator-0 { 8979b08ae7SAswath Govindraju /* main supply */ 9079b08ae7SAswath Govindraju compatible = "regulator-fixed"; 9179b08ae7SAswath Govindraju regulator-name = "evm_12v0"; 9279b08ae7SAswath Govindraju regulator-min-microvolt = <12000000>; 9379b08ae7SAswath Govindraju regulator-max-microvolt = <12000000>; 9479b08ae7SAswath Govindraju regulator-always-on; 9579b08ae7SAswath Govindraju regulator-boot-on; 9679b08ae7SAswath Govindraju }; 9779b08ae7SAswath Govindraju 98ec1b5482SNishanth Menon vcc3v3_io: regulator-1 { 9979b08ae7SAswath Govindraju /* Output of TPS54334 */ 10079b08ae7SAswath Govindraju compatible = "regulator-fixed"; 10179b08ae7SAswath Govindraju regulator-name = "vcc3v3_io"; 10279b08ae7SAswath Govindraju regulator-min-microvolt = <3300000>; 10379b08ae7SAswath Govindraju regulator-max-microvolt = <3300000>; 10479b08ae7SAswath Govindraju regulator-always-on; 10579b08ae7SAswath Govindraju regulator-boot-on; 10679b08ae7SAswath Govindraju vin-supply = <&evm_12v0>; 10779b08ae7SAswath Govindraju }; 10879b08ae7SAswath Govindraju 109ec1b5482SNishanth Menon vdd_mmc1_sd: regulator-2 { 11079b08ae7SAswath Govindraju compatible = "regulator-fixed"; 11179b08ae7SAswath Govindraju regulator-name = "vdd_mmc1_sd"; 11279b08ae7SAswath Govindraju regulator-min-microvolt = <3300000>; 11379b08ae7SAswath Govindraju regulator-max-microvolt = <3300000>; 11479b08ae7SAswath Govindraju regulator-boot-on; 11579b08ae7SAswath Govindraju enable-active-high; 11679b08ae7SAswath Govindraju vin-supply = <&vcc3v3_io>; 11779b08ae7SAswath Govindraju gpio = <&pca9554 4 GPIO_ACTIVE_HIGH>; 11879b08ae7SAswath Govindraju }; 119*5292f504SNishanth Menon 120*5292f504SNishanth Menon vtt_supply: regulator-3 { 121*5292f504SNishanth Menon compatible = "regulator-fixed"; 122*5292f504SNishanth Menon regulator-name = "vtt"; 123*5292f504SNishanth Menon pinctrl-names = "default"; 124*5292f504SNishanth Menon pinctrl-0 = <&ddr_vtt_pins_default>; 125*5292f504SNishanth Menon regulator-min-microvolt = <3300000>; 126*5292f504SNishanth Menon regulator-max-microvolt = <3300000>; 127*5292f504SNishanth Menon enable-active-high; 128*5292f504SNishanth Menon regulator-always-on; 129*5292f504SNishanth Menon regulator-boot-on; 130*5292f504SNishanth Menon vin-supply = <&vcc3v3_io>; 131*5292f504SNishanth Menon gpio = <&wkup_gpio0 28 GPIO_ACTIVE_HIGH>; 132*5292f504SNishanth Menon }; 133d0a064beSNishanth Menon}; 1344201af25SNishanth Menon 13519a1768fSVignesh R&wkup_pmx0 { 1363ae28642SNishanth Menon wkup_uart0_pins_default: wkup-uart0-pins-default { 1373ae28642SNishanth Menon pinctrl-single,pins = < 1383ae28642SNishanth Menon AM65X_WKUP_IOPAD(0x00a0, PIN_INPUT, 0) /* (AB1) WKUP_UART0_RXD */ 1393ae28642SNishanth Menon AM65X_WKUP_IOPAD(0x00a4, PIN_OUTPUT, 0) /* (AB5) WKUP_UART0_TXD */ 1403ae28642SNishanth Menon AM65X_WKUP_IOPAD(0x00c8, PIN_INPUT, 1) /* (AC2) WKUP_GPIO0_6.WKUP_UART0_CTSn */ 1413ae28642SNishanth Menon AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 1) /* (AC1) WKUP_GPIO0_7.WKUP_UART0_RTSn */ 1423ae28642SNishanth Menon >; 1433ae28642SNishanth Menon }; 1443ae28642SNishanth Menon 145*5292f504SNishanth Menon ddr_vtt_pins_default: ddr-vtt-pins-default { 146*5292f504SNishanth Menon pinctrl-single,pins = < 147*5292f504SNishanth Menon AM65X_WKUP_IOPAD(0x0040, PIN_OUTPUT_PULLUP, 7) /* WKUP_GPIO0_28 */ 148*5292f504SNishanth Menon >; 149*5292f504SNishanth Menon }; 150*5292f504SNishanth Menon 15119a1768fSVignesh R wkup_i2c0_pins_default: wkup-i2c0-pins-default { 15219a1768fSVignesh R pinctrl-single,pins = < 15319a1768fSVignesh R AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */ 15419a1768fSVignesh R AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ 15519a1768fSVignesh R >; 15619a1768fSVignesh R }; 157c67f7388SKeerthy 158e5c956c4SNishanth Menon push_button_pins_default: push-button-pins-default { 159c67f7388SKeerthy pinctrl-single,pins = < 160c67f7388SKeerthy AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */ 161c67f7388SKeerthy AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */ 162c67f7388SKeerthy >; 163c67f7388SKeerthy }; 16407481770SVignesh Raghavendra 165e5c956c4SNishanth Menon mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default { 16607481770SVignesh Raghavendra pinctrl-single,pins = < 16707481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */ 16807481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */ 16907481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */ 17007481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */ 17107481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2) MCU_OSPI0_D2 */ 17207481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */ 17307481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4) MCU_OSPI0_D4 */ 17407481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5) MCU_OSPI0_D5 */ 17507481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */ 17607481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */ 17707481770SVignesh Raghavendra AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */ 17807481770SVignesh Raghavendra >; 17907481770SVignesh Raghavendra }; 180ca3be22dSVignesh Raghavendra 181e5c956c4SNishanth Menon wkup_pca554_default: wkup-pca554-default { 182ca3be22dSVignesh Raghavendra pinctrl-single,pins = < 183ca3be22dSVignesh Raghavendra AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */ 1849ba5a8a5SGrygorii Strashko >; 1859ba5a8a5SGrygorii Strashko }; 186ca3be22dSVignesh Raghavendra 1873ae28642SNishanth Menon mcu_uart0_pins_default: mcu-uart0-pins-default { 1883ae28642SNishanth Menon pinctrl-single,pins = < 1893ae28642SNishanth Menon AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4) /* (P4) MCU_OSPI1_D1.MCU_UART0_RXD */ 1903ae28642SNishanth Menon AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4) /* (P5) MCU_OSPI1_D2.MCU_UART0_TXD */ 1913ae28642SNishanth Menon AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4) /* (P1) MCU_OSPI1_D3.MCU_UART0_CTSn */ 1923ae28642SNishanth Menon AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) /* (N3) MCU_OSPI1_CSn1.MCU_UART0_RTSn */ 1933ae28642SNishanth Menon >; 1943ae28642SNishanth Menon }; 1953ae28642SNishanth Menon 196e5c956c4SNishanth Menon mcu_cpsw_pins_default: mcu-cpsw-pins-default { 1979ba5a8a5SGrygorii Strashko pinctrl-single,pins = < 1989ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */ 1999ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5) MCU_RGMII1_RX_CTL */ 2009ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* (M2) MCU_RGMII1_TD3 */ 2019ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* (M3) MCU_RGMII1_TD2 */ 2029ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* (M4) MCU_RGMII1_TD1 */ 2039ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* (M5) MCU_RGMII1_TD0 */ 2049ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* (L2) MCU_RGMII1_RD3 */ 2059ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* (L5) MCU_RGMII1_RD2 */ 2069ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* (M6) MCU_RGMII1_RD1 */ 2079ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* (L6) MCU_RGMII1_RD0 */ 20869db725cSGrygorii Strashko AM65X_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* (N1) MCU_RGMII1_TXC */ 2099ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* (M1) MCU_RGMII1_RXC */ 2109ba5a8a5SGrygorii Strashko >; 2119ba5a8a5SGrygorii Strashko }; 2129ba5a8a5SGrygorii Strashko 213e5c956c4SNishanth Menon mcu_mdio_pins_default: mcu-mdio1-pins-default { 2149ba5a8a5SGrygorii Strashko pinctrl-single,pins = < 2159ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */ 2169ba5a8a5SGrygorii Strashko AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */ 217ca3be22dSVignesh Raghavendra >; 218ca3be22dSVignesh Raghavendra }; 2193ae28642SNishanth Menon 2203ae28642SNishanth Menon mcu_i2c0_pins_default: mcu-i2c0-pins-default { 2213ae28642SNishanth Menon pinctrl-single,pins = < 2223ae28642SNishanth Menon AM65X_WKUP_IOPAD(0x00e8, PIN_INPUT, 0) /* (AD8) MCU_I2C0_SCL */ 2233ae28642SNishanth Menon AM65X_WKUP_IOPAD(0x00ec, PIN_INPUT, 0) /* (AD7) MCU_I2C0_SDA */ 2243ae28642SNishanth Menon >; 2253ae28642SNishanth Menon }; 22619a1768fSVignesh R}; 22719a1768fSVignesh R 2283f94859fSVignesh R&main_pmx0 { 2293f94859fSVignesh R main_uart0_pins_default: main-uart0-pins-default { 2303f94859fSVignesh R pinctrl-single,pins = < 2313f94859fSVignesh R AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */ 2323f94859fSVignesh R AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */ 2333f94859fSVignesh R AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */ 2343f94859fSVignesh R AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ 2353f94859fSVignesh R >; 2363f94859fSVignesh R }; 23719a1768fSVignesh R 23819a1768fSVignesh R main_i2c2_pins_default: main-i2c2-pins-default { 23919a1768fSVignesh R pinctrl-single,pins = < 24019a1768fSVignesh R AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */ 24119a1768fSVignesh R AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */ 24219a1768fSVignesh R >; 24319a1768fSVignesh R }; 2445da94b50SVignesh R 2455da94b50SVignesh R main_spi0_pins_default: main-spi0-pins-default { 2465da94b50SVignesh R pinctrl-single,pins = < 2475da94b50SVignesh R AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */ 2485da94b50SVignesh R AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */ 2495da94b50SVignesh R AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */ 2505da94b50SVignesh R AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */ 2515da94b50SVignesh R >; 2525da94b50SVignesh R }; 253fd58466aSFaiz Abbas 254fd58466aSFaiz Abbas main_mmc0_pins_default: main-mmc0-pins-default { 255fd58466aSFaiz Abbas pinctrl-single,pins = < 256fd58466aSFaiz Abbas AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */ 257fd58466aSFaiz Abbas AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */ 258fd58466aSFaiz Abbas AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */ 259fd58466aSFaiz Abbas AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */ 260fd58466aSFaiz Abbas AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */ 261fd58466aSFaiz Abbas AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */ 262fd58466aSFaiz Abbas AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */ 263fd58466aSFaiz Abbas AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */ 264fd58466aSFaiz Abbas AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */ 265fd58466aSFaiz Abbas AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */ 266fd58466aSFaiz Abbas AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */ 267fd58466aSFaiz Abbas AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */ 268fd58466aSFaiz Abbas >; 269fd58466aSFaiz Abbas }; 2707e7e7dd5SRoger Quadros 271e5c956c4SNishanth Menon main_mmc1_pins_default: main-mmc1-pins-default { 27213f74fc6SFaiz Abbas pinctrl-single,pins = < 27313f74fc6SFaiz Abbas AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */ 27413f74fc6SFaiz Abbas AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */ 27513f74fc6SFaiz Abbas AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */ 27613f74fc6SFaiz Abbas AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */ 27713f74fc6SFaiz Abbas AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */ 27813f74fc6SFaiz Abbas AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */ 27913f74fc6SFaiz Abbas AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */ 28013f74fc6SFaiz Abbas AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */ 28113f74fc6SFaiz Abbas >; 28213f74fc6SFaiz Abbas }; 28313f74fc6SFaiz Abbas 284e5c956c4SNishanth Menon usb1_pins_default: usb1-pins-default { 2857e7e7dd5SRoger Quadros pinctrl-single,pins = < 2867e7e7dd5SRoger Quadros AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */ 2877e7e7dd5SRoger Quadros >; 2887e7e7dd5SRoger Quadros }; 28919a1768fSVignesh R}; 29019a1768fSVignesh R 29119a1768fSVignesh R&main_pmx1 { 29219a1768fSVignesh R main_i2c0_pins_default: main-i2c0-pins-default { 29319a1768fSVignesh R pinctrl-single,pins = < 29419a1768fSVignesh R AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */ 29519a1768fSVignesh R AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */ 29619a1768fSVignesh R >; 29719a1768fSVignesh R }; 29819a1768fSVignesh R 29919a1768fSVignesh R main_i2c1_pins_default: main-i2c1-pins-default { 30019a1768fSVignesh R pinctrl-single,pins = < 30119a1768fSVignesh R AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */ 30219a1768fSVignesh R AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */ 30319a1768fSVignesh R >; 30419a1768fSVignesh R }; 305e577d794SVignesh R 306e577d794SVignesh R ecap0_pins_default: ecap0-pins-default { 307e577d794SVignesh R pinctrl-single,pins = < 308e577d794SVignesh R AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */ 309e577d794SVignesh R >; 310e577d794SVignesh R }; 3113f94859fSVignesh R}; 3123f94859fSVignesh R 3134201af25SNishanth Menon&wkup_uart0 { 3144201af25SNishanth Menon /* Wakeup UART is used by System firmware */ 3154cc34aa8SNishanth Menon status = "reserved"; 3163ae28642SNishanth Menon pinctrl-names = "default"; 3173ae28642SNishanth Menon pinctrl-0 = <&wkup_uart0_pins_default>; 3184201af25SNishanth Menon}; 3193f94859fSVignesh R 32065e8781aSAndrew Davis&mcu_uart0 { 32165e8781aSAndrew Davis status = "okay"; 3223ae28642SNishanth Menon pinctrl-names = "default"; 3233ae28642SNishanth Menon pinctrl-0 = <&mcu_uart0_pins_default>; 32465e8781aSAndrew Davis}; 32565e8781aSAndrew Davis 3263f94859fSVignesh R&main_uart0 { 32765e8781aSAndrew Davis status = "okay"; 3283f94859fSVignesh R pinctrl-names = "default"; 3293f94859fSVignesh R pinctrl-0 = <&main_uart0_pins_default>; 330c68272cbSLokesh Vutla power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>; 3313f94859fSVignesh R}; 33219a1768fSVignesh R 33319a1768fSVignesh R&wkup_i2c0 { 334c0a5ba87SAndrew Davis status = "okay"; 33519a1768fSVignesh R pinctrl-names = "default"; 33619a1768fSVignesh R pinctrl-0 = <&wkup_i2c0_pins_default>; 33719a1768fSVignesh R clock-frequency = <400000>; 33819a1768fSVignesh R 33919a1768fSVignesh R pca9554: gpio@39 { 34019a1768fSVignesh R compatible = "nxp,pca9554"; 34119a1768fSVignesh R reg = <0x39>; 34219a1768fSVignesh R gpio-controller; 34319a1768fSVignesh R #gpio-cells = <2>; 344ca3be22dSVignesh Raghavendra pinctrl-names = "default"; 345ca3be22dSVignesh Raghavendra pinctrl-0 = <&wkup_pca554_default>; 346ca3be22dSVignesh Raghavendra interrupt-parent = <&wkup_gpio0>; 347ca3be22dSVignesh Raghavendra interrupts = <25 IRQ_TYPE_EDGE_FALLING>; 348ca3be22dSVignesh Raghavendra interrupt-controller; 349ca3be22dSVignesh Raghavendra #interrupt-cells = <2>; 35019a1768fSVignesh R }; 35119a1768fSVignesh R}; 35219a1768fSVignesh R 353c0a5ba87SAndrew Davis&mcu_i2c0 { 354c0a5ba87SAndrew Davis status = "okay"; 3553ae28642SNishanth Menon pinctrl-names = "default"; 3563ae28642SNishanth Menon pinctrl-0 = <&mcu_i2c0_pins_default>; 3573ae28642SNishanth Menon clock-frequency = <400000>; 358c0a5ba87SAndrew Davis}; 359c0a5ba87SAndrew Davis 36019a1768fSVignesh R&main_i2c0 { 361c0a5ba87SAndrew Davis status = "okay"; 36219a1768fSVignesh R pinctrl-names = "default"; 36319a1768fSVignesh R pinctrl-0 = <&main_i2c0_pins_default>; 36419a1768fSVignesh R clock-frequency = <400000>; 36519a1768fSVignesh R 36619a1768fSVignesh R pca9555: gpio@21 { 36719a1768fSVignesh R compatible = "nxp,pca9555"; 36819a1768fSVignesh R reg = <0x21>; 36919a1768fSVignesh R gpio-controller; 37019a1768fSVignesh R #gpio-cells = <2>; 37119a1768fSVignesh R }; 37219a1768fSVignesh R}; 37319a1768fSVignesh R 37419a1768fSVignesh R&main_i2c1 { 375c0a5ba87SAndrew Davis status = "okay"; 37619a1768fSVignesh R pinctrl-names = "default"; 37719a1768fSVignesh R pinctrl-0 = <&main_i2c1_pins_default>; 37819a1768fSVignesh R clock-frequency = <400000>; 37919a1768fSVignesh R}; 38019a1768fSVignesh R 38119a1768fSVignesh R&main_i2c2 { 382c0a5ba87SAndrew Davis status = "okay"; 38319a1768fSVignesh R pinctrl-names = "default"; 38419a1768fSVignesh R pinctrl-0 = <&main_i2c2_pins_default>; 38519a1768fSVignesh R clock-frequency = <400000>; 38619a1768fSVignesh R}; 387e577d794SVignesh R 388e577d794SVignesh R&ecap0 { 389c1d1189eSAndrew Davis status = "okay"; 390e577d794SVignesh R pinctrl-names = "default"; 391e577d794SVignesh R pinctrl-0 = <&ecap0_pins_default>; 392e577d794SVignesh R}; 3935da94b50SVignesh R 3945da94b50SVignesh R&main_spi0 { 3951c49cbb1SAndrew Davis status = "okay"; 3965da94b50SVignesh R pinctrl-names = "default"; 3975da94b50SVignesh R pinctrl-0 = <&main_spi0_pins_default>; 3985da94b50SVignesh R #address-cells = <1>; 3995da94b50SVignesh R #size-cells = <0>; 4004f76ea7bSAswath Govindraju ti,pindir-d0-out-d1-in; 4015da94b50SVignesh R 4025da94b50SVignesh R flash@0 { 4035da94b50SVignesh R compatible = "jedec,spi-nor"; 4045da94b50SVignesh R reg = <0x0>; 4055da94b50SVignesh R spi-tx-bus-width = <1>; 4065da94b50SVignesh R spi-rx-bus-width = <1>; 4075da94b50SVignesh R spi-max-frequency = <48000000>; 4085da94b50SVignesh R }; 4095da94b50SVignesh R}; 410fd58466aSFaiz Abbas 411fd58466aSFaiz Abbas&sdhci0 { 412fd58466aSFaiz Abbas pinctrl-names = "default"; 413fd58466aSFaiz Abbas pinctrl-0 = <&main_mmc0_pins_default>; 414fd58466aSFaiz Abbas bus-width = <8>; 415fd58466aSFaiz Abbas non-removable; 416fd58466aSFaiz Abbas ti,driver-strength-ohm = <50>; 417337c4a88SFaiz Abbas disable-wp; 418fd58466aSFaiz Abbas}; 4197e7e7dd5SRoger Quadros 42013f74fc6SFaiz Abbas/* 42113f74fc6SFaiz Abbas * Because of erratas i2025 and i2026 for silicon revision 1.0, the 42213f74fc6SFaiz Abbas * SD card interface might fail. Boards with sr1.0 are recommended to 42313f74fc6SFaiz Abbas * disable sdhci1 42413f74fc6SFaiz Abbas */ 42513f74fc6SFaiz Abbas&sdhci1 { 42679b08ae7SAswath Govindraju vmmc-supply = <&vdd_mmc1_sd>; 42713f74fc6SFaiz Abbas pinctrl-names = "default"; 42813f74fc6SFaiz Abbas pinctrl-0 = <&main_mmc1_pins_default>; 42913f74fc6SFaiz Abbas ti,driver-strength-ohm = <50>; 43013f74fc6SFaiz Abbas disable-wp; 43113f74fc6SFaiz Abbas}; 43213f74fc6SFaiz Abbas 4337e7e7dd5SRoger Quadros&usb1 { 4347e7e7dd5SRoger Quadros pinctrl-names = "default"; 4357e7e7dd5SRoger Quadros pinctrl-0 = <&usb1_pins_default>; 4367e7e7dd5SRoger Quadros dr_mode = "otg"; 4377e7e7dd5SRoger Quadros}; 4387e7e7dd5SRoger Quadros 4397e7e7dd5SRoger Quadros&dwc3_0 { 4407e7e7dd5SRoger Quadros status = "disabled"; 4417e7e7dd5SRoger Quadros}; 4427e7e7dd5SRoger Quadros 4437e7e7dd5SRoger Quadros&usb0_phy { 4447e7e7dd5SRoger Quadros status = "disabled"; 4457e7e7dd5SRoger Quadros}; 446aa6eaaa2SVignesh R 447aa6eaaa2SVignesh R&tscadc0 { 448aa6eaaa2SVignesh R adc { 449aa6eaaa2SVignesh R ti,adc-channels = <0 1 2 3 4 5 6 7>; 450aa6eaaa2SVignesh R }; 451aa6eaaa2SVignesh R}; 452aa6eaaa2SVignesh R 453aa6eaaa2SVignesh R&tscadc1 { 454aa6eaaa2SVignesh R adc { 455aa6eaaa2SVignesh R ti,adc-channels = <0 1 2 3 4 5 6 7>; 456aa6eaaa2SVignesh R }; 457aa6eaaa2SVignesh R}; 4581b89dc93SKishon Vijay Abraham I 4591b89dc93SKishon Vijay Abraham I&serdes0 { 4601b89dc93SKishon Vijay Abraham I status = "disabled"; 4611b89dc93SKishon Vijay Abraham I}; 4621b89dc93SKishon Vijay Abraham I 4631b89dc93SKishon Vijay Abraham I&serdes1 { 4641b89dc93SKishon Vijay Abraham I status = "disabled"; 4651b89dc93SKishon Vijay Abraham I}; 4661b89dc93SKishon Vijay Abraham I 46743570f78SSuman Anna&mailbox0_cluster0 { 4683f9089eaSAndrew Davis status = "okay"; 469fef84512SLokesh Vutla interrupts = <436>; 47043570f78SSuman Anna 47143570f78SSuman Anna mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 { 47243570f78SSuman Anna ti,mbox-tx = <1 0 0>; 47343570f78SSuman Anna ti,mbox-rx = <0 0 0>; 47443570f78SSuman Anna }; 47543570f78SSuman Anna}; 47643570f78SSuman Anna 47743570f78SSuman Anna&mailbox0_cluster1 { 4783f9089eaSAndrew Davis status = "okay"; 479fef84512SLokesh Vutla interrupts = <432>; 48043570f78SSuman Anna 48143570f78SSuman Anna mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { 48243570f78SSuman Anna ti,mbox-tx = <1 0 0>; 48343570f78SSuman Anna ti,mbox-rx = <0 0 0>; 48443570f78SSuman Anna }; 48543570f78SSuman Anna}; 48643570f78SSuman Anna 48710332cd6SSuman Anna&mcu_r5fss0_core0 { 488954ec513SSuman Anna memory-region = <&mcu_r5fss0_core0_dma_memory_region>, 489954ec513SSuman Anna <&mcu_r5fss0_core0_memory_region>; 49010332cd6SSuman Anna mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; 49110332cd6SSuman Anna}; 49210332cd6SSuman Anna 49310332cd6SSuman Anna&mcu_r5fss0_core1 { 494954ec513SSuman Anna memory-region = <&mcu_r5fss0_core1_dma_memory_region>, 495954ec513SSuman Anna <&mcu_r5fss0_core1_memory_region>; 49610332cd6SSuman Anna mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>; 49710332cd6SSuman Anna}; 49810332cd6SSuman Anna 49907481770SVignesh Raghavendra&ospi0 { 50007481770SVignesh Raghavendra pinctrl-names = "default"; 50107481770SVignesh Raghavendra pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; 50207481770SVignesh Raghavendra 50307481770SVignesh Raghavendra flash@0 { 50407481770SVignesh Raghavendra compatible = "jedec,spi-nor"; 50507481770SVignesh Raghavendra reg = <0x0>; 5067c172b30SPratyush Yadav spi-tx-bus-width = <8>; 50707481770SVignesh Raghavendra spi-rx-bus-width = <8>; 5087c172b30SPratyush Yadav spi-max-frequency = <25000000>; 50907481770SVignesh Raghavendra cdns,tshsl-ns = <60>; 51007481770SVignesh Raghavendra cdns,tsd2d-ns = <60>; 51107481770SVignesh Raghavendra cdns,tchsh-ns = <60>; 51207481770SVignesh Raghavendra cdns,tslch-ns = <60>; 51307481770SVignesh Raghavendra cdns,read-delay = <0>; 51407481770SVignesh Raghavendra }; 51507481770SVignesh Raghavendra}; 516be28d4daSBenoit Parrot 5179ba5a8a5SGrygorii Strashko&mcu_cpsw { 5189ba5a8a5SGrygorii Strashko pinctrl-names = "default"; 5190edd6d7eSAndrew Davis pinctrl-0 = <&mcu_cpsw_pins_default>; 5209ba5a8a5SGrygorii Strashko}; 5219ba5a8a5SGrygorii Strashko 5229ba5a8a5SGrygorii Strashko&davinci_mdio { 523c75c5c0bSAndrew Davis status = "okay"; 5240edd6d7eSAndrew Davis pinctrl-names = "default"; 5250edd6d7eSAndrew Davis pinctrl-0 = <&mcu_mdio_pins_default>; 5260edd6d7eSAndrew Davis 5279ba5a8a5SGrygorii Strashko phy0: ethernet-phy@0 { 5289ba5a8a5SGrygorii Strashko reg = <0>; 5299ba5a8a5SGrygorii Strashko ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 5309ba5a8a5SGrygorii Strashko ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 5319ba5a8a5SGrygorii Strashko }; 5329ba5a8a5SGrygorii Strashko}; 5339ba5a8a5SGrygorii Strashko 5349ba5a8a5SGrygorii Strashko&cpsw_port1 { 5359ba5a8a5SGrygorii Strashko phy-mode = "rgmii-rxid"; 5369ba5a8a5SGrygorii Strashko phy-handle = <&phy0>; 5379ba5a8a5SGrygorii Strashko}; 538af03de2bSNishanth Menon 539af03de2bSNishanth Menon&dss { 540af03de2bSNishanth Menon status = "disabled"; 541af03de2bSNishanth Menon}; 542