xref: /openbmc/linux/arch/arm64/boot/dts/ti/k3-am654-base-board.dts (revision 3ae28642a110485f71091f0a631492e78b396b2b)
1d0a064beSNishanth Menon// SPDX-License-Identifier: GPL-2.0
2d0a064beSNishanth Menon/*
310332cd6SSuman Anna * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
4d0a064beSNishanth Menon */
5d0a064beSNishanth Menon
6d0a064beSNishanth Menon/dts-v1/;
7d0a064beSNishanth Menon
8d0a064beSNishanth Menon#include "k3-am654.dtsi"
9c67f7388SKeerthy#include <dt-bindings/input/input.h>
109ba5a8a5SGrygorii Strashko#include <dt-bindings/net/ti-dp83867.h>
11d0a064beSNishanth Menon
12d0a064beSNishanth Menon/ {
13d0a064beSNishanth Menon	compatible = "ti,am654-evm", "ti,am654";
14d0a064beSNishanth Menon	model = "Texas Instruments AM654 Base Board";
15d0a064beSNishanth Menon
16d0a064beSNishanth Menon	chosen {
17d0a064beSNishanth Menon		stdout-path = "serial2:115200n8";
18d0a064beSNishanth Menon	};
19d0a064beSNishanth Menon
20d0a064beSNishanth Menon	memory@80000000 {
21d0a064beSNishanth Menon		device_type = "memory";
22d0a064beSNishanth Menon		/* 4G RAM */
23d0a064beSNishanth Menon		reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
24d0a064beSNishanth Menon		      <0x00000008 0x80000000 0x00000000 0x80000000>;
25d0a064beSNishanth Menon	};
26d0a064beSNishanth Menon
27d0a064beSNishanth Menon	reserved-memory {
28d0a064beSNishanth Menon		#address-cells = <2>;
29d0a064beSNishanth Menon		#size-cells = <2>;
30d0a064beSNishanth Menon		ranges;
31954ec513SSuman Anna
32e5c956c4SNishanth Menon		secure_ddr: secure-ddr@9e800000 {
33d0a064beSNishanth Menon			reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
34d0a064beSNishanth Menon			alignment = <0x1000>;
35d0a064beSNishanth Menon			no-map;
36d0a064beSNishanth Menon		};
37954ec513SSuman Anna
38954ec513SSuman Anna		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
39954ec513SSuman Anna			compatible = "shared-dma-pool";
40954ec513SSuman Anna			reg = <0 0xa0000000 0 0x100000>;
41954ec513SSuman Anna			no-map;
42954ec513SSuman Anna		};
43954ec513SSuman Anna
44954ec513SSuman Anna		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
45954ec513SSuman Anna			compatible = "shared-dma-pool";
46954ec513SSuman Anna			reg = <0 0xa0100000 0 0xf00000>;
47954ec513SSuman Anna			no-map;
48954ec513SSuman Anna		};
49954ec513SSuman Anna
50954ec513SSuman Anna		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
51954ec513SSuman Anna			compatible = "shared-dma-pool";
52954ec513SSuman Anna			reg = <0 0xa1000000 0 0x100000>;
53954ec513SSuman Anna			no-map;
54954ec513SSuman Anna		};
55954ec513SSuman Anna
56954ec513SSuman Anna		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
57954ec513SSuman Anna			compatible = "shared-dma-pool";
58954ec513SSuman Anna			reg = <0 0xa1100000 0 0xf00000>;
59954ec513SSuman Anna			no-map;
60954ec513SSuman Anna		};
61f82c5e0aSSuman Anna
62f82c5e0aSSuman Anna		rtos_ipc_memory_region: ipc-memories@a2000000 {
63f82c5e0aSSuman Anna			reg = <0x00 0xa2000000 0x00 0x00100000>;
64f82c5e0aSSuman Anna			alignment = <0x1000>;
65f82c5e0aSSuman Anna			no-map;
66f82c5e0aSSuman Anna		};
67d0a064beSNishanth Menon	};
68c67f7388SKeerthy
69c67f7388SKeerthy	gpio-keys {
70c67f7388SKeerthy		compatible = "gpio-keys";
71c67f7388SKeerthy		autorepeat;
72c67f7388SKeerthy		pinctrl-names = "default";
73c67f7388SKeerthy		pinctrl-0 = <&push_button_pins_default>;
74c67f7388SKeerthy
7585423386SKrzysztof Kozlowski		switch-5 {
76c67f7388SKeerthy			label = "GPIO Key USER1";
77c67f7388SKeerthy			linux,code = <BTN_0>;
78c67f7388SKeerthy			gpios = <&wkup_gpio0 24 GPIO_ACTIVE_LOW>;
79c67f7388SKeerthy		};
80c67f7388SKeerthy
8185423386SKrzysztof Kozlowski		switch-6 {
82c67f7388SKeerthy			label = "GPIO Key USER2";
83c67f7388SKeerthy			linux,code = <BTN_1>;
84c67f7388SKeerthy			gpios = <&wkup_gpio0 27 GPIO_ACTIVE_LOW>;
85c67f7388SKeerthy		};
86c67f7388SKeerthy	};
8779b08ae7SAswath Govindraju
8879b08ae7SAswath Govindraju	evm_12v0: fixedregulator-evm12v0 {
8979b08ae7SAswath Govindraju		/* main supply */
9079b08ae7SAswath Govindraju		compatible = "regulator-fixed";
9179b08ae7SAswath Govindraju		regulator-name = "evm_12v0";
9279b08ae7SAswath Govindraju		regulator-min-microvolt = <12000000>;
9379b08ae7SAswath Govindraju		regulator-max-microvolt = <12000000>;
9479b08ae7SAswath Govindraju		regulator-always-on;
9579b08ae7SAswath Govindraju		regulator-boot-on;
9679b08ae7SAswath Govindraju	};
9779b08ae7SAswath Govindraju
9879b08ae7SAswath Govindraju	vcc3v3_io: fixedregulator-vcc3v3io {
9979b08ae7SAswath Govindraju		/* Output of TPS54334 */
10079b08ae7SAswath Govindraju		compatible = "regulator-fixed";
10179b08ae7SAswath Govindraju		regulator-name = "vcc3v3_io";
10279b08ae7SAswath Govindraju		regulator-min-microvolt = <3300000>;
10379b08ae7SAswath Govindraju		regulator-max-microvolt = <3300000>;
10479b08ae7SAswath Govindraju		regulator-always-on;
10579b08ae7SAswath Govindraju		regulator-boot-on;
10679b08ae7SAswath Govindraju		vin-supply = <&evm_12v0>;
10779b08ae7SAswath Govindraju	};
10879b08ae7SAswath Govindraju
10979b08ae7SAswath Govindraju	vdd_mmc1_sd: fixedregulator-sd {
11079b08ae7SAswath Govindraju		compatible = "regulator-fixed";
11179b08ae7SAswath Govindraju		regulator-name = "vdd_mmc1_sd";
11279b08ae7SAswath Govindraju		regulator-min-microvolt = <3300000>;
11379b08ae7SAswath Govindraju		regulator-max-microvolt = <3300000>;
11479b08ae7SAswath Govindraju		regulator-boot-on;
11579b08ae7SAswath Govindraju		enable-active-high;
11679b08ae7SAswath Govindraju		vin-supply = <&vcc3v3_io>;
11779b08ae7SAswath Govindraju		gpio = <&pca9554 4 GPIO_ACTIVE_HIGH>;
11879b08ae7SAswath Govindraju	};
119d0a064beSNishanth Menon};
1204201af25SNishanth Menon
12119a1768fSVignesh R&wkup_pmx0 {
122*3ae28642SNishanth Menon	wkup_uart0_pins_default: wkup-uart0-pins-default {
123*3ae28642SNishanth Menon		pinctrl-single,pins = <
124*3ae28642SNishanth Menon			AM65X_WKUP_IOPAD(0x00a0, PIN_INPUT, 0)	/* (AB1) WKUP_UART0_RXD */
125*3ae28642SNishanth Menon			AM65X_WKUP_IOPAD(0x00a4, PIN_OUTPUT, 0)	/* (AB5) WKUP_UART0_TXD */
126*3ae28642SNishanth Menon			AM65X_WKUP_IOPAD(0x00c8, PIN_INPUT, 1)	/* (AC2) WKUP_GPIO0_6.WKUP_UART0_CTSn */
127*3ae28642SNishanth Menon			AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 1)	/* (AC1) WKUP_GPIO0_7.WKUP_UART0_RTSn */
128*3ae28642SNishanth Menon		>;
129*3ae28642SNishanth Menon	};
130*3ae28642SNishanth Menon
13119a1768fSVignesh R	wkup_i2c0_pins_default: wkup-i2c0-pins-default {
13219a1768fSVignesh R		pinctrl-single,pins = <
13319a1768fSVignesh R			AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
13419a1768fSVignesh R			AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
13519a1768fSVignesh R		>;
13619a1768fSVignesh R	};
137c67f7388SKeerthy
138e5c956c4SNishanth Menon	push_button_pins_default: push-button-pins-default {
139c67f7388SKeerthy		pinctrl-single,pins = <
140c67f7388SKeerthy			AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */
141c67f7388SKeerthy			AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */
142c67f7388SKeerthy		>;
143c67f7388SKeerthy	};
14407481770SVignesh Raghavendra
145e5c956c4SNishanth Menon	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
14607481770SVignesh Raghavendra		pinctrl-single,pins = <
14707481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */
14807481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0)	 /* (U2) MCU_OSPI0_DQS */
14907481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0)  /* (U4) MCU_OSPI0_D0 */
15007481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0)  /* (U5) MCU_OSPI0_D1 */
15107481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0)  /* (T2) MCU_OSPI0_D2 */
15207481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0)  /* (T3) MCU_OSPI0_D3 */
15307481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0)  /* (T4) MCU_OSPI0_D4 */
15407481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0)  /* (T5) MCU_OSPI0_D5 */
15507481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0)  /* (R2) MCU_OSPI0_D6 */
15607481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0)  /* (R3) MCU_OSPI0_D7 */
15707481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
15807481770SVignesh Raghavendra		>;
15907481770SVignesh Raghavendra	};
160ca3be22dSVignesh Raghavendra
161e5c956c4SNishanth Menon	wkup_pca554_default: wkup-pca554-default {
162ca3be22dSVignesh Raghavendra		pinctrl-single,pins = <
163ca3be22dSVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */
1649ba5a8a5SGrygorii Strashko		>;
1659ba5a8a5SGrygorii Strashko	};
166ca3be22dSVignesh Raghavendra
167*3ae28642SNishanth Menon	mcu_uart0_pins_default: mcu-uart0-pins-default {
168*3ae28642SNishanth Menon		pinctrl-single,pins = <
169*3ae28642SNishanth Menon			AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4)	/* (P4) MCU_OSPI1_D1.MCU_UART0_RXD */
170*3ae28642SNishanth Menon			AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4)	/* (P5) MCU_OSPI1_D2.MCU_UART0_TXD */
171*3ae28642SNishanth Menon			AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4)	/* (P1) MCU_OSPI1_D3.MCU_UART0_CTSn */
172*3ae28642SNishanth Menon			AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4)	/* (N3) MCU_OSPI1_CSn1.MCU_UART0_RTSn */
173*3ae28642SNishanth Menon		>;
174*3ae28642SNishanth Menon	};
175*3ae28642SNishanth Menon
176e5c956c4SNishanth Menon	mcu_cpsw_pins_default: mcu-cpsw-pins-default {
1779ba5a8a5SGrygorii Strashko		pinctrl-single,pins = <
1789ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */
1799ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5) MCU_RGMII1_RX_CTL */
1809ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* (M2) MCU_RGMII1_TD3 */
1819ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* (M3) MCU_RGMII1_TD2 */
1829ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* (M4) MCU_RGMII1_TD1 */
1839ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* (M5) MCU_RGMII1_TD0 */
1849ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* (L2) MCU_RGMII1_RD3 */
1859ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* (L5) MCU_RGMII1_RD2 */
1869ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* (M6) MCU_RGMII1_RD1 */
1879ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* (L6) MCU_RGMII1_RD0 */
18869db725cSGrygorii Strashko			AM65X_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* (N1) MCU_RGMII1_TXC */
1899ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* (M1) MCU_RGMII1_RXC */
1909ba5a8a5SGrygorii Strashko		>;
1919ba5a8a5SGrygorii Strashko	};
1929ba5a8a5SGrygorii Strashko
193e5c956c4SNishanth Menon	mcu_mdio_pins_default: mcu-mdio1-pins-default {
1949ba5a8a5SGrygorii Strashko		pinctrl-single,pins = <
1959ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
1969ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
197ca3be22dSVignesh Raghavendra		>;
198ca3be22dSVignesh Raghavendra	};
199*3ae28642SNishanth Menon
200*3ae28642SNishanth Menon	mcu_i2c0_pins_default: mcu-i2c0-pins-default {
201*3ae28642SNishanth Menon		pinctrl-single,pins = <
202*3ae28642SNishanth Menon			AM65X_WKUP_IOPAD(0x00e8, PIN_INPUT,  0) /* (AD8) MCU_I2C0_SCL */
203*3ae28642SNishanth Menon			AM65X_WKUP_IOPAD(0x00ec, PIN_INPUT,  0) /* (AD7) MCU_I2C0_SDA */
204*3ae28642SNishanth Menon		>;
205*3ae28642SNishanth Menon	};
20619a1768fSVignesh R};
20719a1768fSVignesh R
2083f94859fSVignesh R&main_pmx0 {
2093f94859fSVignesh R	main_uart0_pins_default: main-uart0-pins-default {
2103f94859fSVignesh R		pinctrl-single,pins = <
2113f94859fSVignesh R			AM65X_IOPAD(0x01e4, PIN_INPUT, 0)	/* (AF11) UART0_RXD */
2123f94859fSVignesh R			AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0)	/* (AE11) UART0_TXD */
2133f94859fSVignesh R			AM65X_IOPAD(0x01ec, PIN_INPUT, 0)	/* (AG11) UART0_CTSn */
2143f94859fSVignesh R			AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0)	/* (AD11) UART0_RTSn */
2153f94859fSVignesh R		>;
2163f94859fSVignesh R	};
21719a1768fSVignesh R
21819a1768fSVignesh R	main_i2c2_pins_default: main-i2c2-pins-default {
21919a1768fSVignesh R		pinctrl-single,pins = <
22019a1768fSVignesh R			AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */
22119a1768fSVignesh R			AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */
22219a1768fSVignesh R		>;
22319a1768fSVignesh R	};
2245da94b50SVignesh R
2255da94b50SVignesh R	main_spi0_pins_default: main-spi0-pins-default {
2265da94b50SVignesh R		pinctrl-single,pins = <
2275da94b50SVignesh R			AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */
2285da94b50SVignesh R			AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */
2295da94b50SVignesh R			AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */
2305da94b50SVignesh R			AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */
2315da94b50SVignesh R		>;
2325da94b50SVignesh R	};
233fd58466aSFaiz Abbas
234fd58466aSFaiz Abbas	main_mmc0_pins_default: main-mmc0-pins-default {
235fd58466aSFaiz Abbas		pinctrl-single,pins = <
236fd58466aSFaiz Abbas			AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
237fd58466aSFaiz Abbas			AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
238fd58466aSFaiz Abbas			AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
239fd58466aSFaiz Abbas			AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
240fd58466aSFaiz Abbas			AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
241fd58466aSFaiz Abbas			AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
242fd58466aSFaiz Abbas			AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
243fd58466aSFaiz Abbas			AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
244fd58466aSFaiz Abbas			AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
245fd58466aSFaiz Abbas			AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
246fd58466aSFaiz Abbas			AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
247fd58466aSFaiz Abbas			AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
248fd58466aSFaiz Abbas		>;
249fd58466aSFaiz Abbas	};
2507e7e7dd5SRoger Quadros
251e5c956c4SNishanth Menon	main_mmc1_pins_default: main-mmc1-pins-default {
25213f74fc6SFaiz Abbas		pinctrl-single,pins = <
25313f74fc6SFaiz Abbas			AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
25413f74fc6SFaiz Abbas			AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
25513f74fc6SFaiz Abbas			AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
25613f74fc6SFaiz Abbas			AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
25713f74fc6SFaiz Abbas			AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
25813f74fc6SFaiz Abbas			AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
25913f74fc6SFaiz Abbas			AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
26013f74fc6SFaiz Abbas			AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
26113f74fc6SFaiz Abbas		>;
26213f74fc6SFaiz Abbas	};
26313f74fc6SFaiz Abbas
264e5c956c4SNishanth Menon	usb1_pins_default: usb1-pins-default {
2657e7e7dd5SRoger Quadros		pinctrl-single,pins = <
2667e7e7dd5SRoger Quadros			AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
2677e7e7dd5SRoger Quadros		>;
2687e7e7dd5SRoger Quadros	};
26919a1768fSVignesh R};
27019a1768fSVignesh R
27119a1768fSVignesh R&main_pmx1 {
27219a1768fSVignesh R	main_i2c0_pins_default: main-i2c0-pins-default {
27319a1768fSVignesh R		pinctrl-single,pins = <
27419a1768fSVignesh R			AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
27519a1768fSVignesh R			AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
27619a1768fSVignesh R		>;
27719a1768fSVignesh R	};
27819a1768fSVignesh R
27919a1768fSVignesh R	main_i2c1_pins_default: main-i2c1-pins-default {
28019a1768fSVignesh R		pinctrl-single,pins = <
28119a1768fSVignesh R			AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
28219a1768fSVignesh R			AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
28319a1768fSVignesh R		>;
28419a1768fSVignesh R	};
285e577d794SVignesh R
286e577d794SVignesh R	ecap0_pins_default: ecap0-pins-default {
287e577d794SVignesh R		pinctrl-single,pins = <
288e577d794SVignesh R			AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */
289e577d794SVignesh R		>;
290e577d794SVignesh R	};
2913f94859fSVignesh R};
2923f94859fSVignesh R
2934201af25SNishanth Menon&wkup_uart0 {
2944201af25SNishanth Menon	/* Wakeup UART is used by System firmware */
2954cc34aa8SNishanth Menon	status = "reserved";
296*3ae28642SNishanth Menon	pinctrl-names = "default";
297*3ae28642SNishanth Menon	pinctrl-0 = <&wkup_uart0_pins_default>;
2984201af25SNishanth Menon};
2993f94859fSVignesh R
30065e8781aSAndrew Davis&mcu_uart0 {
30165e8781aSAndrew Davis	status = "okay";
302*3ae28642SNishanth Menon	pinctrl-names = "default";
303*3ae28642SNishanth Menon	pinctrl-0 = <&mcu_uart0_pins_default>;
30465e8781aSAndrew Davis};
30565e8781aSAndrew Davis
3063f94859fSVignesh R&main_uart0 {
30765e8781aSAndrew Davis	status = "okay";
3083f94859fSVignesh R	pinctrl-names = "default";
3093f94859fSVignesh R	pinctrl-0 = <&main_uart0_pins_default>;
310c68272cbSLokesh Vutla	power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
3113f94859fSVignesh R};
31219a1768fSVignesh R
31319a1768fSVignesh R&wkup_i2c0 {
314c0a5ba87SAndrew Davis	status = "okay";
31519a1768fSVignesh R	pinctrl-names = "default";
31619a1768fSVignesh R	pinctrl-0 = <&wkup_i2c0_pins_default>;
31719a1768fSVignesh R	clock-frequency = <400000>;
31819a1768fSVignesh R
31919a1768fSVignesh R	pca9554: gpio@39 {
32019a1768fSVignesh R		compatible = "nxp,pca9554";
32119a1768fSVignesh R		reg = <0x39>;
32219a1768fSVignesh R		gpio-controller;
32319a1768fSVignesh R		#gpio-cells = <2>;
324ca3be22dSVignesh Raghavendra		pinctrl-names = "default";
325ca3be22dSVignesh Raghavendra		pinctrl-0 = <&wkup_pca554_default>;
326ca3be22dSVignesh Raghavendra		interrupt-parent = <&wkup_gpio0>;
327ca3be22dSVignesh Raghavendra		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
328ca3be22dSVignesh Raghavendra		interrupt-controller;
329ca3be22dSVignesh Raghavendra		#interrupt-cells = <2>;
33019a1768fSVignesh R	};
33119a1768fSVignesh R};
33219a1768fSVignesh R
333c0a5ba87SAndrew Davis&mcu_i2c0 {
334c0a5ba87SAndrew Davis	status = "okay";
335*3ae28642SNishanth Menon	pinctrl-names = "default";
336*3ae28642SNishanth Menon	pinctrl-0 = <&mcu_i2c0_pins_default>;
337*3ae28642SNishanth Menon	clock-frequency = <400000>;
338c0a5ba87SAndrew Davis};
339c0a5ba87SAndrew Davis
34019a1768fSVignesh R&main_i2c0 {
341c0a5ba87SAndrew Davis	status = "okay";
34219a1768fSVignesh R	pinctrl-names = "default";
34319a1768fSVignesh R	pinctrl-0 = <&main_i2c0_pins_default>;
34419a1768fSVignesh R	clock-frequency = <400000>;
34519a1768fSVignesh R
34619a1768fSVignesh R	pca9555: gpio@21 {
34719a1768fSVignesh R		compatible = "nxp,pca9555";
34819a1768fSVignesh R		reg = <0x21>;
34919a1768fSVignesh R		gpio-controller;
35019a1768fSVignesh R		#gpio-cells = <2>;
35119a1768fSVignesh R	};
35219a1768fSVignesh R};
35319a1768fSVignesh R
35419a1768fSVignesh R&main_i2c1 {
355c0a5ba87SAndrew Davis	status = "okay";
35619a1768fSVignesh R	pinctrl-names = "default";
35719a1768fSVignesh R	pinctrl-0 = <&main_i2c1_pins_default>;
35819a1768fSVignesh R	clock-frequency = <400000>;
35919a1768fSVignesh R};
36019a1768fSVignesh R
36119a1768fSVignesh R&main_i2c2 {
362c0a5ba87SAndrew Davis	status = "okay";
36319a1768fSVignesh R	pinctrl-names = "default";
36419a1768fSVignesh R	pinctrl-0 = <&main_i2c2_pins_default>;
36519a1768fSVignesh R	clock-frequency = <400000>;
36619a1768fSVignesh R};
367e577d794SVignesh R
368e577d794SVignesh R&ecap0 {
369c1d1189eSAndrew Davis	status = "okay";
370e577d794SVignesh R	pinctrl-names = "default";
371e577d794SVignesh R	pinctrl-0 = <&ecap0_pins_default>;
372e577d794SVignesh R};
3735da94b50SVignesh R
3745da94b50SVignesh R&main_spi0 {
3751c49cbb1SAndrew Davis	status = "okay";
3765da94b50SVignesh R	pinctrl-names = "default";
3775da94b50SVignesh R	pinctrl-0 = <&main_spi0_pins_default>;
3785da94b50SVignesh R	#address-cells = <1>;
3795da94b50SVignesh R	#size-cells = <0>;
3804f76ea7bSAswath Govindraju	ti,pindir-d0-out-d1-in;
3815da94b50SVignesh R
3825da94b50SVignesh R	flash@0 {
3835da94b50SVignesh R		compatible = "jedec,spi-nor";
3845da94b50SVignesh R		reg = <0x0>;
3855da94b50SVignesh R		spi-tx-bus-width = <1>;
3865da94b50SVignesh R		spi-rx-bus-width = <1>;
3875da94b50SVignesh R		spi-max-frequency = <48000000>;
3885da94b50SVignesh R	};
3895da94b50SVignesh R};
390fd58466aSFaiz Abbas
391fd58466aSFaiz Abbas&sdhci0 {
392fd58466aSFaiz Abbas	pinctrl-names = "default";
393fd58466aSFaiz Abbas	pinctrl-0 = <&main_mmc0_pins_default>;
394fd58466aSFaiz Abbas	bus-width = <8>;
395fd58466aSFaiz Abbas	non-removable;
396fd58466aSFaiz Abbas	ti,driver-strength-ohm = <50>;
397337c4a88SFaiz Abbas	disable-wp;
398fd58466aSFaiz Abbas};
3997e7e7dd5SRoger Quadros
40013f74fc6SFaiz Abbas/*
40113f74fc6SFaiz Abbas * Because of erratas i2025 and i2026 for silicon revision 1.0, the
40213f74fc6SFaiz Abbas * SD card interface might fail. Boards with sr1.0 are recommended to
40313f74fc6SFaiz Abbas * disable sdhci1
40413f74fc6SFaiz Abbas */
40513f74fc6SFaiz Abbas&sdhci1 {
40679b08ae7SAswath Govindraju	vmmc-supply = <&vdd_mmc1_sd>;
40713f74fc6SFaiz Abbas	pinctrl-names = "default";
40813f74fc6SFaiz Abbas	pinctrl-0 = <&main_mmc1_pins_default>;
40913f74fc6SFaiz Abbas	ti,driver-strength-ohm = <50>;
41013f74fc6SFaiz Abbas	disable-wp;
41113f74fc6SFaiz Abbas};
41213f74fc6SFaiz Abbas
4137e7e7dd5SRoger Quadros&usb1 {
4147e7e7dd5SRoger Quadros	pinctrl-names = "default";
4157e7e7dd5SRoger Quadros	pinctrl-0 = <&usb1_pins_default>;
4167e7e7dd5SRoger Quadros	dr_mode = "otg";
4177e7e7dd5SRoger Quadros};
4187e7e7dd5SRoger Quadros
4197e7e7dd5SRoger Quadros&dwc3_0 {
4207e7e7dd5SRoger Quadros	status = "disabled";
4217e7e7dd5SRoger Quadros};
4227e7e7dd5SRoger Quadros
4237e7e7dd5SRoger Quadros&usb0_phy {
4247e7e7dd5SRoger Quadros	status = "disabled";
4257e7e7dd5SRoger Quadros};
426aa6eaaa2SVignesh R
427aa6eaaa2SVignesh R&tscadc0 {
428aa6eaaa2SVignesh R	adc {
429aa6eaaa2SVignesh R		ti,adc-channels = <0 1 2 3 4 5 6 7>;
430aa6eaaa2SVignesh R	};
431aa6eaaa2SVignesh R};
432aa6eaaa2SVignesh R
433aa6eaaa2SVignesh R&tscadc1 {
434aa6eaaa2SVignesh R	adc {
435aa6eaaa2SVignesh R		ti,adc-channels = <0 1 2 3 4 5 6 7>;
436aa6eaaa2SVignesh R	};
437aa6eaaa2SVignesh R};
4381b89dc93SKishon Vijay Abraham I
4391b89dc93SKishon Vijay Abraham I&serdes0 {
4401b89dc93SKishon Vijay Abraham I	status = "disabled";
4411b89dc93SKishon Vijay Abraham I};
4421b89dc93SKishon Vijay Abraham I
4431b89dc93SKishon Vijay Abraham I&serdes1 {
4441b89dc93SKishon Vijay Abraham I	status = "disabled";
4451b89dc93SKishon Vijay Abraham I};
4461b89dc93SKishon Vijay Abraham I
44743570f78SSuman Anna&mailbox0_cluster0 {
4483f9089eaSAndrew Davis	status = "okay";
449fef84512SLokesh Vutla	interrupts = <436>;
45043570f78SSuman Anna
45143570f78SSuman Anna	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
45243570f78SSuman Anna		ti,mbox-tx = <1 0 0>;
45343570f78SSuman Anna		ti,mbox-rx = <0 0 0>;
45443570f78SSuman Anna	};
45543570f78SSuman Anna};
45643570f78SSuman Anna
45743570f78SSuman Anna&mailbox0_cluster1 {
4583f9089eaSAndrew Davis	status = "okay";
459fef84512SLokesh Vutla	interrupts = <432>;
46043570f78SSuman Anna
46143570f78SSuman Anna	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
46243570f78SSuman Anna		ti,mbox-tx = <1 0 0>;
46343570f78SSuman Anna		ti,mbox-rx = <0 0 0>;
46443570f78SSuman Anna	};
46543570f78SSuman Anna};
46643570f78SSuman Anna
46710332cd6SSuman Anna&mcu_r5fss0_core0 {
468954ec513SSuman Anna	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
469954ec513SSuman Anna			<&mcu_r5fss0_core0_memory_region>;
47010332cd6SSuman Anna	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
47110332cd6SSuman Anna};
47210332cd6SSuman Anna
47310332cd6SSuman Anna&mcu_r5fss0_core1 {
474954ec513SSuman Anna	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
475954ec513SSuman Anna			<&mcu_r5fss0_core1_memory_region>;
47610332cd6SSuman Anna	mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
47710332cd6SSuman Anna};
47810332cd6SSuman Anna
47907481770SVignesh Raghavendra&ospi0 {
48007481770SVignesh Raghavendra	pinctrl-names = "default";
48107481770SVignesh Raghavendra	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
48207481770SVignesh Raghavendra
48307481770SVignesh Raghavendra	flash@0 {
48407481770SVignesh Raghavendra		compatible = "jedec,spi-nor";
48507481770SVignesh Raghavendra		reg = <0x0>;
4867c172b30SPratyush Yadav		spi-tx-bus-width = <8>;
48707481770SVignesh Raghavendra		spi-rx-bus-width = <8>;
4887c172b30SPratyush Yadav		spi-max-frequency = <25000000>;
48907481770SVignesh Raghavendra		cdns,tshsl-ns = <60>;
49007481770SVignesh Raghavendra		cdns,tsd2d-ns = <60>;
49107481770SVignesh Raghavendra		cdns,tchsh-ns = <60>;
49207481770SVignesh Raghavendra		cdns,tslch-ns = <60>;
49307481770SVignesh Raghavendra		cdns,read-delay = <0>;
49407481770SVignesh Raghavendra	};
49507481770SVignesh Raghavendra};
496be28d4daSBenoit Parrot
4979ba5a8a5SGrygorii Strashko&mcu_cpsw {
4989ba5a8a5SGrygorii Strashko	pinctrl-names = "default";
4990edd6d7eSAndrew Davis	pinctrl-0 = <&mcu_cpsw_pins_default>;
5009ba5a8a5SGrygorii Strashko};
5019ba5a8a5SGrygorii Strashko
5029ba5a8a5SGrygorii Strashko&davinci_mdio {
503c75c5c0bSAndrew Davis	status = "okay";
5040edd6d7eSAndrew Davis	pinctrl-names = "default";
5050edd6d7eSAndrew Davis	pinctrl-0 = <&mcu_mdio_pins_default>;
5060edd6d7eSAndrew Davis
5079ba5a8a5SGrygorii Strashko	phy0: ethernet-phy@0 {
5089ba5a8a5SGrygorii Strashko		reg = <0>;
5099ba5a8a5SGrygorii Strashko		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
5109ba5a8a5SGrygorii Strashko		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
5119ba5a8a5SGrygorii Strashko	};
5129ba5a8a5SGrygorii Strashko};
5139ba5a8a5SGrygorii Strashko
5149ba5a8a5SGrygorii Strashko&cpsw_port1 {
5159ba5a8a5SGrygorii Strashko	phy-mode = "rgmii-rxid";
5169ba5a8a5SGrygorii Strashko	phy-handle = <&phy0>;
5179ba5a8a5SGrygorii Strashko};
518af03de2bSNishanth Menon
519af03de2bSNishanth Menon&dss {
520af03de2bSNishanth Menon	status = "disabled";
521af03de2bSNishanth Menon};
522