xref: /openbmc/linux/arch/arm64/boot/dts/ti/k3-am654-base-board.dts (revision 0edd6d7ed646a53b41d09f7aa1d8c01d23bd7b73)
1d0a064beSNishanth Menon// SPDX-License-Identifier: GPL-2.0
2d0a064beSNishanth Menon/*
310332cd6SSuman Anna * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
4d0a064beSNishanth Menon */
5d0a064beSNishanth Menon
6d0a064beSNishanth Menon/dts-v1/;
7d0a064beSNishanth Menon
8d0a064beSNishanth Menon#include "k3-am654.dtsi"
9c67f7388SKeerthy#include <dt-bindings/input/input.h>
109ba5a8a5SGrygorii Strashko#include <dt-bindings/net/ti-dp83867.h>
11d0a064beSNishanth Menon
12d0a064beSNishanth Menon/ {
13d0a064beSNishanth Menon	compatible = "ti,am654-evm", "ti,am654";
14d0a064beSNishanth Menon	model = "Texas Instruments AM654 Base Board";
15d0a064beSNishanth Menon
16d0a064beSNishanth Menon	chosen {
17d0a064beSNishanth Menon		stdout-path = "serial2:115200n8";
18d0a064beSNishanth Menon		bootargs = "earlycon=ns16550a,mmio32,0x02800000";
19d0a064beSNishanth Menon	};
20d0a064beSNishanth Menon
21d0a064beSNishanth Menon	memory@80000000 {
22d0a064beSNishanth Menon		device_type = "memory";
23d0a064beSNishanth Menon		/* 4G RAM */
24d0a064beSNishanth Menon		reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
25d0a064beSNishanth Menon		      <0x00000008 0x80000000 0x00000000 0x80000000>;
26d0a064beSNishanth Menon	};
27d0a064beSNishanth Menon
28d0a064beSNishanth Menon	reserved-memory {
29d0a064beSNishanth Menon		#address-cells = <2>;
30d0a064beSNishanth Menon		#size-cells = <2>;
31d0a064beSNishanth Menon		ranges;
32954ec513SSuman Anna
33e5c956c4SNishanth Menon		secure_ddr: secure-ddr@9e800000 {
34d0a064beSNishanth Menon			reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
35d0a064beSNishanth Menon			alignment = <0x1000>;
36d0a064beSNishanth Menon			no-map;
37d0a064beSNishanth Menon		};
38954ec513SSuman Anna
39954ec513SSuman Anna		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
40954ec513SSuman Anna			compatible = "shared-dma-pool";
41954ec513SSuman Anna			reg = <0 0xa0000000 0 0x100000>;
42954ec513SSuman Anna			no-map;
43954ec513SSuman Anna		};
44954ec513SSuman Anna
45954ec513SSuman Anna		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
46954ec513SSuman Anna			compatible = "shared-dma-pool";
47954ec513SSuman Anna			reg = <0 0xa0100000 0 0xf00000>;
48954ec513SSuman Anna			no-map;
49954ec513SSuman Anna		};
50954ec513SSuman Anna
51954ec513SSuman Anna		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
52954ec513SSuman Anna			compatible = "shared-dma-pool";
53954ec513SSuman Anna			reg = <0 0xa1000000 0 0x100000>;
54954ec513SSuman Anna			no-map;
55954ec513SSuman Anna		};
56954ec513SSuman Anna
57954ec513SSuman Anna		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
58954ec513SSuman Anna			compatible = "shared-dma-pool";
59954ec513SSuman Anna			reg = <0 0xa1100000 0 0xf00000>;
60954ec513SSuman Anna			no-map;
61954ec513SSuman Anna		};
62f82c5e0aSSuman Anna
63f82c5e0aSSuman Anna		rtos_ipc_memory_region: ipc-memories@a2000000 {
64f82c5e0aSSuman Anna			reg = <0x00 0xa2000000 0x00 0x00100000>;
65f82c5e0aSSuman Anna			alignment = <0x1000>;
66f82c5e0aSSuman Anna			no-map;
67f82c5e0aSSuman Anna		};
68d0a064beSNishanth Menon	};
69c67f7388SKeerthy
70c67f7388SKeerthy	gpio-keys {
71c67f7388SKeerthy		compatible = "gpio-keys";
72c67f7388SKeerthy		autorepeat;
73c67f7388SKeerthy		pinctrl-names = "default";
74c67f7388SKeerthy		pinctrl-0 = <&push_button_pins_default>;
75c67f7388SKeerthy
7685423386SKrzysztof Kozlowski		switch-5 {
77c67f7388SKeerthy			label = "GPIO Key USER1";
78c67f7388SKeerthy			linux,code = <BTN_0>;
79c67f7388SKeerthy			gpios = <&wkup_gpio0 24 GPIO_ACTIVE_LOW>;
80c67f7388SKeerthy		};
81c67f7388SKeerthy
8285423386SKrzysztof Kozlowski		switch-6 {
83c67f7388SKeerthy			label = "GPIO Key USER2";
84c67f7388SKeerthy			linux,code = <BTN_1>;
85c67f7388SKeerthy			gpios = <&wkup_gpio0 27 GPIO_ACTIVE_LOW>;
86c67f7388SKeerthy		};
87c67f7388SKeerthy	};
8879b08ae7SAswath Govindraju
8979b08ae7SAswath Govindraju	evm_12v0: fixedregulator-evm12v0 {
9079b08ae7SAswath Govindraju		/* main supply */
9179b08ae7SAswath Govindraju		compatible = "regulator-fixed";
9279b08ae7SAswath Govindraju		regulator-name = "evm_12v0";
9379b08ae7SAswath Govindraju		regulator-min-microvolt = <12000000>;
9479b08ae7SAswath Govindraju		regulator-max-microvolt = <12000000>;
9579b08ae7SAswath Govindraju		regulator-always-on;
9679b08ae7SAswath Govindraju		regulator-boot-on;
9779b08ae7SAswath Govindraju	};
9879b08ae7SAswath Govindraju
9979b08ae7SAswath Govindraju	vcc3v3_io: fixedregulator-vcc3v3io {
10079b08ae7SAswath Govindraju		/* Output of TPS54334 */
10179b08ae7SAswath Govindraju		compatible = "regulator-fixed";
10279b08ae7SAswath Govindraju		regulator-name = "vcc3v3_io";
10379b08ae7SAswath Govindraju		regulator-min-microvolt = <3300000>;
10479b08ae7SAswath Govindraju		regulator-max-microvolt = <3300000>;
10579b08ae7SAswath Govindraju		regulator-always-on;
10679b08ae7SAswath Govindraju		regulator-boot-on;
10779b08ae7SAswath Govindraju		vin-supply = <&evm_12v0>;
10879b08ae7SAswath Govindraju	};
10979b08ae7SAswath Govindraju
11079b08ae7SAswath Govindraju	vdd_mmc1_sd: fixedregulator-sd {
11179b08ae7SAswath Govindraju		compatible = "regulator-fixed";
11279b08ae7SAswath Govindraju		regulator-name = "vdd_mmc1_sd";
11379b08ae7SAswath Govindraju		regulator-min-microvolt = <3300000>;
11479b08ae7SAswath Govindraju		regulator-max-microvolt = <3300000>;
11579b08ae7SAswath Govindraju		regulator-boot-on;
11679b08ae7SAswath Govindraju		enable-active-high;
11779b08ae7SAswath Govindraju		vin-supply = <&vcc3v3_io>;
11879b08ae7SAswath Govindraju		gpio = <&pca9554 4 GPIO_ACTIVE_HIGH>;
11979b08ae7SAswath Govindraju	};
120d0a064beSNishanth Menon};
1214201af25SNishanth Menon
12219a1768fSVignesh R&wkup_pmx0 {
12319a1768fSVignesh R	wkup_i2c0_pins_default: wkup-i2c0-pins-default {
12419a1768fSVignesh R		pinctrl-single,pins = <
12519a1768fSVignesh R			AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
12619a1768fSVignesh R			AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
12719a1768fSVignesh R		>;
12819a1768fSVignesh R	};
129c67f7388SKeerthy
130e5c956c4SNishanth Menon	push_button_pins_default: push-button-pins-default {
131c67f7388SKeerthy		pinctrl-single,pins = <
132c67f7388SKeerthy			AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */
133c67f7388SKeerthy			AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */
134c67f7388SKeerthy		>;
135c67f7388SKeerthy	};
13607481770SVignesh Raghavendra
137e5c956c4SNishanth Menon	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
13807481770SVignesh Raghavendra		pinctrl-single,pins = <
13907481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */
14007481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0)	 /* (U2) MCU_OSPI0_DQS */
14107481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0)  /* (U4) MCU_OSPI0_D0 */
14207481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0)  /* (U5) MCU_OSPI0_D1 */
14307481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0)  /* (T2) MCU_OSPI0_D2 */
14407481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0)  /* (T3) MCU_OSPI0_D3 */
14507481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0)  /* (T4) MCU_OSPI0_D4 */
14607481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0)  /* (T5) MCU_OSPI0_D5 */
14707481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0)  /* (R2) MCU_OSPI0_D6 */
14807481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0)  /* (R3) MCU_OSPI0_D7 */
14907481770SVignesh Raghavendra			AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
15007481770SVignesh Raghavendra		>;
15107481770SVignesh Raghavendra	};
152ca3be22dSVignesh Raghavendra
153e5c956c4SNishanth Menon	wkup_pca554_default: wkup-pca554-default {
154ca3be22dSVignesh Raghavendra		pinctrl-single,pins = <
155ca3be22dSVignesh Raghavendra			AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */
1569ba5a8a5SGrygorii Strashko		>;
1579ba5a8a5SGrygorii Strashko	};
158ca3be22dSVignesh Raghavendra
159e5c956c4SNishanth Menon	mcu_cpsw_pins_default: mcu-cpsw-pins-default {
1609ba5a8a5SGrygorii Strashko		pinctrl-single,pins = <
1619ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */
1629ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5) MCU_RGMII1_RX_CTL */
1639ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* (M2) MCU_RGMII1_TD3 */
1649ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* (M3) MCU_RGMII1_TD2 */
1659ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* (M4) MCU_RGMII1_TD1 */
1669ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* (M5) MCU_RGMII1_TD0 */
1679ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* (L2) MCU_RGMII1_RD3 */
1689ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* (L5) MCU_RGMII1_RD2 */
1699ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* (M6) MCU_RGMII1_RD1 */
1709ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* (L6) MCU_RGMII1_RD0 */
17169db725cSGrygorii Strashko			AM65X_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* (N1) MCU_RGMII1_TXC */
1729ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* (M1) MCU_RGMII1_RXC */
1739ba5a8a5SGrygorii Strashko		>;
1749ba5a8a5SGrygorii Strashko	};
1759ba5a8a5SGrygorii Strashko
176e5c956c4SNishanth Menon	mcu_mdio_pins_default: mcu-mdio1-pins-default {
1779ba5a8a5SGrygorii Strashko		pinctrl-single,pins = <
1789ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
1799ba5a8a5SGrygorii Strashko			AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
180ca3be22dSVignesh Raghavendra		>;
181ca3be22dSVignesh Raghavendra	};
18219a1768fSVignesh R};
18319a1768fSVignesh R
1843f94859fSVignesh R&main_pmx0 {
1853f94859fSVignesh R	main_uart0_pins_default: main-uart0-pins-default {
1863f94859fSVignesh R		pinctrl-single,pins = <
1873f94859fSVignesh R			AM65X_IOPAD(0x01e4, PIN_INPUT, 0)	/* (AF11) UART0_RXD */
1883f94859fSVignesh R			AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0)	/* (AE11) UART0_TXD */
1893f94859fSVignesh R			AM65X_IOPAD(0x01ec, PIN_INPUT, 0)	/* (AG11) UART0_CTSn */
1903f94859fSVignesh R			AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0)	/* (AD11) UART0_RTSn */
1913f94859fSVignesh R		>;
1923f94859fSVignesh R	};
19319a1768fSVignesh R
19419a1768fSVignesh R	main_i2c2_pins_default: main-i2c2-pins-default {
19519a1768fSVignesh R		pinctrl-single,pins = <
19619a1768fSVignesh R			AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */
19719a1768fSVignesh R			AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */
19819a1768fSVignesh R		>;
19919a1768fSVignesh R	};
2005da94b50SVignesh R
2015da94b50SVignesh R	main_spi0_pins_default: main-spi0-pins-default {
2025da94b50SVignesh R		pinctrl-single,pins = <
2035da94b50SVignesh R			AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */
2045da94b50SVignesh R			AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */
2055da94b50SVignesh R			AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */
2065da94b50SVignesh R			AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */
2075da94b50SVignesh R		>;
2085da94b50SVignesh R	};
209fd58466aSFaiz Abbas
210fd58466aSFaiz Abbas	main_mmc0_pins_default: main-mmc0-pins-default {
211fd58466aSFaiz Abbas		pinctrl-single,pins = <
212fd58466aSFaiz Abbas			AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
213fd58466aSFaiz Abbas			AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
214fd58466aSFaiz Abbas			AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
215fd58466aSFaiz Abbas			AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
216fd58466aSFaiz Abbas			AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
217fd58466aSFaiz Abbas			AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
218fd58466aSFaiz Abbas			AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
219fd58466aSFaiz Abbas			AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
220fd58466aSFaiz Abbas			AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
221fd58466aSFaiz Abbas			AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
222fd58466aSFaiz Abbas			AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
223fd58466aSFaiz Abbas			AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
224fd58466aSFaiz Abbas		>;
225fd58466aSFaiz Abbas	};
2267e7e7dd5SRoger Quadros
227e5c956c4SNishanth Menon	main_mmc1_pins_default: main-mmc1-pins-default {
22813f74fc6SFaiz Abbas		pinctrl-single,pins = <
22913f74fc6SFaiz Abbas			AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
23013f74fc6SFaiz Abbas			AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
23113f74fc6SFaiz Abbas			AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
23213f74fc6SFaiz Abbas			AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
23313f74fc6SFaiz Abbas			AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
23413f74fc6SFaiz Abbas			AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
23513f74fc6SFaiz Abbas			AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
23613f74fc6SFaiz Abbas			AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
23713f74fc6SFaiz Abbas		>;
23813f74fc6SFaiz Abbas	};
23913f74fc6SFaiz Abbas
240e5c956c4SNishanth Menon	usb1_pins_default: usb1-pins-default {
2417e7e7dd5SRoger Quadros		pinctrl-single,pins = <
2427e7e7dd5SRoger Quadros			AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
2437e7e7dd5SRoger Quadros		>;
2447e7e7dd5SRoger Quadros	};
24519a1768fSVignesh R};
24619a1768fSVignesh R
24719a1768fSVignesh R&main_pmx1 {
24819a1768fSVignesh R	main_i2c0_pins_default: main-i2c0-pins-default {
24919a1768fSVignesh R		pinctrl-single,pins = <
25019a1768fSVignesh R			AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
25119a1768fSVignesh R			AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
25219a1768fSVignesh R		>;
25319a1768fSVignesh R	};
25419a1768fSVignesh R
25519a1768fSVignesh R	main_i2c1_pins_default: main-i2c1-pins-default {
25619a1768fSVignesh R		pinctrl-single,pins = <
25719a1768fSVignesh R			AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
25819a1768fSVignesh R			AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
25919a1768fSVignesh R		>;
26019a1768fSVignesh R	};
261e577d794SVignesh R
262e577d794SVignesh R	ecap0_pins_default: ecap0-pins-default {
263e577d794SVignesh R		pinctrl-single,pins = <
264e577d794SVignesh R			AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */
265e577d794SVignesh R		>;
266e577d794SVignesh R	};
2673f94859fSVignesh R};
2683f94859fSVignesh R
2694201af25SNishanth Menon&wkup_uart0 {
2704201af25SNishanth Menon	/* Wakeup UART is used by System firmware */
2714cc34aa8SNishanth Menon	status = "reserved";
2724201af25SNishanth Menon};
2733f94859fSVignesh R
27465e8781aSAndrew Davis&mcu_uart0 {
27565e8781aSAndrew Davis	status = "okay";
27665e8781aSAndrew Davis	/* Default pinmux */
27765e8781aSAndrew Davis};
27865e8781aSAndrew Davis
2793f94859fSVignesh R&main_uart0 {
28065e8781aSAndrew Davis	status = "okay";
2813f94859fSVignesh R	pinctrl-names = "default";
2823f94859fSVignesh R	pinctrl-0 = <&main_uart0_pins_default>;
283c68272cbSLokesh Vutla	power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
2843f94859fSVignesh R};
28519a1768fSVignesh R
28619a1768fSVignesh R&wkup_i2c0 {
287c0a5ba87SAndrew Davis	status = "okay";
28819a1768fSVignesh R	pinctrl-names = "default";
28919a1768fSVignesh R	pinctrl-0 = <&wkup_i2c0_pins_default>;
29019a1768fSVignesh R	clock-frequency = <400000>;
29119a1768fSVignesh R
29219a1768fSVignesh R	pca9554: gpio@39 {
29319a1768fSVignesh R		compatible = "nxp,pca9554";
29419a1768fSVignesh R		reg = <0x39>;
29519a1768fSVignesh R		gpio-controller;
29619a1768fSVignesh R		#gpio-cells = <2>;
297ca3be22dSVignesh Raghavendra		pinctrl-names = "default";
298ca3be22dSVignesh Raghavendra		pinctrl-0 = <&wkup_pca554_default>;
299ca3be22dSVignesh Raghavendra		interrupt-parent = <&wkup_gpio0>;
300ca3be22dSVignesh Raghavendra		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
301ca3be22dSVignesh Raghavendra		interrupt-controller;
302ca3be22dSVignesh Raghavendra		#interrupt-cells = <2>;
30319a1768fSVignesh R	};
30419a1768fSVignesh R};
30519a1768fSVignesh R
306c0a5ba87SAndrew Davis&mcu_i2c0 {
307c0a5ba87SAndrew Davis	status = "okay";
308c0a5ba87SAndrew Davis	/* Default pinmux */
309c0a5ba87SAndrew Davis};
310c0a5ba87SAndrew Davis
31119a1768fSVignesh R&main_i2c0 {
312c0a5ba87SAndrew Davis	status = "okay";
31319a1768fSVignesh R	pinctrl-names = "default";
31419a1768fSVignesh R	pinctrl-0 = <&main_i2c0_pins_default>;
31519a1768fSVignesh R	clock-frequency = <400000>;
31619a1768fSVignesh R
31719a1768fSVignesh R	pca9555: gpio@21 {
31819a1768fSVignesh R		compatible = "nxp,pca9555";
31919a1768fSVignesh R		reg = <0x21>;
32019a1768fSVignesh R		gpio-controller;
32119a1768fSVignesh R		#gpio-cells = <2>;
32219a1768fSVignesh R	};
32319a1768fSVignesh R};
32419a1768fSVignesh R
32519a1768fSVignesh R&main_i2c1 {
326c0a5ba87SAndrew Davis	status = "okay";
32719a1768fSVignesh R	pinctrl-names = "default";
32819a1768fSVignesh R	pinctrl-0 = <&main_i2c1_pins_default>;
32919a1768fSVignesh R	clock-frequency = <400000>;
33019a1768fSVignesh R};
33119a1768fSVignesh R
33219a1768fSVignesh R&main_i2c2 {
333c0a5ba87SAndrew Davis	status = "okay";
33419a1768fSVignesh R	pinctrl-names = "default";
33519a1768fSVignesh R	pinctrl-0 = <&main_i2c2_pins_default>;
33619a1768fSVignesh R	clock-frequency = <400000>;
33719a1768fSVignesh R};
338e577d794SVignesh R
339e577d794SVignesh R&ecap0 {
340c1d1189eSAndrew Davis	status = "okay";
341e577d794SVignesh R	pinctrl-names = "default";
342e577d794SVignesh R	pinctrl-0 = <&ecap0_pins_default>;
343e577d794SVignesh R};
3445da94b50SVignesh R
3455da94b50SVignesh R&main_spi0 {
3461c49cbb1SAndrew Davis	status = "okay";
3475da94b50SVignesh R	pinctrl-names = "default";
3485da94b50SVignesh R	pinctrl-0 = <&main_spi0_pins_default>;
3495da94b50SVignesh R	#address-cells = <1>;
3505da94b50SVignesh R	#size-cells = <0>;
3514f76ea7bSAswath Govindraju	ti,pindir-d0-out-d1-in;
3525da94b50SVignesh R
3535da94b50SVignesh R	flash@0 {
3545da94b50SVignesh R		compatible = "jedec,spi-nor";
3555da94b50SVignesh R		reg = <0x0>;
3565da94b50SVignesh R		spi-tx-bus-width = <1>;
3575da94b50SVignesh R		spi-rx-bus-width = <1>;
3585da94b50SVignesh R		spi-max-frequency = <48000000>;
3595da94b50SVignesh R	};
3605da94b50SVignesh R};
361fd58466aSFaiz Abbas
362fd58466aSFaiz Abbas&sdhci0 {
363fd58466aSFaiz Abbas	pinctrl-names = "default";
364fd58466aSFaiz Abbas	pinctrl-0 = <&main_mmc0_pins_default>;
365fd58466aSFaiz Abbas	bus-width = <8>;
366fd58466aSFaiz Abbas	non-removable;
367fd58466aSFaiz Abbas	ti,driver-strength-ohm = <50>;
368337c4a88SFaiz Abbas	disable-wp;
369fd58466aSFaiz Abbas};
3707e7e7dd5SRoger Quadros
37113f74fc6SFaiz Abbas/*
37213f74fc6SFaiz Abbas * Because of erratas i2025 and i2026 for silicon revision 1.0, the
37313f74fc6SFaiz Abbas * SD card interface might fail. Boards with sr1.0 are recommended to
37413f74fc6SFaiz Abbas * disable sdhci1
37513f74fc6SFaiz Abbas */
37613f74fc6SFaiz Abbas&sdhci1 {
37779b08ae7SAswath Govindraju	vmmc-supply = <&vdd_mmc1_sd>;
37813f74fc6SFaiz Abbas	pinctrl-names = "default";
37913f74fc6SFaiz Abbas	pinctrl-0 = <&main_mmc1_pins_default>;
38013f74fc6SFaiz Abbas	ti,driver-strength-ohm = <50>;
38113f74fc6SFaiz Abbas	disable-wp;
38213f74fc6SFaiz Abbas};
38313f74fc6SFaiz Abbas
3847e7e7dd5SRoger Quadros&usb1 {
3857e7e7dd5SRoger Quadros	pinctrl-names = "default";
3867e7e7dd5SRoger Quadros	pinctrl-0 = <&usb1_pins_default>;
3877e7e7dd5SRoger Quadros	dr_mode = "otg";
3887e7e7dd5SRoger Quadros};
3897e7e7dd5SRoger Quadros
3907e7e7dd5SRoger Quadros&dwc3_0 {
3917e7e7dd5SRoger Quadros	status = "disabled";
3927e7e7dd5SRoger Quadros};
3937e7e7dd5SRoger Quadros
3947e7e7dd5SRoger Quadros&usb0_phy {
3957e7e7dd5SRoger Quadros	status = "disabled";
3967e7e7dd5SRoger Quadros};
397aa6eaaa2SVignesh R
398aa6eaaa2SVignesh R&tscadc0 {
399aa6eaaa2SVignesh R	adc {
400aa6eaaa2SVignesh R		ti,adc-channels = <0 1 2 3 4 5 6 7>;
401aa6eaaa2SVignesh R	};
402aa6eaaa2SVignesh R};
403aa6eaaa2SVignesh R
404aa6eaaa2SVignesh R&tscadc1 {
405aa6eaaa2SVignesh R	adc {
406aa6eaaa2SVignesh R		ti,adc-channels = <0 1 2 3 4 5 6 7>;
407aa6eaaa2SVignesh R	};
408aa6eaaa2SVignesh R};
4091b89dc93SKishon Vijay Abraham I
4101b89dc93SKishon Vijay Abraham I&serdes0 {
4111b89dc93SKishon Vijay Abraham I	status = "disabled";
4121b89dc93SKishon Vijay Abraham I};
4131b89dc93SKishon Vijay Abraham I
4141b89dc93SKishon Vijay Abraham I&serdes1 {
4151b89dc93SKishon Vijay Abraham I	status = "disabled";
4161b89dc93SKishon Vijay Abraham I};
4171b89dc93SKishon Vijay Abraham I
4181b89dc93SKishon Vijay Abraham I&pcie0_rc {
4191b89dc93SKishon Vijay Abraham I	status = "disabled";
4201b89dc93SKishon Vijay Abraham I};
4211b89dc93SKishon Vijay Abraham I
4221b89dc93SKishon Vijay Abraham I&pcie0_ep {
4231b89dc93SKishon Vijay Abraham I	status = "disabled";
4241b89dc93SKishon Vijay Abraham I};
4251b89dc93SKishon Vijay Abraham I
4261b89dc93SKishon Vijay Abraham I&pcie1_rc {
4271b89dc93SKishon Vijay Abraham I	status = "disabled";
4281b89dc93SKishon Vijay Abraham I};
4291b89dc93SKishon Vijay Abraham I
4301b89dc93SKishon Vijay Abraham I&pcie1_ep {
4311b89dc93SKishon Vijay Abraham I	status = "disabled";
4321b89dc93SKishon Vijay Abraham I};
43343570f78SSuman Anna
434f533bb82SAswath Govindraju&m_can0 {
435f533bb82SAswath Govindraju	status = "disabled";
436f533bb82SAswath Govindraju};
437f533bb82SAswath Govindraju
438f533bb82SAswath Govindraju&m_can1 {
439f533bb82SAswath Govindraju	status = "disabled";
440f533bb82SAswath Govindraju};
441f533bb82SAswath Govindraju
44243570f78SSuman Anna&mailbox0_cluster0 {
443fef84512SLokesh Vutla	interrupts = <436>;
44443570f78SSuman Anna
44543570f78SSuman Anna	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
44643570f78SSuman Anna		ti,mbox-tx = <1 0 0>;
44743570f78SSuman Anna		ti,mbox-rx = <0 0 0>;
44843570f78SSuman Anna	};
44943570f78SSuman Anna};
45043570f78SSuman Anna
45143570f78SSuman Anna&mailbox0_cluster1 {
452fef84512SLokesh Vutla	interrupts = <432>;
45343570f78SSuman Anna
45443570f78SSuman Anna	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
45543570f78SSuman Anna		ti,mbox-tx = <1 0 0>;
45643570f78SSuman Anna		ti,mbox-rx = <0 0 0>;
45743570f78SSuman Anna	};
45843570f78SSuman Anna};
45943570f78SSuman Anna
46043570f78SSuman Anna&mailbox0_cluster2 {
46143570f78SSuman Anna	status = "disabled";
46243570f78SSuman Anna};
46343570f78SSuman Anna
46443570f78SSuman Anna&mailbox0_cluster3 {
46543570f78SSuman Anna	status = "disabled";
46643570f78SSuman Anna};
46743570f78SSuman Anna
46843570f78SSuman Anna&mailbox0_cluster4 {
46943570f78SSuman Anna	status = "disabled";
47043570f78SSuman Anna};
47143570f78SSuman Anna
47243570f78SSuman Anna&mailbox0_cluster5 {
47343570f78SSuman Anna	status = "disabled";
47443570f78SSuman Anna};
47543570f78SSuman Anna
47643570f78SSuman Anna&mailbox0_cluster6 {
47743570f78SSuman Anna	status = "disabled";
47843570f78SSuman Anna};
47943570f78SSuman Anna
48043570f78SSuman Anna&mailbox0_cluster7 {
48143570f78SSuman Anna	status = "disabled";
48243570f78SSuman Anna};
48343570f78SSuman Anna
48443570f78SSuman Anna&mailbox0_cluster8 {
48543570f78SSuman Anna	status = "disabled";
48643570f78SSuman Anna};
48743570f78SSuman Anna
48843570f78SSuman Anna&mailbox0_cluster9 {
48943570f78SSuman Anna	status = "disabled";
49043570f78SSuman Anna};
49143570f78SSuman Anna
49243570f78SSuman Anna&mailbox0_cluster10 {
49343570f78SSuman Anna	status = "disabled";
49443570f78SSuman Anna};
49543570f78SSuman Anna
49643570f78SSuman Anna&mailbox0_cluster11 {
49743570f78SSuman Anna	status = "disabled";
49843570f78SSuman Anna};
49907481770SVignesh Raghavendra
50010332cd6SSuman Anna&mcu_r5fss0_core0 {
501954ec513SSuman Anna	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
502954ec513SSuman Anna			<&mcu_r5fss0_core0_memory_region>;
50310332cd6SSuman Anna	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
50410332cd6SSuman Anna};
50510332cd6SSuman Anna
50610332cd6SSuman Anna&mcu_r5fss0_core1 {
507954ec513SSuman Anna	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
508954ec513SSuman Anna			<&mcu_r5fss0_core1_memory_region>;
50910332cd6SSuman Anna	mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
51010332cd6SSuman Anna};
51110332cd6SSuman Anna
51207481770SVignesh Raghavendra&ospi0 {
51307481770SVignesh Raghavendra	pinctrl-names = "default";
51407481770SVignesh Raghavendra	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
51507481770SVignesh Raghavendra
51607481770SVignesh Raghavendra	flash@0 {
51707481770SVignesh Raghavendra		compatible = "jedec,spi-nor";
51807481770SVignesh Raghavendra		reg = <0x0>;
5197c172b30SPratyush Yadav		spi-tx-bus-width = <8>;
52007481770SVignesh Raghavendra		spi-rx-bus-width = <8>;
5217c172b30SPratyush Yadav		spi-max-frequency = <25000000>;
52207481770SVignesh Raghavendra		cdns,tshsl-ns = <60>;
52307481770SVignesh Raghavendra		cdns,tsd2d-ns = <60>;
52407481770SVignesh Raghavendra		cdns,tchsh-ns = <60>;
52507481770SVignesh Raghavendra		cdns,tslch-ns = <60>;
52607481770SVignesh Raghavendra		cdns,read-delay = <0>;
52707481770SVignesh Raghavendra	};
52807481770SVignesh Raghavendra};
529be28d4daSBenoit Parrot
5309ba5a8a5SGrygorii Strashko&mcu_cpsw {
5319ba5a8a5SGrygorii Strashko	pinctrl-names = "default";
532*0edd6d7eSAndrew Davis	pinctrl-0 = <&mcu_cpsw_pins_default>;
5339ba5a8a5SGrygorii Strashko};
5349ba5a8a5SGrygorii Strashko
5359ba5a8a5SGrygorii Strashko&davinci_mdio {
536*0edd6d7eSAndrew Davis	pinctrl-names = "default";
537*0edd6d7eSAndrew Davis	pinctrl-0 = <&mcu_mdio_pins_default>;
538*0edd6d7eSAndrew Davis
5399ba5a8a5SGrygorii Strashko	phy0: ethernet-phy@0 {
5409ba5a8a5SGrygorii Strashko		reg = <0>;
5419ba5a8a5SGrygorii Strashko		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
5429ba5a8a5SGrygorii Strashko		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
5439ba5a8a5SGrygorii Strashko	};
5449ba5a8a5SGrygorii Strashko};
5459ba5a8a5SGrygorii Strashko
5469ba5a8a5SGrygorii Strashko&cpsw_port1 {
5479ba5a8a5SGrygorii Strashko	phy-mode = "rgmii-rxid";
5489ba5a8a5SGrygorii Strashko	phy-handle = <&phy0>;
5499ba5a8a5SGrygorii Strashko};
550af03de2bSNishanth Menon
551af03de2bSNishanth Menon&mcasp0 {
552af03de2bSNishanth Menon	status = "disabled";
553af03de2bSNishanth Menon};
554af03de2bSNishanth Menon
555af03de2bSNishanth Menon&mcasp1 {
556af03de2bSNishanth Menon	status = "disabled";
557af03de2bSNishanth Menon};
558af03de2bSNishanth Menon
559af03de2bSNishanth Menon&mcasp2 {
560af03de2bSNishanth Menon	status = "disabled";
561af03de2bSNishanth Menon};
562af03de2bSNishanth Menon
563af03de2bSNishanth Menon&dss {
564af03de2bSNishanth Menon	status = "disabled";
565af03de2bSNishanth Menon};
566d49a769dSRoger Quadros
567d49a769dSRoger Quadros&icssg0_mdio {
568d49a769dSRoger Quadros	status = "disabled";
569d49a769dSRoger Quadros};
570d49a769dSRoger Quadros
571d49a769dSRoger Quadros&icssg1_mdio {
572d49a769dSRoger Quadros	status = "disabled";
573d49a769dSRoger Quadros};
574d49a769dSRoger Quadros
575d49a769dSRoger Quadros&icssg2_mdio {
576d49a769dSRoger Quadros	status = "disabled";
577d49a769dSRoger Quadros};
578