xref: /openbmc/linux/arch/arm64/boot/dts/ti/k3-am642-evm.dts (revision aca16cefdd25cdcd284212f840b70b07101f2548)
11e6550d3SDave Gerlach// SPDX-License-Identifier: GPL-2.0
21e6550d3SDave Gerlach/*
31e6550d3SDave Gerlach * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
41e6550d3SDave Gerlach */
51e6550d3SDave Gerlach
61e6550d3SDave Gerlach/dts-v1/;
71e6550d3SDave Gerlach
8354065beSKishon Vijay Abraham I#include <dt-bindings/phy/phy.h>
9354065beSKishon Vijay Abraham I#include <dt-bindings/mux/ti-serdes.h>
101e6550d3SDave Gerlach#include <dt-bindings/leds/common.h>
11985204ecSVignesh Raghavendra#include <dt-bindings/gpio/gpio.h>
12985204ecSVignesh Raghavendra#include <dt-bindings/net/ti-dp83867.h>
131e6550d3SDave Gerlach#include "k3-am642.dtsi"
141e6550d3SDave Gerlach
151e6550d3SDave Gerlach/ {
161e6550d3SDave Gerlach	compatible = "ti,am642-evm", "ti,am642";
171e6550d3SDave Gerlach	model = "Texas Instruments AM642 EVM";
181e6550d3SDave Gerlach
191e6550d3SDave Gerlach	chosen {
201e6550d3SDave Gerlach		stdout-path = "serial2:115200n8";
211e6550d3SDave Gerlach		bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
221e6550d3SDave Gerlach	};
231e6550d3SDave Gerlach
241e6550d3SDave Gerlach	memory@80000000 {
251e6550d3SDave Gerlach		device_type = "memory";
261e6550d3SDave Gerlach		/* 2G RAM */
271e6550d3SDave Gerlach		reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
281e6550d3SDave Gerlach
291e6550d3SDave Gerlach	};
301e6550d3SDave Gerlach
311e6550d3SDave Gerlach	reserved-memory {
321e6550d3SDave Gerlach		#address-cells = <2>;
331e6550d3SDave Gerlach		#size-cells = <2>;
341e6550d3SDave Gerlach		ranges;
351e6550d3SDave Gerlach
361e6550d3SDave Gerlach		secure_ddr: optee@9e800000 {
371e6550d3SDave Gerlach			reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
381e6550d3SDave Gerlach			alignment = <0x1000>;
391e6550d3SDave Gerlach			no-map;
401e6550d3SDave Gerlach		};
41d71abfccSSuman Anna
42d71abfccSSuman Anna		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
43d71abfccSSuman Anna			compatible = "shared-dma-pool";
44d71abfccSSuman Anna			reg = <0x00 0xa0000000 0x00 0x100000>;
45d71abfccSSuman Anna			no-map;
46d71abfccSSuman Anna		};
47d71abfccSSuman Anna
48d71abfccSSuman Anna		main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
49d71abfccSSuman Anna			compatible = "shared-dma-pool";
50d71abfccSSuman Anna			reg = <0x00 0xa0100000 0x00 0xf00000>;
51d71abfccSSuman Anna			no-map;
52d71abfccSSuman Anna		};
53d71abfccSSuman Anna
54d71abfccSSuman Anna		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
55d71abfccSSuman Anna			compatible = "shared-dma-pool";
56d71abfccSSuman Anna			reg = <0x00 0xa1000000 0x00 0x100000>;
57d71abfccSSuman Anna			no-map;
58d71abfccSSuman Anna		};
59d71abfccSSuman Anna
60d71abfccSSuman Anna		main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
61d71abfccSSuman Anna			compatible = "shared-dma-pool";
62d71abfccSSuman Anna			reg = <0x00 0xa1100000 0x00 0xf00000>;
63d71abfccSSuman Anna			no-map;
64d71abfccSSuman Anna		};
65d71abfccSSuman Anna
66d71abfccSSuman Anna		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
67d71abfccSSuman Anna			compatible = "shared-dma-pool";
68d71abfccSSuman Anna			reg = <0x00 0xa2000000 0x00 0x100000>;
69d71abfccSSuman Anna			no-map;
70d71abfccSSuman Anna		};
71d71abfccSSuman Anna
72d71abfccSSuman Anna		main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
73d71abfccSSuman Anna			compatible = "shared-dma-pool";
74d71abfccSSuman Anna			reg = <0x00 0xa2100000 0x00 0xf00000>;
75d71abfccSSuman Anna			no-map;
76d71abfccSSuman Anna		};
77d71abfccSSuman Anna
78d71abfccSSuman Anna		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
79d71abfccSSuman Anna			compatible = "shared-dma-pool";
80d71abfccSSuman Anna			reg = <0x00 0xa3000000 0x00 0x100000>;
81d71abfccSSuman Anna			no-map;
82d71abfccSSuman Anna		};
83d71abfccSSuman Anna
84d71abfccSSuman Anna		main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
85d71abfccSSuman Anna			compatible = "shared-dma-pool";
86d71abfccSSuman Anna			reg = <0x00 0xa3100000 0x00 0xf00000>;
87d71abfccSSuman Anna			no-map;
88d71abfccSSuman Anna		};
89d71abfccSSuman Anna
90d71abfccSSuman Anna		rtos_ipc_memory_region: ipc-memories@a5000000 {
91d71abfccSSuman Anna			reg = <0x00 0xa5000000 0x00 0x00800000>;
92d71abfccSSuman Anna			alignment = <0x1000>;
93d71abfccSSuman Anna			no-map;
94d71abfccSSuman Anna		};
951e6550d3SDave Gerlach	};
961e6550d3SDave Gerlach
9761ee5572SNishanth Menon	evm_12v0: regulator-0 {
981e6550d3SDave Gerlach		/* main DC jack */
991e6550d3SDave Gerlach		compatible = "regulator-fixed";
1001e6550d3SDave Gerlach		regulator-name = "evm_12v0";
1011e6550d3SDave Gerlach		regulator-min-microvolt = <12000000>;
1021e6550d3SDave Gerlach		regulator-max-microvolt = <12000000>;
1031e6550d3SDave Gerlach		regulator-always-on;
1041e6550d3SDave Gerlach		regulator-boot-on;
1051e6550d3SDave Gerlach	};
1061e6550d3SDave Gerlach
10761ee5572SNishanth Menon	vsys_5v0: regulator-1 {
1081e6550d3SDave Gerlach		/* output of LM5140 */
1091e6550d3SDave Gerlach		compatible = "regulator-fixed";
1101e6550d3SDave Gerlach		regulator-name = "vsys_5v0";
1111e6550d3SDave Gerlach		regulator-min-microvolt = <5000000>;
1121e6550d3SDave Gerlach		regulator-max-microvolt = <5000000>;
1131e6550d3SDave Gerlach		vin-supply = <&evm_12v0>;
1141e6550d3SDave Gerlach		regulator-always-on;
1151e6550d3SDave Gerlach		regulator-boot-on;
1161e6550d3SDave Gerlach	};
1171e6550d3SDave Gerlach
11861ee5572SNishanth Menon	vsys_3v3: regulator-2 {
1191e6550d3SDave Gerlach		/* output of LM5140 */
1201e6550d3SDave Gerlach		compatible = "regulator-fixed";
1211e6550d3SDave Gerlach		regulator-name = "vsys_3v3";
1221e6550d3SDave Gerlach		regulator-min-microvolt = <3300000>;
1231e6550d3SDave Gerlach		regulator-max-microvolt = <3300000>;
1241e6550d3SDave Gerlach		vin-supply = <&evm_12v0>;
1251e6550d3SDave Gerlach		regulator-always-on;
1261e6550d3SDave Gerlach		regulator-boot-on;
1271e6550d3SDave Gerlach	};
1281e6550d3SDave Gerlach
12961ee5572SNishanth Menon	vdd_mmc1: regulator-3 {
1301e6550d3SDave Gerlach		/* TPS2051BD */
1311e6550d3SDave Gerlach		compatible = "regulator-fixed";
1321e6550d3SDave Gerlach		regulator-name = "vdd_mmc1";
1331e6550d3SDave Gerlach		regulator-min-microvolt = <3300000>;
1341e6550d3SDave Gerlach		regulator-max-microvolt = <3300000>;
1351e6550d3SDave Gerlach		regulator-boot-on;
1361e6550d3SDave Gerlach		enable-active-high;
1371e6550d3SDave Gerlach		vin-supply = <&vsys_3v3>;
1381e6550d3SDave Gerlach		gpio = <&exp1 6 GPIO_ACTIVE_HIGH>;
1391e6550d3SDave Gerlach	};
1401e6550d3SDave Gerlach
14161ee5572SNishanth Menon	vddb: regulator-4 {
1421e6550d3SDave Gerlach		compatible = "regulator-fixed";
1431e6550d3SDave Gerlach		regulator-name = "vddb_3v3_display";
1441e6550d3SDave Gerlach		regulator-min-microvolt = <3300000>;
1451e6550d3SDave Gerlach		regulator-max-microvolt = <3300000>;
1461e6550d3SDave Gerlach		vin-supply = <&vsys_3v3>;
1471e6550d3SDave Gerlach		regulator-always-on;
1481e6550d3SDave Gerlach		regulator-boot-on;
1491e6550d3SDave Gerlach	};
1501e6550d3SDave Gerlach
151*aca16cefSNishanth Menon	vtt_supply: regulator-5 {
152*aca16cefSNishanth Menon		compatible = "regulator-fixed";
153*aca16cefSNishanth Menon		regulator-name = "vtt";
154*aca16cefSNishanth Menon		pinctrl-names = "default";
155*aca16cefSNishanth Menon		pinctrl-0 = <&ddr_vtt_pins_default>;
156*aca16cefSNishanth Menon		regulator-min-microvolt = <3300000>;
157*aca16cefSNishanth Menon		regulator-max-microvolt = <3300000>;
158*aca16cefSNishanth Menon		gpio = <&main_gpio0 12 GPIO_ACTIVE_HIGH>;
159*aca16cefSNishanth Menon		vin-supply = <&vsys_3v3>;
160*aca16cefSNishanth Menon		enable-active-high;
161*aca16cefSNishanth Menon		regulator-always-on;
162*aca16cefSNishanth Menon		regulator-boot-on;
163*aca16cefSNishanth Menon	};
164*aca16cefSNishanth Menon
1651e6550d3SDave Gerlach	leds {
1661e6550d3SDave Gerlach		compatible = "gpio-leds";
1671e6550d3SDave Gerlach
1681e6550d3SDave Gerlach		led-0 {
1691e6550d3SDave Gerlach			label = "am64-evm:red:heartbeat";
1701e6550d3SDave Gerlach			gpios = <&exp1 16 GPIO_ACTIVE_HIGH>;
1711e6550d3SDave Gerlach			linux,default-trigger = "heartbeat";
1721e6550d3SDave Gerlach			function = LED_FUNCTION_HEARTBEAT;
1731e6550d3SDave Gerlach			default-state = "off";
1741e6550d3SDave Gerlach		};
1751e6550d3SDave Gerlach	};
176985204ecSVignesh Raghavendra
177985204ecSVignesh Raghavendra	mdio_mux: mux-controller {
178985204ecSVignesh Raghavendra		compatible = "gpio-mux";
179985204ecSVignesh Raghavendra		#mux-control-cells = <0>;
180985204ecSVignesh Raghavendra
181985204ecSVignesh Raghavendra		mux-gpios = <&exp1 12 GPIO_ACTIVE_HIGH>;
182985204ecSVignesh Raghavendra	};
183985204ecSVignesh Raghavendra
184985204ecSVignesh Raghavendra	mdio-mux-1 {
185985204ecSVignesh Raghavendra		compatible = "mdio-mux-multiplexer";
186985204ecSVignesh Raghavendra		mux-controls = <&mdio_mux>;
187985204ecSVignesh Raghavendra		mdio-parent-bus = <&cpsw3g_mdio>;
188985204ecSVignesh Raghavendra		#address-cells = <1>;
189985204ecSVignesh Raghavendra		#size-cells = <0>;
190985204ecSVignesh Raghavendra
191985204ecSVignesh Raghavendra		mdio@1 {
192985204ecSVignesh Raghavendra			reg = <0x1>;
193985204ecSVignesh Raghavendra			#address-cells = <1>;
194985204ecSVignesh Raghavendra			#size-cells = <0>;
195985204ecSVignesh Raghavendra
196985204ecSVignesh Raghavendra			cpsw3g_phy3: ethernet-phy@3 {
197985204ecSVignesh Raghavendra				reg = <3>;
198985204ecSVignesh Raghavendra			};
199985204ecSVignesh Raghavendra		};
200985204ecSVignesh Raghavendra	};
2012f474da9SAswath Govindraju
2022f474da9SAswath Govindraju	transceiver1: can-phy0 {
2032f474da9SAswath Govindraju		compatible = "ti,tcan1042";
2042f474da9SAswath Govindraju		#phy-cells = <0>;
2052f474da9SAswath Govindraju		max-bitrate = <5000000>;
2062f474da9SAswath Govindraju		standby-gpios = <&exp1 8 GPIO_ACTIVE_HIGH>;
2072f474da9SAswath Govindraju	};
2082f474da9SAswath Govindraju
2092f474da9SAswath Govindraju	transceiver2: can-phy1 {
2102f474da9SAswath Govindraju		compatible = "ti,tcan1042";
2112f474da9SAswath Govindraju		#phy-cells = <0>;
2122f474da9SAswath Govindraju		max-bitrate = <5000000>;
2132f474da9SAswath Govindraju		standby-gpios = <&exp1 9 GPIO_ACTIVE_HIGH>;
2142f474da9SAswath Govindraju	};
2151e6550d3SDave Gerlach};
2161e6550d3SDave Gerlach
2171e6550d3SDave Gerlach&main_pmx0 {
2181e6550d3SDave Gerlach	main_mmc1_pins_default: main-mmc1-pins-default {
2191e6550d3SDave Gerlach		pinctrl-single,pins = <
2201e6550d3SDave Gerlach			AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */
2211e6550d3SDave Gerlach			AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */
2221e6550d3SDave Gerlach			AM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0) /* (K21) MMC1_DAT0 */
2231e6550d3SDave Gerlach			AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /* (L21) MMC1_DAT1 */
2241e6550d3SDave Gerlach			AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /* (K19) MMC1_DAT2 */
2251e6550d3SDave Gerlach			AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */
2261e6550d3SDave Gerlach			AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */
2271e6550d3SDave Gerlach			AM64X_IOPAD(0x029c, PIN_INPUT, 0) /* (C20) MMC1_SDWP */
2281e6550d3SDave Gerlach			AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* MMC1_CLKLB */
2291e6550d3SDave Gerlach		>;
2301e6550d3SDave Gerlach	};
2311e6550d3SDave Gerlach
232e3e1d9abSNishanth Menon	main_uart1_pins_default: main-uart1-pins-default {
233e3e1d9abSNishanth Menon		pinctrl-single,pins = <
234e3e1d9abSNishanth Menon			AM64X_IOPAD(0x0248, PIN_INPUT, 0)		/* (D16) UART1_CTSn */
235e3e1d9abSNishanth Menon			AM64X_IOPAD(0x024c, PIN_OUTPUT, 0)		/* (E16) UART1_RTSn */
236e3e1d9abSNishanth Menon			AM64X_IOPAD(0x0240, PIN_INPUT, 0)		/* (E15) UART1_RXD */
237e3e1d9abSNishanth Menon			AM64X_IOPAD(0x0244, PIN_OUTPUT, 0)		/* (E14) UART1_TXD */
238e3e1d9abSNishanth Menon		>;
239e3e1d9abSNishanth Menon	};
240e3e1d9abSNishanth Menon
2411e6550d3SDave Gerlach	main_uart0_pins_default: main-uart0-pins-default {
2421e6550d3SDave Gerlach		pinctrl-single,pins = <
2431e6550d3SDave Gerlach			AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */
2441e6550d3SDave Gerlach			AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */
2451e6550d3SDave Gerlach			AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */
2461e6550d3SDave Gerlach			AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */
2471e6550d3SDave Gerlach		>;
2481e6550d3SDave Gerlach	};
2491e6550d3SDave Gerlach
2504fb6c046SAswath Govindraju	main_spi0_pins_default: main-spi0-pins-default {
2514fb6c046SAswath Govindraju		pinctrl-single,pins = <
2524fb6c046SAswath Govindraju			AM64X_IOPAD(0x0210, PIN_INPUT, 0) /* (D13) SPI0_CLK */
2534fb6c046SAswath Govindraju			AM64X_IOPAD(0x0208, PIN_OUTPUT, 0) /* (D12) SPI0_CS0 */
2544fb6c046SAswath Govindraju			AM64X_IOPAD(0x0214, PIN_OUTPUT, 0) /* (A13) SPI0_D0 */
2554fb6c046SAswath Govindraju			AM64X_IOPAD(0x0218, PIN_INPUT, 0) /* (A14) SPI0_D1 */
2564fb6c046SAswath Govindraju		>;
2574fb6c046SAswath Govindraju	};
2584fb6c046SAswath Govindraju
259cf3b25bcSNishanth Menon	main_i2c0_pins_default: main-i2c0-pins-default {
260cf3b25bcSNishanth Menon		pinctrl-single,pins = <
261cf3b25bcSNishanth Menon			AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */
262cf3b25bcSNishanth Menon			AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */
263cf3b25bcSNishanth Menon		>;
264cf3b25bcSNishanth Menon	};
265cf3b25bcSNishanth Menon
2661e6550d3SDave Gerlach	main_i2c1_pins_default: main-i2c1-pins-default {
2671e6550d3SDave Gerlach		pinctrl-single,pins = <
2681e6550d3SDave Gerlach			AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */
2691e6550d3SDave Gerlach			AM64X_IOPAD(0x026c, PIN_INPUT_PULLUP, 0) /* (B19) I2C1_SDA */
2701e6550d3SDave Gerlach		>;
2711e6550d3SDave Gerlach	};
272985204ecSVignesh Raghavendra
273985204ecSVignesh Raghavendra	mdio1_pins_default: mdio1-pins-default {
274985204ecSVignesh Raghavendra		pinctrl-single,pins = <
275985204ecSVignesh Raghavendra			AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */
276985204ecSVignesh Raghavendra			AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
277985204ecSVignesh Raghavendra		>;
278985204ecSVignesh Raghavendra	};
279985204ecSVignesh Raghavendra
280985204ecSVignesh Raghavendra	rgmii1_pins_default: rgmii1-pins-default {
281985204ecSVignesh Raghavendra		pinctrl-single,pins = <
282985204ecSVignesh Raghavendra			AM64X_IOPAD(0x01cc, PIN_INPUT, 4) /* (W5) PRG0_PRU1_GPO7.RGMII1_RD0 */
283985204ecSVignesh Raghavendra			AM64X_IOPAD(0x01d4, PIN_INPUT, 4) /* (Y5) PRG0_PRU1_GPO9.RGMII1_RD1 */
284985204ecSVignesh Raghavendra			AM64X_IOPAD(0x01d8, PIN_INPUT, 4) /* (V6) PRG0_PRU1_GPO10.RGMII1_RD2 */
285985204ecSVignesh Raghavendra			AM64X_IOPAD(0x01f4, PIN_INPUT, 4) /* (V5) PRG0_PRU1_GPO17.RGMII1_RD3 */
286985204ecSVignesh Raghavendra			AM64X_IOPAD(0x0188, PIN_INPUT, 4) /* (AA5) PRG0_PRU0_GPO10.RGMII1_RXC */
287985204ecSVignesh Raghavendra			AM64X_IOPAD(0x0184, PIN_INPUT, 4) /* (W6) PRG0_PRU0_GPO9.RGMII1_RX_CTL */
288985204ecSVignesh Raghavendra			AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */
289985204ecSVignesh Raghavendra			AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */
290985204ecSVignesh Raghavendra			AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */
291985204ecSVignesh Raghavendra			AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */
292985204ecSVignesh Raghavendra			AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */
293985204ecSVignesh Raghavendra			AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */
294985204ecSVignesh Raghavendra		>;
295985204ecSVignesh Raghavendra	};
296985204ecSVignesh Raghavendra
297985204ecSVignesh Raghavendra       rgmii2_pins_default: rgmii2-pins-default {
298985204ecSVignesh Raghavendra		pinctrl-single,pins = <
299985204ecSVignesh Raghavendra			AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */
300985204ecSVignesh Raghavendra			AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */
301985204ecSVignesh Raghavendra			AM64X_IOPAD(0x0110, PIN_INPUT, 4) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */
302985204ecSVignesh Raghavendra			AM64X_IOPAD(0x0114, PIN_INPUT, 4) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */
303985204ecSVignesh Raghavendra			AM64X_IOPAD(0x0120, PIN_INPUT, 4) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */
304985204ecSVignesh Raghavendra			AM64X_IOPAD(0x0118, PIN_INPUT, 4) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */
305985204ecSVignesh Raghavendra			AM64X_IOPAD(0x0134, PIN_OUTPUT, 4) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */
306985204ecSVignesh Raghavendra			AM64X_IOPAD(0x0138, PIN_OUTPUT, 4) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */
307985204ecSVignesh Raghavendra			AM64X_IOPAD(0x013c, PIN_OUTPUT, 4) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */
308985204ecSVignesh Raghavendra			AM64X_IOPAD(0x0140, PIN_OUTPUT, 4) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */
309985204ecSVignesh Raghavendra			AM64X_IOPAD(0x0148, PIN_OUTPUT, 4) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */
310985204ecSVignesh Raghavendra			AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */
311985204ecSVignesh Raghavendra		>;
312985204ecSVignesh Raghavendra	};
31304a80a75SAswath Govindraju
31404a80a75SAswath Govindraju	main_usb0_pins_default: main-usb0-pins-default {
31504a80a75SAswath Govindraju		pinctrl-single,pins = <
31604a80a75SAswath Govindraju			AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
31704a80a75SAswath Govindraju		>;
31804a80a75SAswath Govindraju	};
319e4e4e894SVignesh Raghavendra
320e4e4e894SVignesh Raghavendra	ospi0_pins_default: ospi0-pins-default {
321e4e4e894SVignesh Raghavendra		pinctrl-single,pins = <
322e4e4e894SVignesh Raghavendra			AM64X_IOPAD(0x0000, PIN_OUTPUT, 0) /* (N20) OSPI0_CLK */
323e4e4e894SVignesh Raghavendra			AM64X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (L19) OSPI0_CSn0 */
324e4e4e894SVignesh Raghavendra			AM64X_IOPAD(0x000c, PIN_INPUT, 0) /* (M19) OSPI0_D0 */
325e4e4e894SVignesh Raghavendra			AM64X_IOPAD(0x0010, PIN_INPUT, 0) /* (M18) OSPI0_D1 */
326e4e4e894SVignesh Raghavendra			AM64X_IOPAD(0x0014, PIN_INPUT, 0) /* (M20) OSPI0_D2 */
327e4e4e894SVignesh Raghavendra			AM64X_IOPAD(0x0018, PIN_INPUT, 0) /* (M21) OSPI0_D3 */
328e4e4e894SVignesh Raghavendra			AM64X_IOPAD(0x001c, PIN_INPUT, 0) /* (P21) OSPI0_D4 */
329e4e4e894SVignesh Raghavendra			AM64X_IOPAD(0x0020, PIN_INPUT, 0) /* (P20) OSPI0_D5 */
330e4e4e894SVignesh Raghavendra			AM64X_IOPAD(0x0024, PIN_INPUT, 0) /* (N18) OSPI0_D6 */
331e4e4e894SVignesh Raghavendra			AM64X_IOPAD(0x0028, PIN_INPUT, 0) /* (M17) OSPI0_D7 */
332e4e4e894SVignesh Raghavendra			AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */
333e4e4e894SVignesh Raghavendra		>;
334e4e4e894SVignesh Raghavendra	};
3358032affdSLokesh Vutla
3368032affdSLokesh Vutla	main_ecap0_pins_default: main-ecap0-pins-default {
3378032affdSLokesh Vutla		pinctrl-single,pins = <
3388032affdSLokesh Vutla			AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */
3398032affdSLokesh Vutla		>;
3408032affdSLokesh Vutla	};
3412f474da9SAswath Govindraju
3422f474da9SAswath Govindraju	main_mcan0_pins_default: main-mcan0-pins-default {
3432f474da9SAswath Govindraju		pinctrl-single,pins = <
3442f474da9SAswath Govindraju			AM64X_IOPAD(0x0254, PIN_INPUT, 0) /* (B17) MCAN0_RX */
3452f474da9SAswath Govindraju			AM64X_IOPAD(0x0250, PIN_OUTPUT, 0) /* (A17) MCAN0_TX */
3462f474da9SAswath Govindraju		>;
3472f474da9SAswath Govindraju	};
3482f474da9SAswath Govindraju
3492f474da9SAswath Govindraju	main_mcan1_pins_default: main-mcan1-pins-default {
3502f474da9SAswath Govindraju		pinctrl-single,pins = <
3512f474da9SAswath Govindraju			AM64X_IOPAD(0x025c, PIN_INPUT, 0) /* (D17) MCAN1_RX */
3522f474da9SAswath Govindraju			AM64X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (C17) MCAN1_TX */
3532f474da9SAswath Govindraju		>;
3542f474da9SAswath Govindraju	};
355*aca16cefSNishanth Menon
356*aca16cefSNishanth Menon	ddr_vtt_pins_default: ddr-vtt-pins-default {
357*aca16cefSNishanth Menon		pinctrl-single,pins = <
358*aca16cefSNishanth Menon			AM64X_IOPAD(0x0030, PIN_OUTPUT_PULLUP, 7) /* (L18) OSPI0_CSN1.GPIO0_12 */
359*aca16cefSNishanth Menon		>;
360*aca16cefSNishanth Menon	};
3611e6550d3SDave Gerlach};
3621e6550d3SDave Gerlach
3631e6550d3SDave Gerlach&main_uart0 {
364dacf4705SAndrew Davis	status = "okay";
3651e6550d3SDave Gerlach	pinctrl-names = "default";
3661e6550d3SDave Gerlach	pinctrl-0 = <&main_uart0_pins_default>;
3671e6550d3SDave Gerlach};
3681e6550d3SDave Gerlach
3691e6550d3SDave Gerlach/* main_uart1 is reserved for firmware usage */
3701e6550d3SDave Gerlach&main_uart1 {
3711e6550d3SDave Gerlach	status = "reserved";
372e3e1d9abSNishanth Menon	pinctrl-names = "default";
373e3e1d9abSNishanth Menon	pinctrl-0 = <&main_uart1_pins_default>;
3741e6550d3SDave Gerlach};
3751e6550d3SDave Gerlach
376cf3b25bcSNishanth Menon&main_i2c0 {
377cf3b25bcSNishanth Menon	status = "okay";
378cf3b25bcSNishanth Menon	pinctrl-names = "default";
379cf3b25bcSNishanth Menon	pinctrl-0 = <&main_i2c0_pins_default>;
380cf3b25bcSNishanth Menon	clock-frequency = <400000>;
381cf3b25bcSNishanth Menon
382cf3b25bcSNishanth Menon	eeprom@50 {
383cf3b25bcSNishanth Menon		/* AT24CM01 */
384cf3b25bcSNishanth Menon		compatible = "atmel,24c1024";
385cf3b25bcSNishanth Menon		reg = <0x50>;
386cf3b25bcSNishanth Menon	};
387cf3b25bcSNishanth Menon};
388cf3b25bcSNishanth Menon
3891e6550d3SDave Gerlach&main_i2c1 {
390b80f75d8SAndrew Davis	status = "okay";
3911e6550d3SDave Gerlach	pinctrl-names = "default";
3921e6550d3SDave Gerlach	pinctrl-0 = <&main_i2c1_pins_default>;
3931e6550d3SDave Gerlach	clock-frequency = <400000>;
3941e6550d3SDave Gerlach
3951e6550d3SDave Gerlach	exp1: gpio@22 {
3961e6550d3SDave Gerlach		compatible = "ti,tca6424";
3971e6550d3SDave Gerlach		reg = <0x22>;
3981e6550d3SDave Gerlach		gpio-controller;
3991e6550d3SDave Gerlach		#gpio-cells = <2>;
4001e6550d3SDave Gerlach		gpio-line-names = "GPIO_eMMC_RSTn", "CAN_MUX_SEL",
4011e6550d3SDave Gerlach				  "GPIO_CPSW1_RST", "GPIO_RGMII1_RST",
4021e6550d3SDave Gerlach				  "GPIO_RGMII2_RST", "GPIO_PCIe_RST_OUT",
4031e6550d3SDave Gerlach				  "MMC1_SD_EN", "FSI_FET_SEL",
4041e6550d3SDave Gerlach				  "MCAN0_STB_3V3", "MCAN1_STB_3V3",
4051e6550d3SDave Gerlach				  "CPSW_FET_SEL", "CPSW_FET2_SEL",
4061e6550d3SDave Gerlach				  "PRG1_RGMII2_FET_SEL", "TEST_GPIO2",
4071e6550d3SDave Gerlach				  "GPIO_OLED_RESETn", "VPP_LDO_EN",
4081e6550d3SDave Gerlach				  "TEST_LED1", "TP92", "TP90", "TP88",
4091e6550d3SDave Gerlach				  "TP87", "TP86", "TP89", "TP91";
4101e6550d3SDave Gerlach	};
4111e6550d3SDave Gerlach
4121e6550d3SDave Gerlach	/* osd9616p0899-10 */
4131e6550d3SDave Gerlach	display@3c {
4141e6550d3SDave Gerlach		compatible = "solomon,ssd1306fb-i2c";
4151e6550d3SDave Gerlach		reg = <0x3c>;
4161e6550d3SDave Gerlach		reset-gpios = <&exp1 14 GPIO_ACTIVE_LOW>;
4171e6550d3SDave Gerlach		vbat-supply = <&vddb>;
4181e6550d3SDave Gerlach		solomon,height = <16>;
4191e6550d3SDave Gerlach		solomon,width = <96>;
4201e6550d3SDave Gerlach		solomon,com-seq;
4211e6550d3SDave Gerlach		solomon,com-invdir;
4221e6550d3SDave Gerlach		solomon,page-offset = <0>;
4231e6550d3SDave Gerlach		solomon,prechargep1 = <2>;
4241e6550d3SDave Gerlach		solomon,prechargep2 = <13>;
4251e6550d3SDave Gerlach	};
4261e6550d3SDave Gerlach};
4271e6550d3SDave Gerlach
428d5a4d541SAswath Govindraju/* mcu_gpio0 is reserved for mcu firmware usage */
429d5a4d541SAswath Govindraju&mcu_gpio0 {
430d5a4d541SAswath Govindraju	status = "reserved";
431d5a4d541SAswath Govindraju};
432d5a4d541SAswath Govindraju
4334fb6c046SAswath Govindraju&main_spi0 {
43479d4aa62SAndrew Davis	status = "okay";
4354fb6c046SAswath Govindraju	pinctrl-names = "default";
4364fb6c046SAswath Govindraju	pinctrl-0 = <&main_spi0_pins_default>;
437d3f1b155SAswath Govindraju	ti,pindir-d0-out-d1-in;
4384fb6c046SAswath Govindraju	eeprom@0 {
4394fb6c046SAswath Govindraju		compatible = "microchip,93lc46b";
4404fb6c046SAswath Govindraju		reg = <0>;
4414fb6c046SAswath Govindraju		spi-max-frequency = <1000000>;
4424fb6c046SAswath Govindraju		spi-cs-high;
4434fb6c046SAswath Govindraju		data-size = <16>;
4444fb6c046SAswath Govindraju	};
4454fb6c046SAswath Govindraju};
4464fb6c046SAswath Govindraju
4471e6550d3SDave Gerlach&sdhci0 {
4481e6550d3SDave Gerlach	/* emmc */
4491e6550d3SDave Gerlach	bus-width = <8>;
4501e6550d3SDave Gerlach	non-removable;
4511e6550d3SDave Gerlach	ti,driver-strength-ohm = <50>;
4521e6550d3SDave Gerlach	disable-wp;
4531e6550d3SDave Gerlach};
4541e6550d3SDave Gerlach
4551e6550d3SDave Gerlach&sdhci1 {
4561e6550d3SDave Gerlach	/* SD/MMC */
4571e6550d3SDave Gerlach	vmmc-supply = <&vdd_mmc1>;
4581e6550d3SDave Gerlach	pinctrl-names = "default";
4591e6550d3SDave Gerlach	bus-width = <4>;
4601e6550d3SDave Gerlach	pinctrl-0 = <&main_mmc1_pins_default>;
4611e6550d3SDave Gerlach	ti,driver-strength-ohm = <50>;
4621e6550d3SDave Gerlach	disable-wp;
4631e6550d3SDave Gerlach};
464985204ecSVignesh Raghavendra
46504a80a75SAswath Govindraju&usbss0 {
46604a80a75SAswath Govindraju	ti,vbus-divider;
46704a80a75SAswath Govindraju	ti,usb2-only;
46804a80a75SAswath Govindraju};
46904a80a75SAswath Govindraju
47004a80a75SAswath Govindraju&usb0 {
47104a80a75SAswath Govindraju	dr_mode = "otg";
47204a80a75SAswath Govindraju	maximum-speed = "high-speed";
47304a80a75SAswath Govindraju	pinctrl-names = "default";
47404a80a75SAswath Govindraju	pinctrl-0 = <&main_usb0_pins_default>;
47504a80a75SAswath Govindraju};
47604a80a75SAswath Govindraju
477985204ecSVignesh Raghavendra&cpsw3g {
478985204ecSVignesh Raghavendra	pinctrl-names = "default";
479aa62d661SAndrew Davis	pinctrl-0 = <&rgmii1_pins_default
480985204ecSVignesh Raghavendra		     &rgmii2_pins_default>;
481985204ecSVignesh Raghavendra};
482985204ecSVignesh Raghavendra
483985204ecSVignesh Raghavendra&cpsw_port1 {
484985204ecSVignesh Raghavendra	phy-mode = "rgmii-rxid";
485985204ecSVignesh Raghavendra	phy-handle = <&cpsw3g_phy0>;
486985204ecSVignesh Raghavendra};
487985204ecSVignesh Raghavendra
488985204ecSVignesh Raghavendra&cpsw_port2 {
489985204ecSVignesh Raghavendra	phy-mode = "rgmii-rxid";
490985204ecSVignesh Raghavendra	phy-handle = <&cpsw3g_phy3>;
491985204ecSVignesh Raghavendra};
492985204ecSVignesh Raghavendra
493985204ecSVignesh Raghavendra&cpsw3g_mdio {
494f572888bSAndrew Davis	status = "okay";
495aa62d661SAndrew Davis	pinctrl-names = "default";
496aa62d661SAndrew Davis	pinctrl-0 = <&mdio1_pins_default>;
497aa62d661SAndrew Davis
498985204ecSVignesh Raghavendra	cpsw3g_phy0: ethernet-phy@0 {
499985204ecSVignesh Raghavendra		reg = <0>;
500985204ecSVignesh Raghavendra		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
501985204ecSVignesh Raghavendra		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
502985204ecSVignesh Raghavendra	};
503985204ecSVignesh Raghavendra};
504fad4e18fSVignesh Raghavendra
505fad4e18fSVignesh Raghavendra&tscadc0 {
506fad4e18fSVignesh Raghavendra	/* ADC is reserved for R5 usage */
507fad4e18fSVignesh Raghavendra	status = "reserved";
508fad4e18fSVignesh Raghavendra};
509e4e4e894SVignesh Raghavendra
510e4e4e894SVignesh Raghavendra&ospi0 {
511e4e4e894SVignesh Raghavendra	pinctrl-names = "default";
512e4e4e894SVignesh Raghavendra	pinctrl-0 = <&ospi0_pins_default>;
513e4e4e894SVignesh Raghavendra
514e4e4e894SVignesh Raghavendra	flash@0 {
515e4e4e894SVignesh Raghavendra		compatible = "jedec,spi-nor";
516e4e4e894SVignesh Raghavendra		reg = <0x0>;
517e4e4e894SVignesh Raghavendra		spi-tx-bus-width = <8>;
518e4e4e894SVignesh Raghavendra		spi-rx-bus-width = <8>;
519e4e4e894SVignesh Raghavendra		spi-max-frequency = <25000000>;
520e4e4e894SVignesh Raghavendra		cdns,tshsl-ns = <60>;
521e4e4e894SVignesh Raghavendra		cdns,tsd2d-ns = <60>;
522e4e4e894SVignesh Raghavendra		cdns,tchsh-ns = <60>;
523e4e4e894SVignesh Raghavendra		cdns,tslch-ns = <60>;
524e4e4e894SVignesh Raghavendra		cdns,read-delay = <4>;
525e4e4e894SVignesh Raghavendra	};
526e4e4e894SVignesh Raghavendra};
5277dd84752SSuman Anna
5287dd84752SSuman Anna&mailbox0_cluster2 {
5297dd84752SSuman Anna	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
5307dd84752SSuman Anna		ti,mbox-rx = <0 0 2>;
5317dd84752SSuman Anna		ti,mbox-tx = <1 0 2>;
5327dd84752SSuman Anna	};
5337dd84752SSuman Anna
5347dd84752SSuman Anna	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
5357dd84752SSuman Anna		ti,mbox-rx = <2 0 2>;
5367dd84752SSuman Anna		ti,mbox-tx = <3 0 2>;
5377dd84752SSuman Anna	};
5387dd84752SSuman Anna};
5397dd84752SSuman Anna
5407dd84752SSuman Anna&mailbox0_cluster3 {
5417dd84752SSuman Anna	status = "disabled";
5427dd84752SSuman Anna};
5437dd84752SSuman Anna
5447dd84752SSuman Anna&mailbox0_cluster4 {
5457dd84752SSuman Anna	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
5467dd84752SSuman Anna		ti,mbox-rx = <0 0 2>;
5477dd84752SSuman Anna		ti,mbox-tx = <1 0 2>;
5487dd84752SSuman Anna	};
5497dd84752SSuman Anna
5507dd84752SSuman Anna	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
5517dd84752SSuman Anna		ti,mbox-rx = <2 0 2>;
5527dd84752SSuman Anna		ti,mbox-tx = <3 0 2>;
5537dd84752SSuman Anna	};
5547dd84752SSuman Anna};
5557dd84752SSuman Anna
5567dd84752SSuman Anna&mailbox0_cluster5 {
5577dd84752SSuman Anna	status = "disabled";
5587dd84752SSuman Anna};
5597dd84752SSuman Anna
5607dd84752SSuman Anna&mailbox0_cluster6 {
5617dd84752SSuman Anna	mbox_m4_0: mbox-m4-0 {
5627dd84752SSuman Anna		ti,mbox-rx = <0 0 2>;
5637dd84752SSuman Anna		ti,mbox-tx = <1 0 2>;
5647dd84752SSuman Anna	};
5657dd84752SSuman Anna};
5667dd84752SSuman Anna
5677dd84752SSuman Anna&mailbox0_cluster7 {
5687dd84752SSuman Anna	status = "disabled";
5697dd84752SSuman Anna};
570354065beSKishon Vijay Abraham I
5710afadba4SSuman Anna&main_r5fss0_core0 {
5720afadba4SSuman Anna	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
573d71abfccSSuman Anna	memory-region = <&main_r5fss0_core0_dma_memory_region>,
574d71abfccSSuman Anna			<&main_r5fss0_core0_memory_region>;
5750afadba4SSuman Anna};
5760afadba4SSuman Anna
5770afadba4SSuman Anna&main_r5fss0_core1 {
5780afadba4SSuman Anna	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
579d71abfccSSuman Anna	memory-region = <&main_r5fss0_core1_dma_memory_region>,
580d71abfccSSuman Anna			<&main_r5fss0_core1_memory_region>;
5810afadba4SSuman Anna};
5820afadba4SSuman Anna
5830afadba4SSuman Anna&main_r5fss1_core0 {
5840afadba4SSuman Anna	mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
585d71abfccSSuman Anna	memory-region = <&main_r5fss1_core0_dma_memory_region>,
586d71abfccSSuman Anna			<&main_r5fss1_core0_memory_region>;
5870afadba4SSuman Anna};
5880afadba4SSuman Anna
5890afadba4SSuman Anna&main_r5fss1_core1 {
5900afadba4SSuman Anna	mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
591d71abfccSSuman Anna	memory-region = <&main_r5fss1_core1_dma_memory_region>,
592d71abfccSSuman Anna			<&main_r5fss1_core1_memory_region>;
5930afadba4SSuman Anna};
5940afadba4SSuman Anna
595354065beSKishon Vijay Abraham I&serdes_ln_ctrl {
596354065beSKishon Vijay Abraham I	idle-states = <AM64_SERDES0_LANE0_PCIE0>;
597354065beSKishon Vijay Abraham I};
598354065beSKishon Vijay Abraham I
599354065beSKishon Vijay Abraham I&serdes0 {
600354065beSKishon Vijay Abraham I	serdes0_pcie_link: phy@0 {
601354065beSKishon Vijay Abraham I		reg = <0>;
602354065beSKishon Vijay Abraham I		cdns,num-lanes = <1>;
603354065beSKishon Vijay Abraham I		#phy-cells = <0>;
604354065beSKishon Vijay Abraham I		cdns,phy-type = <PHY_TYPE_PCIE>;
605354065beSKishon Vijay Abraham I		resets = <&serdes_wiz0 1>;
606354065beSKishon Vijay Abraham I	};
607354065beSKishon Vijay Abraham I};
608354065beSKishon Vijay Abraham I
609354065beSKishon Vijay Abraham I&pcie0_rc {
6103e21ec28SAndrew Davis	status = "okay";
611354065beSKishon Vijay Abraham I	reset-gpios = <&exp1 5 GPIO_ACTIVE_HIGH>;
612354065beSKishon Vijay Abraham I	phys = <&serdes0_pcie_link>;
613354065beSKishon Vijay Abraham I	phy-names = "pcie-phy";
614354065beSKishon Vijay Abraham I	num-lanes = <1>;
615354065beSKishon Vijay Abraham I};
616354065beSKishon Vijay Abraham I
617354065beSKishon Vijay Abraham I&pcie0_ep {
618354065beSKishon Vijay Abraham I	phys = <&serdes0_pcie_link>;
619354065beSKishon Vijay Abraham I	phy-names = "pcie-phy";
620354065beSKishon Vijay Abraham I	num-lanes = <1>;
621354065beSKishon Vijay Abraham I};
6228032affdSLokesh Vutla
6238032affdSLokesh Vutla&ecap0 {
624dcac8eaaSAndrew Davis	status = "okay";
6258032affdSLokesh Vutla	/* PWM is available on Pin 1 of header J12 */
6268032affdSLokesh Vutla	pinctrl-names = "default";
6278032affdSLokesh Vutla	pinctrl-0 = <&main_ecap0_pins_default>;
6288032affdSLokesh Vutla};
6298032affdSLokesh Vutla
6302f474da9SAswath Govindraju&main_mcan0 {
6314a579887SAndrew Davis	status = "okay";
6322f474da9SAswath Govindraju	pinctrl-names = "default";
6332f474da9SAswath Govindraju	pinctrl-0 = <&main_mcan0_pins_default>;
6342f474da9SAswath Govindraju	phys = <&transceiver1>;
6352f474da9SAswath Govindraju};
6362f474da9SAswath Govindraju
6372f474da9SAswath Govindraju&main_mcan1 {
6384a579887SAndrew Davis	status = "okay";
6392f474da9SAswath Govindraju	pinctrl-names = "default";
6402f474da9SAswath Govindraju	pinctrl-0 = <&main_mcan1_pins_default>;
6412f474da9SAswath Govindraju	phys = <&transceiver2>;
6422f474da9SAswath Govindraju};
643