xref: /openbmc/linux/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts (revision 24f68eb5bf14a74027946970a18bc902e19d986a)
1*cdf46cdbSAndy Yan// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*cdf46cdbSAndy Yan
3*cdf46cdbSAndy Yan/*
4*cdf46cdbSAndy Yan * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
5*cdf46cdbSAndy Yan * Copyright (c) 2022 EmbedFire <embedfire@embedfire.com>
6*cdf46cdbSAndy Yan */
7*cdf46cdbSAndy Yan
8*cdf46cdbSAndy Yan/dts-v1/;
9*cdf46cdbSAndy Yan#include <dt-bindings/gpio/gpio.h>
10*cdf46cdbSAndy Yan#include <dt-bindings/leds/common.h>
11*cdf46cdbSAndy Yan#include <dt-bindings/pinctrl/rockchip.h>
12*cdf46cdbSAndy Yan#include <dt-bindings/soc/rockchip,vop2.h>
13*cdf46cdbSAndy Yan#include "rk3568.dtsi"
14*cdf46cdbSAndy Yan
15*cdf46cdbSAndy Yan/ {
16*cdf46cdbSAndy Yan	model = "EmbedFire LubanCat 2";
17*cdf46cdbSAndy Yan	compatible = "embedfire,lubancat-2", "rockchip,rk3568";
18*cdf46cdbSAndy Yan
19*cdf46cdbSAndy Yan	aliases {
20*cdf46cdbSAndy Yan		ethernet0 = &gmac0;
21*cdf46cdbSAndy Yan		ethernet1 = &gmac1;
22*cdf46cdbSAndy Yan		mmc0 = &sdmmc0;
23*cdf46cdbSAndy Yan		mmc1 = &sdhci;
24*cdf46cdbSAndy Yan	};
25*cdf46cdbSAndy Yan
26*cdf46cdbSAndy Yan	chosen: chosen {
27*cdf46cdbSAndy Yan		stdout-path = "serial2:1500000n8";
28*cdf46cdbSAndy Yan	};
29*cdf46cdbSAndy Yan
30*cdf46cdbSAndy Yan	leds {
31*cdf46cdbSAndy Yan		compatible = "gpio-leds";
32*cdf46cdbSAndy Yan
33*cdf46cdbSAndy Yan		user_led: user-led {
34*cdf46cdbSAndy Yan			label = "user_led";
35*cdf46cdbSAndy Yan			linux,default-trigger = "heartbeat";
36*cdf46cdbSAndy Yan			default-state = "on";
37*cdf46cdbSAndy Yan			gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>;
38*cdf46cdbSAndy Yan			pinctrl-names = "default";
39*cdf46cdbSAndy Yan			pinctrl-0 = <&user_led_pin>;
40*cdf46cdbSAndy Yan		};
41*cdf46cdbSAndy Yan	};
42*cdf46cdbSAndy Yan
43*cdf46cdbSAndy Yan	hdmi-con {
44*cdf46cdbSAndy Yan		compatible = "hdmi-connector";
45*cdf46cdbSAndy Yan		type = "a";
46*cdf46cdbSAndy Yan
47*cdf46cdbSAndy Yan		port {
48*cdf46cdbSAndy Yan			hdmi_con_in: endpoint {
49*cdf46cdbSAndy Yan				remote-endpoint = <&hdmi_out_con>;
50*cdf46cdbSAndy Yan			};
51*cdf46cdbSAndy Yan		};
52*cdf46cdbSAndy Yan	};
53*cdf46cdbSAndy Yan
54*cdf46cdbSAndy Yan	dc_5v: dc-5v-regulator {
55*cdf46cdbSAndy Yan		compatible = "regulator-fixed";
56*cdf46cdbSAndy Yan		regulator-name = "dc_5v";
57*cdf46cdbSAndy Yan		regulator-always-on;
58*cdf46cdbSAndy Yan		regulator-boot-on;
59*cdf46cdbSAndy Yan		regulator-min-microvolt = <5000000>;
60*cdf46cdbSAndy Yan		regulator-max-microvolt = <5000000>;
61*cdf46cdbSAndy Yan	};
62*cdf46cdbSAndy Yan
63*cdf46cdbSAndy Yan	vcc3v3_sys: vcc3v3-sys-regulator {
64*cdf46cdbSAndy Yan		compatible = "regulator-fixed";
65*cdf46cdbSAndy Yan		regulator-name = "vcc3v3_sys";
66*cdf46cdbSAndy Yan		regulator-always-on;
67*cdf46cdbSAndy Yan		regulator-boot-on;
68*cdf46cdbSAndy Yan		regulator-min-microvolt = <3300000>;
69*cdf46cdbSAndy Yan		regulator-max-microvolt = <3300000>;
70*cdf46cdbSAndy Yan		vin-supply = <&vcc5v0_sys>;
71*cdf46cdbSAndy Yan	};
72*cdf46cdbSAndy Yan
73*cdf46cdbSAndy Yan	vcc5v0_sys: vcc5v0-sys-regulator {
74*cdf46cdbSAndy Yan		compatible = "regulator-fixed";
75*cdf46cdbSAndy Yan		regulator-name = "vcc5v0_sys";
76*cdf46cdbSAndy Yan		regulator-always-on;
77*cdf46cdbSAndy Yan		regulator-boot-on;
78*cdf46cdbSAndy Yan		regulator-min-microvolt = <5000000>;
79*cdf46cdbSAndy Yan		regulator-max-microvolt = <5000000>;
80*cdf46cdbSAndy Yan		vin-supply = <&dc_5v>;
81*cdf46cdbSAndy Yan	};
82*cdf46cdbSAndy Yan
83*cdf46cdbSAndy Yan	vcc3v3_m2_pcie: vcc3v3-m2-pcie-regulator {
84*cdf46cdbSAndy Yan		compatible = "regulator-fixed";
85*cdf46cdbSAndy Yan		regulator-name = "m2_pcie_3v3";
86*cdf46cdbSAndy Yan		enable-active-high;
87*cdf46cdbSAndy Yan		regulator-min-microvolt = <3300000>;
88*cdf46cdbSAndy Yan		regulator-max-microvolt = <3300000>;
89*cdf46cdbSAndy Yan		gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
90*cdf46cdbSAndy Yan		pinctrl-0 = <&vcc3v3_m2_pcie_en>;
91*cdf46cdbSAndy Yan		pinctrl-names = "default";
92*cdf46cdbSAndy Yan		startup-delay-us = <200000>;
93*cdf46cdbSAndy Yan		vin-supply = <&vcc5v0_sys>;
94*cdf46cdbSAndy Yan	};
95*cdf46cdbSAndy Yan
96*cdf46cdbSAndy Yan	vcc3v3_mini_pcie: vcc3v3-mini-pcie-regulator {
97*cdf46cdbSAndy Yan		compatible = "regulator-fixed";
98*cdf46cdbSAndy Yan		regulator-name = "minipcie_3v3";
99*cdf46cdbSAndy Yan		enable-active-high;
100*cdf46cdbSAndy Yan		regulator-min-microvolt = <3300000>;
101*cdf46cdbSAndy Yan		regulator-max-microvolt = <3300000>;
102*cdf46cdbSAndy Yan		gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
103*cdf46cdbSAndy Yan		pinctrl-0 = <&vcc3v3_mini_pcie_en>;
104*cdf46cdbSAndy Yan		pinctrl-names = "default";
105*cdf46cdbSAndy Yan		startup-delay-us = <5000>;
106*cdf46cdbSAndy Yan		vin-supply = <&vcc5v0_sys>;
107*cdf46cdbSAndy Yan	};
108*cdf46cdbSAndy Yan
109*cdf46cdbSAndy Yan	vcc5v0_usb20_host: vcc5v0-usb20-host-regulator {
110*cdf46cdbSAndy Yan		compatible = "regulator-fixed";
111*cdf46cdbSAndy Yan		regulator-name = "vcc5v0_usb20_host";
112*cdf46cdbSAndy Yan		enable-active-high;
113*cdf46cdbSAndy Yan		gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
114*cdf46cdbSAndy Yan		pinctrl-0 = <&vcc5v0_usb20_host_en>;
115*cdf46cdbSAndy Yan		pinctrl-names = "default";
116*cdf46cdbSAndy Yan	};
117*cdf46cdbSAndy Yan
118*cdf46cdbSAndy Yan	vcc5v0_usb30_host: vcc5v0-usb30-host-regulator {
119*cdf46cdbSAndy Yan		compatible = "regulator-fixed";
120*cdf46cdbSAndy Yan		regulator-name = "vcc5v0_usb30_host";
121*cdf46cdbSAndy Yan		enable-active-high;
122*cdf46cdbSAndy Yan		gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
123*cdf46cdbSAndy Yan		pinctrl-0 = <&vcc5v0_usb30_host_en>;
124*cdf46cdbSAndy Yan		pinctrl-names = "default";
125*cdf46cdbSAndy Yan	};
126*cdf46cdbSAndy Yan
127*cdf46cdbSAndy Yan	vcc5v0_otg_vbus: vcc5v0-otg-vbus-regulator {
128*cdf46cdbSAndy Yan		compatible = "regulator-fixed";
129*cdf46cdbSAndy Yan		regulator-name = "vcc5v0_otg_vbus";
130*cdf46cdbSAndy Yan		enable-active-high;
131*cdf46cdbSAndy Yan		regulator-min-microvolt = <5000000>;
132*cdf46cdbSAndy Yan		regulator-max-microvolt = <5000000>;
133*cdf46cdbSAndy Yan		gpio = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
134*cdf46cdbSAndy Yan		pinctrl-0 = <&vcc5v0_otg_vbus_en>;
135*cdf46cdbSAndy Yan		pinctrl-names = "default";
136*cdf46cdbSAndy Yan	};
137*cdf46cdbSAndy Yan};
138*cdf46cdbSAndy Yan
139*cdf46cdbSAndy Yan&combphy0 {
140*cdf46cdbSAndy Yan	status = "okay";
141*cdf46cdbSAndy Yan};
142*cdf46cdbSAndy Yan
143*cdf46cdbSAndy Yan&combphy1 {
144*cdf46cdbSAndy Yan	status = "okay";
145*cdf46cdbSAndy Yan};
146*cdf46cdbSAndy Yan
147*cdf46cdbSAndy Yan&combphy2 {
148*cdf46cdbSAndy Yan	status = "okay";
149*cdf46cdbSAndy Yan};
150*cdf46cdbSAndy Yan
151*cdf46cdbSAndy Yan&cpu0 {
152*cdf46cdbSAndy Yan	cpu-supply = <&vdd_cpu>;
153*cdf46cdbSAndy Yan};
154*cdf46cdbSAndy Yan
155*cdf46cdbSAndy Yan&cpu1 {
156*cdf46cdbSAndy Yan	cpu-supply = <&vdd_cpu>;
157*cdf46cdbSAndy Yan};
158*cdf46cdbSAndy Yan
159*cdf46cdbSAndy Yan&cpu2 {
160*cdf46cdbSAndy Yan	cpu-supply = <&vdd_cpu>;
161*cdf46cdbSAndy Yan};
162*cdf46cdbSAndy Yan
163*cdf46cdbSAndy Yan&cpu3 {
164*cdf46cdbSAndy Yan	cpu-supply = <&vdd_cpu>;
165*cdf46cdbSAndy Yan};
166*cdf46cdbSAndy Yan
167*cdf46cdbSAndy Yan&gpu {
168*cdf46cdbSAndy Yan	mali-supply = <&vdd_gpu>;
169*cdf46cdbSAndy Yan	status = "okay";
170*cdf46cdbSAndy Yan};
171*cdf46cdbSAndy Yan
172*cdf46cdbSAndy Yan&hdmi {
173*cdf46cdbSAndy Yan	avdd-0v9-supply = <&vdda0v9_image>;
174*cdf46cdbSAndy Yan	avdd-1v8-supply = <&vcca1v8_image>;
175*cdf46cdbSAndy Yan	status = "okay";
176*cdf46cdbSAndy Yan};
177*cdf46cdbSAndy Yan
178*cdf46cdbSAndy Yan&hdmi_in {
179*cdf46cdbSAndy Yan	hdmi_in_vp0: endpoint {
180*cdf46cdbSAndy Yan		remote-endpoint = <&vp0_out_hdmi>;
181*cdf46cdbSAndy Yan	};
182*cdf46cdbSAndy Yan};
183*cdf46cdbSAndy Yan
184*cdf46cdbSAndy Yan&hdmi_out {
185*cdf46cdbSAndy Yan	hdmi_out_con: endpoint {
186*cdf46cdbSAndy Yan		remote-endpoint = <&hdmi_con_in>;
187*cdf46cdbSAndy Yan	};
188*cdf46cdbSAndy Yan};
189*cdf46cdbSAndy Yan
190*cdf46cdbSAndy Yan&hdmi_sound {
191*cdf46cdbSAndy Yan	status = "okay";
192*cdf46cdbSAndy Yan};
193*cdf46cdbSAndy Yan
194*cdf46cdbSAndy Yan&i2c0 {
195*cdf46cdbSAndy Yan	status = "okay";
196*cdf46cdbSAndy Yan
197*cdf46cdbSAndy Yan	vdd_cpu: regulator@1c {
198*cdf46cdbSAndy Yan		compatible = "tcs,tcs4525";
199*cdf46cdbSAndy Yan		reg = <0x1c>;
200*cdf46cdbSAndy Yan		fcs,suspend-voltage-selector = <1>;
201*cdf46cdbSAndy Yan		regulator-name = "vdd_cpu";
202*cdf46cdbSAndy Yan		regulator-always-on;
203*cdf46cdbSAndy Yan		regulator-boot-on;
204*cdf46cdbSAndy Yan		regulator-min-microvolt = <800000>;
205*cdf46cdbSAndy Yan		regulator-max-microvolt = <1150000>;
206*cdf46cdbSAndy Yan		regulator-ramp-delay = <2300>;
207*cdf46cdbSAndy Yan		vin-supply = <&vcc5v0_sys>;
208*cdf46cdbSAndy Yan
209*cdf46cdbSAndy Yan		regulator-state-mem {
210*cdf46cdbSAndy Yan			regulator-off-in-suspend;
211*cdf46cdbSAndy Yan		};
212*cdf46cdbSAndy Yan	};
213*cdf46cdbSAndy Yan
214*cdf46cdbSAndy Yan	rk809: pmic@20 {
215*cdf46cdbSAndy Yan		compatible = "rockchip,rk809";
216*cdf46cdbSAndy Yan		reg = <0x20>;
217*cdf46cdbSAndy Yan		interrupt-parent = <&gpio0>;
218*cdf46cdbSAndy Yan		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
219*cdf46cdbSAndy Yan		assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
220*cdf46cdbSAndy Yan		assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
221*cdf46cdbSAndy Yan		#clock-cells = <1>;
222*cdf46cdbSAndy Yan		clock-names = "mclk";
223*cdf46cdbSAndy Yan		clocks = <&cru I2S1_MCLKOUT_TX>;
224*cdf46cdbSAndy Yan		pinctrl-names = "default";
225*cdf46cdbSAndy Yan		pinctrl-0 = <&pmic_int>;
226*cdf46cdbSAndy Yan		rockchip,system-power-controller;
227*cdf46cdbSAndy Yan		#sound-dai-cells = <0>;
228*cdf46cdbSAndy Yan		vcc1-supply = <&vcc3v3_sys>;
229*cdf46cdbSAndy Yan		vcc2-supply = <&vcc3v3_sys>;
230*cdf46cdbSAndy Yan		vcc3-supply = <&vcc3v3_sys>;
231*cdf46cdbSAndy Yan		vcc4-supply = <&vcc3v3_sys>;
232*cdf46cdbSAndy Yan		vcc5-supply = <&vcc3v3_sys>;
233*cdf46cdbSAndy Yan		vcc6-supply = <&vcc3v3_sys>;
234*cdf46cdbSAndy Yan		vcc7-supply = <&vcc3v3_sys>;
235*cdf46cdbSAndy Yan		vcc8-supply = <&vcc3v3_sys>;
236*cdf46cdbSAndy Yan		vcc9-supply = <&vcc3v3_sys>;
237*cdf46cdbSAndy Yan		wakeup-source;
238*cdf46cdbSAndy Yan
239*cdf46cdbSAndy Yan		regulators {
240*cdf46cdbSAndy Yan			vdd_logic: DCDC_REG1 {
241*cdf46cdbSAndy Yan				regulator-name = "vdd_logic";
242*cdf46cdbSAndy Yan				regulator-always-on;
243*cdf46cdbSAndy Yan				regulator-boot-on;
244*cdf46cdbSAndy Yan				regulator-min-microvolt = <500000>;
245*cdf46cdbSAndy Yan				regulator-max-microvolt = <1350000>;
246*cdf46cdbSAndy Yan				regulator-ramp-delay = <6001>;
247*cdf46cdbSAndy Yan				regulator-initial-mode = <0x2>;
248*cdf46cdbSAndy Yan
249*cdf46cdbSAndy Yan				regulator-state-mem {
250*cdf46cdbSAndy Yan					regulator-off-in-suspend;
251*cdf46cdbSAndy Yan				};
252*cdf46cdbSAndy Yan			};
253*cdf46cdbSAndy Yan
254*cdf46cdbSAndy Yan			vdd_gpu: DCDC_REG2 {
255*cdf46cdbSAndy Yan				regulator-name = "vdd_gpu";
256*cdf46cdbSAndy Yan				regulator-always-on;
257*cdf46cdbSAndy Yan				regulator-boot-on;
258*cdf46cdbSAndy Yan				regulator-min-microvolt = <500000>;
259*cdf46cdbSAndy Yan				regulator-max-microvolt = <1350000>;
260*cdf46cdbSAndy Yan				regulator-ramp-delay = <6001>;
261*cdf46cdbSAndy Yan				regulator-initial-mode = <0x2>;
262*cdf46cdbSAndy Yan
263*cdf46cdbSAndy Yan				regulator-state-mem {
264*cdf46cdbSAndy Yan					regulator-off-in-suspend;
265*cdf46cdbSAndy Yan				};
266*cdf46cdbSAndy Yan			};
267*cdf46cdbSAndy Yan
268*cdf46cdbSAndy Yan			vcc_ddr: DCDC_REG3 {
269*cdf46cdbSAndy Yan				regulator-name = "vcc_ddr";
270*cdf46cdbSAndy Yan				regulator-always-on;
271*cdf46cdbSAndy Yan				regulator-boot-on;
272*cdf46cdbSAndy Yan				regulator-initial-mode = <0x2>;
273*cdf46cdbSAndy Yan
274*cdf46cdbSAndy Yan				regulator-state-mem {
275*cdf46cdbSAndy Yan					regulator-on-in-suspend;
276*cdf46cdbSAndy Yan				};
277*cdf46cdbSAndy Yan			};
278*cdf46cdbSAndy Yan
279*cdf46cdbSAndy Yan			vdd_npu: DCDC_REG4 {
280*cdf46cdbSAndy Yan				regulator-name = "vdd_npu";
281*cdf46cdbSAndy Yan				regulator-always-on;
282*cdf46cdbSAndy Yan				regulator-boot-on;
283*cdf46cdbSAndy Yan				regulator-min-microvolt = <500000>;
284*cdf46cdbSAndy Yan				regulator-max-microvolt = <1350000>;
285*cdf46cdbSAndy Yan				regulator-ramp-delay = <6001>;
286*cdf46cdbSAndy Yan				regulator-initial-mode = <0x2>;
287*cdf46cdbSAndy Yan
288*cdf46cdbSAndy Yan				regulator-state-mem {
289*cdf46cdbSAndy Yan					regulator-off-in-suspend;
290*cdf46cdbSAndy Yan				};
291*cdf46cdbSAndy Yan			};
292*cdf46cdbSAndy Yan
293*cdf46cdbSAndy Yan			vcc_1v8: DCDC_REG5 {
294*cdf46cdbSAndy Yan				regulator-name = "vcc_1v8";
295*cdf46cdbSAndy Yan				regulator-always-on;
296*cdf46cdbSAndy Yan				regulator-boot-on;
297*cdf46cdbSAndy Yan				regulator-min-microvolt = <1800000>;
298*cdf46cdbSAndy Yan				regulator-max-microvolt = <1800000>;
299*cdf46cdbSAndy Yan
300*cdf46cdbSAndy Yan				regulator-state-mem {
301*cdf46cdbSAndy Yan					regulator-off-in-suspend;
302*cdf46cdbSAndy Yan				};
303*cdf46cdbSAndy Yan			};
304*cdf46cdbSAndy Yan
305*cdf46cdbSAndy Yan			vdda0v9_image: LDO_REG1 {
306*cdf46cdbSAndy Yan				regulator-name = "vdda0v9_image";
307*cdf46cdbSAndy Yan				regulator-boot-on;
308*cdf46cdbSAndy Yan				regulator-always-on;
309*cdf46cdbSAndy Yan				regulator-min-microvolt = <900000>;
310*cdf46cdbSAndy Yan				regulator-max-microvolt = <900000>;
311*cdf46cdbSAndy Yan
312*cdf46cdbSAndy Yan				regulator-state-mem {
313*cdf46cdbSAndy Yan					regulator-off-in-suspend;
314*cdf46cdbSAndy Yan				};
315*cdf46cdbSAndy Yan			};
316*cdf46cdbSAndy Yan
317*cdf46cdbSAndy Yan			vdda_0v9: LDO_REG2 {
318*cdf46cdbSAndy Yan				regulator-name = "vdda_0v9";
319*cdf46cdbSAndy Yan				regulator-always-on;
320*cdf46cdbSAndy Yan				regulator-boot-on;
321*cdf46cdbSAndy Yan				regulator-min-microvolt = <900000>;
322*cdf46cdbSAndy Yan				regulator-max-microvolt = <900000>;
323*cdf46cdbSAndy Yan
324*cdf46cdbSAndy Yan				regulator-state-mem {
325*cdf46cdbSAndy Yan					regulator-off-in-suspend;
326*cdf46cdbSAndy Yan				};
327*cdf46cdbSAndy Yan			};
328*cdf46cdbSAndy Yan
329*cdf46cdbSAndy Yan			vdda0v9_pmu: LDO_REG3 {
330*cdf46cdbSAndy Yan				regulator-name = "vdda0v9_pmu";
331*cdf46cdbSAndy Yan				regulator-always-on;
332*cdf46cdbSAndy Yan				regulator-boot-on;
333*cdf46cdbSAndy Yan				regulator-min-microvolt = <900000>;
334*cdf46cdbSAndy Yan				regulator-max-microvolt = <900000>;
335*cdf46cdbSAndy Yan
336*cdf46cdbSAndy Yan				regulator-state-mem {
337*cdf46cdbSAndy Yan					regulator-on-in-suspend;
338*cdf46cdbSAndy Yan					regulator-suspend-microvolt = <900000>;
339*cdf46cdbSAndy Yan				};
340*cdf46cdbSAndy Yan			};
341*cdf46cdbSAndy Yan
342*cdf46cdbSAndy Yan			vccio_acodec: LDO_REG4 {
343*cdf46cdbSAndy Yan				regulator-name = "vccio_acodec";
344*cdf46cdbSAndy Yan				regulator-always-on;
345*cdf46cdbSAndy Yan				regulator-boot-on;
346*cdf46cdbSAndy Yan				regulator-min-microvolt = <3300000>;
347*cdf46cdbSAndy Yan				regulator-max-microvolt = <3300000>;
348*cdf46cdbSAndy Yan
349*cdf46cdbSAndy Yan				regulator-state-mem {
350*cdf46cdbSAndy Yan					regulator-off-in-suspend;
351*cdf46cdbSAndy Yan				};
352*cdf46cdbSAndy Yan			};
353*cdf46cdbSAndy Yan
354*cdf46cdbSAndy Yan			vccio_sd: LDO_REG5 {
355*cdf46cdbSAndy Yan				regulator-name = "vccio_sd";
356*cdf46cdbSAndy Yan				regulator-always-on;
357*cdf46cdbSAndy Yan				regulator-boot-on;
358*cdf46cdbSAndy Yan				regulator-min-microvolt = <1800000>;
359*cdf46cdbSAndy Yan				regulator-max-microvolt = <3300000>;
360*cdf46cdbSAndy Yan
361*cdf46cdbSAndy Yan				regulator-state-mem {
362*cdf46cdbSAndy Yan					regulator-off-in-suspend;
363*cdf46cdbSAndy Yan				};
364*cdf46cdbSAndy Yan			};
365*cdf46cdbSAndy Yan
366*cdf46cdbSAndy Yan			vcc3v3_pmu: LDO_REG6 {
367*cdf46cdbSAndy Yan				regulator-name = "vcc3v3_pmu";
368*cdf46cdbSAndy Yan				regulator-always-on;
369*cdf46cdbSAndy Yan				regulator-boot-on;
370*cdf46cdbSAndy Yan				regulator-min-microvolt = <3300000>;
371*cdf46cdbSAndy Yan				regulator-max-microvolt = <3300000>;
372*cdf46cdbSAndy Yan
373*cdf46cdbSAndy Yan				regulator-state-mem {
374*cdf46cdbSAndy Yan					regulator-on-in-suspend;
375*cdf46cdbSAndy Yan					regulator-suspend-microvolt = <3300000>;
376*cdf46cdbSAndy Yan				};
377*cdf46cdbSAndy Yan			};
378*cdf46cdbSAndy Yan
379*cdf46cdbSAndy Yan			vcca_1v8: LDO_REG7 {
380*cdf46cdbSAndy Yan				regulator-name = "vcca_1v8";
381*cdf46cdbSAndy Yan				regulator-always-on;
382*cdf46cdbSAndy Yan				regulator-boot-on;
383*cdf46cdbSAndy Yan				regulator-min-microvolt = <1800000>;
384*cdf46cdbSAndy Yan				regulator-max-microvolt = <1800000>;
385*cdf46cdbSAndy Yan
386*cdf46cdbSAndy Yan				regulator-state-mem {
387*cdf46cdbSAndy Yan					regulator-off-in-suspend;
388*cdf46cdbSAndy Yan				};
389*cdf46cdbSAndy Yan			};
390*cdf46cdbSAndy Yan
391*cdf46cdbSAndy Yan			vcca1v8_pmu: LDO_REG8 {
392*cdf46cdbSAndy Yan				regulator-name = "vcca1v8_pmu";
393*cdf46cdbSAndy Yan				regulator-always-on;
394*cdf46cdbSAndy Yan				regulator-boot-on;
395*cdf46cdbSAndy Yan				regulator-min-microvolt = <1800000>;
396*cdf46cdbSAndy Yan				regulator-max-microvolt = <1800000>;
397*cdf46cdbSAndy Yan
398*cdf46cdbSAndy Yan				regulator-state-mem {
399*cdf46cdbSAndy Yan					regulator-on-in-suspend;
400*cdf46cdbSAndy Yan					regulator-suspend-microvolt = <1800000>;
401*cdf46cdbSAndy Yan				};
402*cdf46cdbSAndy Yan			};
403*cdf46cdbSAndy Yan
404*cdf46cdbSAndy Yan			vcca1v8_image: LDO_REG9 {
405*cdf46cdbSAndy Yan				regulator-name = "vcca1v8_image";
406*cdf46cdbSAndy Yan				regulator-always-on;
407*cdf46cdbSAndy Yan				regulator-boot-on;
408*cdf46cdbSAndy Yan				regulator-min-microvolt = <1800000>;
409*cdf46cdbSAndy Yan				regulator-max-microvolt = <1800000>;
410*cdf46cdbSAndy Yan
411*cdf46cdbSAndy Yan				regulator-state-mem {
412*cdf46cdbSAndy Yan					regulator-off-in-suspend;
413*cdf46cdbSAndy Yan				};
414*cdf46cdbSAndy Yan			};
415*cdf46cdbSAndy Yan
416*cdf46cdbSAndy Yan			vcc_3v3: SWITCH_REG1 {
417*cdf46cdbSAndy Yan				regulator-name = "vcc_3v3";
418*cdf46cdbSAndy Yan				regulator-always-on;
419*cdf46cdbSAndy Yan				regulator-boot-on;
420*cdf46cdbSAndy Yan
421*cdf46cdbSAndy Yan				regulator-state-mem {
422*cdf46cdbSAndy Yan					regulator-off-in-suspend;
423*cdf46cdbSAndy Yan				};
424*cdf46cdbSAndy Yan			};
425*cdf46cdbSAndy Yan
426*cdf46cdbSAndy Yan			vcc3v3_sd: SWITCH_REG2 {
427*cdf46cdbSAndy Yan				regulator-name = "vcc3v3_sd";
428*cdf46cdbSAndy Yan				regulator-always-on;
429*cdf46cdbSAndy Yan				regulator-boot-on;
430*cdf46cdbSAndy Yan
431*cdf46cdbSAndy Yan				regulator-state-mem {
432*cdf46cdbSAndy Yan					regulator-off-in-suspend;
433*cdf46cdbSAndy Yan				};
434*cdf46cdbSAndy Yan			};
435*cdf46cdbSAndy Yan		};
436*cdf46cdbSAndy Yan	};
437*cdf46cdbSAndy Yan};
438*cdf46cdbSAndy Yan
439*cdf46cdbSAndy Yan&i2s1_8ch {
440*cdf46cdbSAndy Yan	rockchip,trcm-sync-tx-only;
441*cdf46cdbSAndy Yan	status = "okay";
442*cdf46cdbSAndy Yan};
443*cdf46cdbSAndy Yan
444*cdf46cdbSAndy Yan&gmac0 {
445*cdf46cdbSAndy Yan	phy-mode = "rgmii";
446*cdf46cdbSAndy Yan	clock_in_out = "output";
447*cdf46cdbSAndy Yan
448*cdf46cdbSAndy Yan	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
449*cdf46cdbSAndy Yan	snps,reset-active-low;
450*cdf46cdbSAndy Yan	/* Reset time is 20ms, 100ms for rtl8211f */
451*cdf46cdbSAndy Yan	snps,reset-delays-us = <0 20000 100000>;
452*cdf46cdbSAndy Yan
453*cdf46cdbSAndy Yan	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
454*cdf46cdbSAndy Yan	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
455*cdf46cdbSAndy Yan
456*cdf46cdbSAndy Yan	pinctrl-names = "default";
457*cdf46cdbSAndy Yan	pinctrl-0 = <&gmac0_miim
458*cdf46cdbSAndy Yan		     &gmac0_tx_bus2
459*cdf46cdbSAndy Yan		     &gmac0_rx_bus2
460*cdf46cdbSAndy Yan		     &gmac0_rgmii_clk
461*cdf46cdbSAndy Yan		     &gmac0_rgmii_bus>;
462*cdf46cdbSAndy Yan
463*cdf46cdbSAndy Yan	tx_delay = <0x22>;
464*cdf46cdbSAndy Yan	rx_delay = <0x0e>;
465*cdf46cdbSAndy Yan
466*cdf46cdbSAndy Yan	phy-handle = <&rgmii_phy0>;
467*cdf46cdbSAndy Yan	status = "okay";
468*cdf46cdbSAndy Yan};
469*cdf46cdbSAndy Yan
470*cdf46cdbSAndy Yan&mdio0 {
471*cdf46cdbSAndy Yan	rgmii_phy0: phy@0 {
472*cdf46cdbSAndy Yan		compatible = "ethernet-phy-ieee802.3-c22";
473*cdf46cdbSAndy Yan		reg = <0x0>;
474*cdf46cdbSAndy Yan	};
475*cdf46cdbSAndy Yan};
476*cdf46cdbSAndy Yan
477*cdf46cdbSAndy Yan&gmac1 {
478*cdf46cdbSAndy Yan	phy-mode = "rgmii";
479*cdf46cdbSAndy Yan	clock_in_out = "output";
480*cdf46cdbSAndy Yan
481*cdf46cdbSAndy Yan	snps,reset-gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>;
482*cdf46cdbSAndy Yan	snps,reset-active-low;
483*cdf46cdbSAndy Yan	/* Reset time is 20ms, 100ms for rtl8211f */
484*cdf46cdbSAndy Yan	snps,reset-delays-us = <0 20000 100000>;
485*cdf46cdbSAndy Yan
486*cdf46cdbSAndy Yan	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
487*cdf46cdbSAndy Yan	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
488*cdf46cdbSAndy Yan
489*cdf46cdbSAndy Yan	pinctrl-names = "default";
490*cdf46cdbSAndy Yan	pinctrl-0 = <&gmac1m1_miim
491*cdf46cdbSAndy Yan		     &gmac1m1_tx_bus2
492*cdf46cdbSAndy Yan		     &gmac1m1_rx_bus2
493*cdf46cdbSAndy Yan		     &gmac1m1_rgmii_clk
494*cdf46cdbSAndy Yan		     &gmac1m1_rgmii_bus>;
495*cdf46cdbSAndy Yan
496*cdf46cdbSAndy Yan	tx_delay = <0x21>;
497*cdf46cdbSAndy Yan	rx_delay = <0x0e>;
498*cdf46cdbSAndy Yan
499*cdf46cdbSAndy Yan	phy-handle = <&rgmii_phy1>;
500*cdf46cdbSAndy Yan	status = "okay";
501*cdf46cdbSAndy Yan};
502*cdf46cdbSAndy Yan
503*cdf46cdbSAndy Yan&mdio1 {
504*cdf46cdbSAndy Yan	rgmii_phy1: phy@0 {
505*cdf46cdbSAndy Yan		compatible = "ethernet-phy-ieee802.3-c22";
506*cdf46cdbSAndy Yan		reg = <0x0>;
507*cdf46cdbSAndy Yan	};
508*cdf46cdbSAndy Yan};
509*cdf46cdbSAndy Yan
510*cdf46cdbSAndy Yan&gic {
511*cdf46cdbSAndy Yan	mbi-ranges = <94 31>, <229 31>, <289 31>;
512*cdf46cdbSAndy Yan};
513*cdf46cdbSAndy Yan
514*cdf46cdbSAndy Yan&pcie30phy {
515*cdf46cdbSAndy Yan	status = "okay";
516*cdf46cdbSAndy Yan};
517*cdf46cdbSAndy Yan
518*cdf46cdbSAndy Yan&pcie3x2 {
519*cdf46cdbSAndy Yan	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
520*cdf46cdbSAndy Yan	vpcie3v3-supply = <&vcc3v3_m2_pcie>;
521*cdf46cdbSAndy Yan	status = "okay";
522*cdf46cdbSAndy Yan};
523*cdf46cdbSAndy Yan
524*cdf46cdbSAndy Yan&pcie2x1 {
525*cdf46cdbSAndy Yan	reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
526*cdf46cdbSAndy Yan	disable-gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
527*cdf46cdbSAndy Yan	vpcie3v3-supply = <&vcc3v3_mini_pcie>;
528*cdf46cdbSAndy Yan	status = "okay";
529*cdf46cdbSAndy Yan};
530*cdf46cdbSAndy Yan
531*cdf46cdbSAndy Yan&pmu_io_domains {
532*cdf46cdbSAndy Yan	pmuio2-supply = <&vcc3v3_pmu>;
533*cdf46cdbSAndy Yan	vccio1-supply = <&vccio_acodec>;
534*cdf46cdbSAndy Yan	vccio3-supply = <&vccio_sd>;
535*cdf46cdbSAndy Yan	vccio4-supply = <&vcc_1v8>;
536*cdf46cdbSAndy Yan	vccio5-supply = <&vcc_3v3>;
537*cdf46cdbSAndy Yan	vccio6-supply = <&vcc_1v8>;
538*cdf46cdbSAndy Yan	vccio7-supply = <&vcc_3v3>;
539*cdf46cdbSAndy Yan	status = "okay";
540*cdf46cdbSAndy Yan};
541*cdf46cdbSAndy Yan
542*cdf46cdbSAndy Yan&pwm8 {
543*cdf46cdbSAndy Yan	status = "okay";
544*cdf46cdbSAndy Yan};
545*cdf46cdbSAndy Yan
546*cdf46cdbSAndy Yan&pwm9 {
547*cdf46cdbSAndy Yan	status = "disabled";
548*cdf46cdbSAndy Yan};
549*cdf46cdbSAndy Yan
550*cdf46cdbSAndy Yan&pwm10 {
551*cdf46cdbSAndy Yan	status = "disabled";
552*cdf46cdbSAndy Yan};
553*cdf46cdbSAndy Yan
554*cdf46cdbSAndy Yan&pwm14 {
555*cdf46cdbSAndy Yan	status = "disabled";
556*cdf46cdbSAndy Yan};
557*cdf46cdbSAndy Yan
558*cdf46cdbSAndy Yan&spi3 {
559*cdf46cdbSAndy Yan	pinctrl-0 = <&spi3m1_pins>;
560*cdf46cdbSAndy Yan	status = "disabled";
561*cdf46cdbSAndy Yan};
562*cdf46cdbSAndy Yan
563*cdf46cdbSAndy Yan&uart2 {
564*cdf46cdbSAndy Yan	status = "okay";
565*cdf46cdbSAndy Yan};
566*cdf46cdbSAndy Yan
567*cdf46cdbSAndy Yan&uart3 {
568*cdf46cdbSAndy Yan	pinctrl-names = "default";
569*cdf46cdbSAndy Yan	pinctrl-0 = <&uart3m1_xfer>;
570*cdf46cdbSAndy Yan	status = "disabled";
571*cdf46cdbSAndy Yan};
572*cdf46cdbSAndy Yan
573*cdf46cdbSAndy Yan&saradc {
574*cdf46cdbSAndy Yan	vref-supply = <&vcca_1v8>;
575*cdf46cdbSAndy Yan	status = "okay";
576*cdf46cdbSAndy Yan};
577*cdf46cdbSAndy Yan
578*cdf46cdbSAndy Yan&tsadc {
579*cdf46cdbSAndy Yan	rockchip,hw-tshut-mode = <1>;
580*cdf46cdbSAndy Yan	rockchip,hw-tshut-polarity = <0>;
581*cdf46cdbSAndy Yan	status = "okay";
582*cdf46cdbSAndy Yan};
583*cdf46cdbSAndy Yan
584*cdf46cdbSAndy Yan&sdhci {
585*cdf46cdbSAndy Yan	assigned-clocks = <&cru BCLK_EMMC>, <&cru TCLK_EMMC>, <&cru CCLK_EMMC>;
586*cdf46cdbSAndy Yan	assigned-clock-rates = <200000000>, <24000000>, <200000000>;
587*cdf46cdbSAndy Yan	bus-width = <8>;
588*cdf46cdbSAndy Yan	max-frequency = <200000000>;
589*cdf46cdbSAndy Yan	mmc-hs200-1_8v;
590*cdf46cdbSAndy Yan	non-removable;
591*cdf46cdbSAndy Yan	pinctrl-names = "default";
592*cdf46cdbSAndy Yan	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
593*cdf46cdbSAndy Yan	status = "okay";
594*cdf46cdbSAndy Yan};
595*cdf46cdbSAndy Yan
596*cdf46cdbSAndy Yan&sdmmc0 {
597*cdf46cdbSAndy Yan	max-frequency = <150000000>;
598*cdf46cdbSAndy Yan	no-sdio;
599*cdf46cdbSAndy Yan	no-mmc;
600*cdf46cdbSAndy Yan	bus-width = <4>;
601*cdf46cdbSAndy Yan	cap-mmc-highspeed;
602*cdf46cdbSAndy Yan	cap-sd-highspeed;
603*cdf46cdbSAndy Yan	disable-wp;
604*cdf46cdbSAndy Yan	sd-uhs-sdr104;
605*cdf46cdbSAndy Yan	vmmc-supply = <&vcc3v3_sd>;
606*cdf46cdbSAndy Yan	vqmmc-supply = <&vccio_sd>;
607*cdf46cdbSAndy Yan	pinctrl-names = "default";
608*cdf46cdbSAndy Yan	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
609*cdf46cdbSAndy Yan	status = "okay";
610*cdf46cdbSAndy Yan};
611*cdf46cdbSAndy Yan
612*cdf46cdbSAndy Yan/* USB OTG/USB Host_1 USB 2.0 Comb */
613*cdf46cdbSAndy Yan&usb2phy0 {
614*cdf46cdbSAndy Yan	status = "okay";
615*cdf46cdbSAndy Yan};
616*cdf46cdbSAndy Yan
617*cdf46cdbSAndy Yan&usb2phy0_host {
618*cdf46cdbSAndy Yan	phy-supply = <&vcc5v0_usb30_host>;
619*cdf46cdbSAndy Yan	status = "okay";
620*cdf46cdbSAndy Yan};
621*cdf46cdbSAndy Yan
622*cdf46cdbSAndy Yan&usb2phy0_otg {
623*cdf46cdbSAndy Yan	phy-supply = <&vcc5v0_otg_vbus>;
624*cdf46cdbSAndy Yan	status = "okay";
625*cdf46cdbSAndy Yan};
626*cdf46cdbSAndy Yan
627*cdf46cdbSAndy Yan&usb_host0_ehci {
628*cdf46cdbSAndy Yan	status = "okay";
629*cdf46cdbSAndy Yan};
630*cdf46cdbSAndy Yan
631*cdf46cdbSAndy Yan&usb_host0_ohci {
632*cdf46cdbSAndy Yan	status = "okay";
633*cdf46cdbSAndy Yan};
634*cdf46cdbSAndy Yan
635*cdf46cdbSAndy Yan/* USB Host_2/USB Host_3 USB 2.0 Comb */
636*cdf46cdbSAndy Yan&usb2phy1 {
637*cdf46cdbSAndy Yan	status = "okay";
638*cdf46cdbSAndy Yan};
639*cdf46cdbSAndy Yan
640*cdf46cdbSAndy Yan&usb2phy1_host {
641*cdf46cdbSAndy Yan	status = "okay";
642*cdf46cdbSAndy Yan};
643*cdf46cdbSAndy Yan
644*cdf46cdbSAndy Yan&usb2phy1_otg {
645*cdf46cdbSAndy Yan	phy-supply = <&vcc5v0_usb20_host>;
646*cdf46cdbSAndy Yan	status = "okay";
647*cdf46cdbSAndy Yan};
648*cdf46cdbSAndy Yan
649*cdf46cdbSAndy Yan&usb_host1_ehci {
650*cdf46cdbSAndy Yan	status = "okay";
651*cdf46cdbSAndy Yan};
652*cdf46cdbSAndy Yan
653*cdf46cdbSAndy Yan&usb_host1_ohci {
654*cdf46cdbSAndy Yan	status = "okay";
655*cdf46cdbSAndy Yan};
656*cdf46cdbSAndy Yan
657*cdf46cdbSAndy Yan/* MULTI_PHY0 For SATA0, USB3.0 OTG Only USB2.0 */
658*cdf46cdbSAndy Yan&usb_host0_xhci {
659*cdf46cdbSAndy Yan	phys = <&usb2phy0_otg>;
660*cdf46cdbSAndy Yan	phy-names = "usb2-phy";
661*cdf46cdbSAndy Yan	extcon = <&usb2phy0>;
662*cdf46cdbSAndy Yan	maximum-speed = "high-speed";
663*cdf46cdbSAndy Yan	dr_mode = "host";
664*cdf46cdbSAndy Yan	status = "okay";
665*cdf46cdbSAndy Yan};
666*cdf46cdbSAndy Yan
667*cdf46cdbSAndy Yan&sata0 {
668*cdf46cdbSAndy Yan	status = "okay";
669*cdf46cdbSAndy Yan};
670*cdf46cdbSAndy Yan
671*cdf46cdbSAndy Yan/* USB3.0 Host */
672*cdf46cdbSAndy Yan&usb_host1_xhci {
673*cdf46cdbSAndy Yan	status = "okay";
674*cdf46cdbSAndy Yan};
675*cdf46cdbSAndy Yan
676*cdf46cdbSAndy Yan&vop {
677*cdf46cdbSAndy Yan	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
678*cdf46cdbSAndy Yan	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
679*cdf46cdbSAndy Yan	status = "okay";
680*cdf46cdbSAndy Yan};
681*cdf46cdbSAndy Yan
682*cdf46cdbSAndy Yan&vop_mmu {
683*cdf46cdbSAndy Yan	status = "okay";
684*cdf46cdbSAndy Yan};
685*cdf46cdbSAndy Yan
686*cdf46cdbSAndy Yan&vp0 {
687*cdf46cdbSAndy Yan	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
688*cdf46cdbSAndy Yan		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
689*cdf46cdbSAndy Yan		remote-endpoint = <&hdmi_in_vp0>;
690*cdf46cdbSAndy Yan	};
691*cdf46cdbSAndy Yan};
692*cdf46cdbSAndy Yan
693*cdf46cdbSAndy Yan&pinctrl {
694*cdf46cdbSAndy Yan	leds {
695*cdf46cdbSAndy Yan		user_led_pin: user-status-led-pin {
696*cdf46cdbSAndy Yan			rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
697*cdf46cdbSAndy Yan		};
698*cdf46cdbSAndy Yan	};
699*cdf46cdbSAndy Yan
700*cdf46cdbSAndy Yan	usb {
701*cdf46cdbSAndy Yan		vcc5v0_usb20_host_en: vcc5v0-usb20-host-en {
702*cdf46cdbSAndy Yan			rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
703*cdf46cdbSAndy Yan		};
704*cdf46cdbSAndy Yan
705*cdf46cdbSAndy Yan		vcc5v0_usb30_host_en: vcc5v0-usb30-host-en {
706*cdf46cdbSAndy Yan			rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
707*cdf46cdbSAndy Yan		};
708*cdf46cdbSAndy Yan
709*cdf46cdbSAndy Yan		vcc5v0_otg_vbus_en: vcc5v0-otg-vbus-en {
710*cdf46cdbSAndy Yan			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
711*cdf46cdbSAndy Yan		};
712*cdf46cdbSAndy Yan	};
713*cdf46cdbSAndy Yan
714*cdf46cdbSAndy Yan	pcie {
715*cdf46cdbSAndy Yan		vcc3v3_m2_pcie_en: vcc3v3-m2-pcie-en {
716*cdf46cdbSAndy Yan			rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
717*cdf46cdbSAndy Yan		};
718*cdf46cdbSAndy Yan
719*cdf46cdbSAndy Yan		vcc3v3_mini_pcie_en: vcc3v3-mini-pcie-en {
720*cdf46cdbSAndy Yan			rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
721*cdf46cdbSAndy Yan		};
722*cdf46cdbSAndy Yan	};
723*cdf46cdbSAndy Yan
724*cdf46cdbSAndy Yan	pmic {
725*cdf46cdbSAndy Yan		pmic_int: pmic-int {
726*cdf46cdbSAndy Yan			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
727*cdf46cdbSAndy Yan		};
728*cdf46cdbSAndy Yan	};
729*cdf46cdbSAndy Yan};
730