11e141cf1SChris Morgan// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 21e141cf1SChris Morgan 31e141cf1SChris Morgan/dts-v1/; 41e141cf1SChris Morgan 51e141cf1SChris Morgan#include <dt-bindings/gpio/gpio.h> 61e141cf1SChris Morgan#include <dt-bindings/input/linux-event-codes.h> 71e141cf1SChris Morgan#include <dt-bindings/pinctrl/rockchip.h> 81e141cf1SChris Morgan#include "rk3566-anbernic-rgxx3.dtsi" 91e141cf1SChris Morgan 101e141cf1SChris Morgan/ { 111e141cf1SChris Morgan backlight: backlight { 121e141cf1SChris Morgan compatible = "pwm-backlight"; 131e141cf1SChris Morgan power-supply = <&vcc_sys>; 141e141cf1SChris Morgan pwms = <&pwm4 0 25000 0>; 151e141cf1SChris Morgan }; 161e141cf1SChris Morgan}; 171e141cf1SChris Morgan 181e141cf1SChris Morgan&cru { 1987891399SChris Morgan assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>, 2087891399SChris Morgan <&pmucru PLL_PPLL>, <&cru PLL_VPLL>; 2187891399SChris Morgan assigned-clock-rates = <32768>, <1200000000>, 2287891399SChris Morgan <200000000>, <241500000>; 231e141cf1SChris Morgan}; 241e141cf1SChris Morgan 25*5e60ec02SChris Morgan&dsi_dphy0 { 26*5e60ec02SChris Morgan status = "okay"; 27*5e60ec02SChris Morgan}; 28*5e60ec02SChris Morgan 29*5e60ec02SChris Morgan&dsi0 { 30*5e60ec02SChris Morgan status = "okay"; 31*5e60ec02SChris Morgan #address-cells = <1>; 32*5e60ec02SChris Morgan #size-cells = <0>; 33*5e60ec02SChris Morgan 34*5e60ec02SChris Morgan ports { 35*5e60ec02SChris Morgan dsi0_in: port@0 { 36*5e60ec02SChris Morgan reg = <0>; 37*5e60ec02SChris Morgan dsi0_in_vp1: endpoint { 38*5e60ec02SChris Morgan remote-endpoint = <&vp1_out_dsi0>; 39*5e60ec02SChris Morgan }; 40*5e60ec02SChris Morgan }; 41*5e60ec02SChris Morgan 42*5e60ec02SChris Morgan dsi0_out: port@1 { 43*5e60ec02SChris Morgan reg = <1>; 44*5e60ec02SChris Morgan mipi_out_panel: endpoint { 45*5e60ec02SChris Morgan remote-endpoint = <&mipi_in_panel>; 46*5e60ec02SChris Morgan }; 47*5e60ec02SChris Morgan }; 48*5e60ec02SChris Morgan }; 49*5e60ec02SChris Morgan 50*5e60ec02SChris Morgan panel: panel@0 { 51*5e60ec02SChris Morgan compatible = "anbernic,rg353p-panel", "newvision,nv3051d"; 52*5e60ec02SChris Morgan reg = <0>; 53*5e60ec02SChris Morgan backlight = <&backlight>; 54*5e60ec02SChris Morgan pinctrl-names = "default"; 55*5e60ec02SChris Morgan pinctrl-0 = <&lcd_rst>; 56*5e60ec02SChris Morgan reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; 57*5e60ec02SChris Morgan vdd-supply = <&vcc3v3_lcd0_n>; 58*5e60ec02SChris Morgan 59*5e60ec02SChris Morgan port { 60*5e60ec02SChris Morgan mipi_in_panel: endpoint { 61*5e60ec02SChris Morgan remote-endpoint = <&mipi_out_panel>; 62*5e60ec02SChris Morgan }; 63*5e60ec02SChris Morgan }; 64*5e60ec02SChris Morgan }; 65*5e60ec02SChris Morgan}; 66*5e60ec02SChris Morgan 671e141cf1SChris Morgan&gpio_keys_control { 681e141cf1SChris Morgan button-a { 691e141cf1SChris Morgan gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>; 701e141cf1SChris Morgan label = "EAST"; 711e141cf1SChris Morgan linux,code = <BTN_EAST>; 721e141cf1SChris Morgan }; 731e141cf1SChris Morgan 741e141cf1SChris Morgan button-left { 751e141cf1SChris Morgan gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; 761e141cf1SChris Morgan label = "DPAD-LEFT"; 771e141cf1SChris Morgan linux,code = <BTN_DPAD_LEFT>; 781e141cf1SChris Morgan }; 791e141cf1SChris Morgan 801e141cf1SChris Morgan button-right { 811e141cf1SChris Morgan gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; 821e141cf1SChris Morgan label = "DPAD-RIGHT"; 831e141cf1SChris Morgan linux,code = <BTN_DPAD_RIGHT>; 841e141cf1SChris Morgan }; 851e141cf1SChris Morgan 861e141cf1SChris Morgan button-y { 871e141cf1SChris Morgan gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; 881e141cf1SChris Morgan label = "WEST"; 891e141cf1SChris Morgan linux,code = <BTN_WEST>; 901e141cf1SChris Morgan }; 911e141cf1SChris Morgan}; 921e141cf1SChris Morgan 931e141cf1SChris Morgan&i2c0 { 941e141cf1SChris Morgan /* This hardware is physically present but unused. */ 951e141cf1SChris Morgan power-monitor@62 { 961e141cf1SChris Morgan compatible = "cellwise,cw2015"; 971e141cf1SChris Morgan reg = <0x62>; 981e141cf1SChris Morgan status = "disabled"; 991e141cf1SChris Morgan }; 1001e141cf1SChris Morgan}; 1011e141cf1SChris Morgan 102*5e60ec02SChris Morgan&pinctrl { 103*5e60ec02SChris Morgan gpio-lcd { 104*5e60ec02SChris Morgan lcd_rst: lcd-rst { 105*5e60ec02SChris Morgan rockchip,pins = 106*5e60ec02SChris Morgan <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 107*5e60ec02SChris Morgan }; 108*5e60ec02SChris Morgan }; 109*5e60ec02SChris Morgan}; 110*5e60ec02SChris Morgan 1111e141cf1SChris Morgan&pwm4 { 1121e141cf1SChris Morgan status = "okay"; 1131e141cf1SChris Morgan}; 114*5e60ec02SChris Morgan 115*5e60ec02SChris Morgan&vp1 { 116*5e60ec02SChris Morgan vp1_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 { 117*5e60ec02SChris Morgan reg = <ROCKCHIP_VOP2_EP_MIPI0>; 118*5e60ec02SChris Morgan remote-endpoint = <&dsi0_in_vp1>; 119*5e60ec02SChris Morgan }; 120*5e60ec02SChris Morgan}; 121