1dd03aeefSMark Zhang// SPDX-License-Identifier: GPL-2.0 2dd03aeefSMark Zhang 37152879dSMark Zhang#include <dt-bindings/input/input.h> 47152879dSMark Zhang#include <dt-bindings/input/gpio-keys.h> 5*6ec2c716SMark Zhang#include <dt-bindings/pinctrl/pinctrl-tegra.h> 6dd03aeefSMark Zhang#include "tegra210.dtsi" 7dd03aeefSMark Zhang 8dd03aeefSMark Zhang/ { 9dd03aeefSMark Zhang aliases { 10dd03aeefSMark Zhang serial0 = &uarta; 11dd03aeefSMark Zhang }; 12dd03aeefSMark Zhang 13dd03aeefSMark Zhang chosen { 14dd03aeefSMark Zhang bootargs = "earlycon"; 15dd03aeefSMark Zhang stdout-path = "serial0:115200n8"; 16dd03aeefSMark Zhang }; 17dd03aeefSMark Zhang 18dd03aeefSMark Zhang memory { 19dd03aeefSMark Zhang device_type = "memory"; 20dd03aeefSMark Zhang reg = <0x0 0x80000000 0x0 0xc0000000>; 21dd03aeefSMark Zhang }; 22dd03aeefSMark Zhang 23*6ec2c716SMark Zhang pinmux: pinmux@700008d4 { 24*6ec2c716SMark Zhang status = "okay"; 25*6ec2c716SMark Zhang pinctrl-names = "boot"; 26*6ec2c716SMark Zhang pinctrl-0 = <&state_boot>; 27*6ec2c716SMark Zhang 28*6ec2c716SMark Zhang state_boot: pinmux { 29*6ec2c716SMark Zhang pex_l0_rst_n_pa0 { 30*6ec2c716SMark Zhang nvidia,pins = "pex_l0_rst_n_pa0"; 31*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 32*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 33*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 34*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 35*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 36*6ec2c716SMark Zhang nvidia,io-hv = <TEGRA_PIN_DISABLE>; 37*6ec2c716SMark Zhang }; 38*6ec2c716SMark Zhang pex_l0_clkreq_n_pa1 { 39*6ec2c716SMark Zhang nvidia,pins = "pex_l0_clkreq_n_pa1"; 40*6ec2c716SMark Zhang nvidia,function = "pe0"; 41*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 42*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 43*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 44*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 45*6ec2c716SMark Zhang nvidia,io-hv = <TEGRA_PIN_ENABLE>; 46*6ec2c716SMark Zhang }; 47*6ec2c716SMark Zhang pex_wake_n_pa2 { 48*6ec2c716SMark Zhang nvidia,pins = "pex_wake_n_pa2"; 49*6ec2c716SMark Zhang nvidia,function = "pe"; 50*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 51*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 52*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 53*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 54*6ec2c716SMark Zhang nvidia,io-hv = <TEGRA_PIN_ENABLE>; 55*6ec2c716SMark Zhang }; 56*6ec2c716SMark Zhang pex_l1_rst_n_pa3 { 57*6ec2c716SMark Zhang nvidia,pins = "pex_l1_rst_n_pa3"; 58*6ec2c716SMark Zhang nvidia,function = "pe1"; 59*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 60*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 61*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 62*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 63*6ec2c716SMark Zhang nvidia,io-hv = <TEGRA_PIN_ENABLE>; 64*6ec2c716SMark Zhang }; 65*6ec2c716SMark Zhang pex_l1_clkreq_n_pa4 { 66*6ec2c716SMark Zhang nvidia,pins = "pex_l1_clkreq_n_pa4"; 67*6ec2c716SMark Zhang nvidia,function = "pe1"; 68*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 69*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 70*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 71*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 72*6ec2c716SMark Zhang nvidia,io-hv = <TEGRA_PIN_ENABLE>; 73*6ec2c716SMark Zhang }; 74*6ec2c716SMark Zhang sata_led_active_pa5 { 75*6ec2c716SMark Zhang nvidia,pins = "sata_led_active_pa5"; 76*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_UP>; 77*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 78*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 79*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 80*6ec2c716SMark Zhang }; 81*6ec2c716SMark Zhang pa6 { 82*6ec2c716SMark Zhang nvidia,pins = "pa6"; 83*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 84*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 85*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 86*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 87*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 88*6ec2c716SMark Zhang }; 89*6ec2c716SMark Zhang dap1_fs_pb0 { 90*6ec2c716SMark Zhang nvidia,pins = "dap1_fs_pb0"; 91*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 92*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 93*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 94*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 95*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 96*6ec2c716SMark Zhang }; 97*6ec2c716SMark Zhang dap1_din_pb1 { 98*6ec2c716SMark Zhang nvidia,pins = "dap1_din_pb1"; 99*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 100*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 101*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 102*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 103*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 104*6ec2c716SMark Zhang }; 105*6ec2c716SMark Zhang dap1_dout_pb2 { 106*6ec2c716SMark Zhang nvidia,pins = "dap1_dout_pb2"; 107*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 108*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 109*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 110*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 111*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 112*6ec2c716SMark Zhang }; 113*6ec2c716SMark Zhang dap1_sclk_pb3 { 114*6ec2c716SMark Zhang nvidia,pins = "dap1_sclk_pb3"; 115*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 116*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 117*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 118*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 119*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 120*6ec2c716SMark Zhang }; 121*6ec2c716SMark Zhang spi2_mosi_pb4 { 122*6ec2c716SMark Zhang nvidia,pins = "spi2_mosi_pb4"; 123*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 124*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 125*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 126*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 127*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 128*6ec2c716SMark Zhang }; 129*6ec2c716SMark Zhang spi2_miso_pb5 { 130*6ec2c716SMark Zhang nvidia,pins = "spi2_miso_pb5"; 131*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 132*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 133*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 134*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 135*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 136*6ec2c716SMark Zhang }; 137*6ec2c716SMark Zhang spi2_sck_pb6 { 138*6ec2c716SMark Zhang nvidia,pins = "spi2_sck_pb6"; 139*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 140*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 141*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 142*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 143*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 144*6ec2c716SMark Zhang }; 145*6ec2c716SMark Zhang spi2_cs0_pb7 { 146*6ec2c716SMark Zhang nvidia,pins = "spi2_cs0_pb7"; 147*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 148*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 149*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 150*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 151*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 152*6ec2c716SMark Zhang }; 153*6ec2c716SMark Zhang spi1_mosi_pc0 { 154*6ec2c716SMark Zhang nvidia,pins = "spi1_mosi_pc0"; 155*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 156*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 157*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 158*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 159*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 160*6ec2c716SMark Zhang }; 161*6ec2c716SMark Zhang spi1_miso_pc1 { 162*6ec2c716SMark Zhang nvidia,pins = "spi1_miso_pc1"; 163*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 164*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 165*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 166*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 167*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 168*6ec2c716SMark Zhang }; 169*6ec2c716SMark Zhang spi1_sck_pc2 { 170*6ec2c716SMark Zhang nvidia,pins = "spi1_sck_pc2"; 171*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 172*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 173*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 174*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 175*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 176*6ec2c716SMark Zhang }; 177*6ec2c716SMark Zhang spi1_cs0_pc3 { 178*6ec2c716SMark Zhang nvidia,pins = "spi1_cs0_pc3"; 179*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 180*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 181*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 182*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 183*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 184*6ec2c716SMark Zhang }; 185*6ec2c716SMark Zhang spi1_cs1_pc4 { 186*6ec2c716SMark Zhang nvidia,pins = "spi1_cs1_pc4"; 187*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 188*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 189*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 190*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 191*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 192*6ec2c716SMark Zhang }; 193*6ec2c716SMark Zhang spi4_sck_pc5 { 194*6ec2c716SMark Zhang nvidia,pins = "spi4_sck_pc5"; 195*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 196*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 197*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 198*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 199*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 200*6ec2c716SMark Zhang }; 201*6ec2c716SMark Zhang spi4_cs0_pc6 { 202*6ec2c716SMark Zhang nvidia,pins = "spi4_cs0_pc6"; 203*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 204*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 205*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 206*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 207*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 208*6ec2c716SMark Zhang }; 209*6ec2c716SMark Zhang spi4_mosi_pc7 { 210*6ec2c716SMark Zhang nvidia,pins = "spi4_mosi_pc7"; 211*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 212*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 213*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 214*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 215*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 216*6ec2c716SMark Zhang }; 217*6ec2c716SMark Zhang spi4_miso_pd0 { 218*6ec2c716SMark Zhang nvidia,pins = "spi4_miso_pd0"; 219*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 220*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 221*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 222*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 223*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 224*6ec2c716SMark Zhang }; 225*6ec2c716SMark Zhang uart3_tx_pd1 { 226*6ec2c716SMark Zhang nvidia,pins = "uart3_tx_pd1"; 227*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 228*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 229*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 230*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 231*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 232*6ec2c716SMark Zhang }; 233*6ec2c716SMark Zhang uart3_rx_pd2 { 234*6ec2c716SMark Zhang nvidia,pins = "uart3_rx_pd2"; 235*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 236*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 237*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 238*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 239*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 240*6ec2c716SMark Zhang }; 241*6ec2c716SMark Zhang uart3_rts_pd3 { 242*6ec2c716SMark Zhang nvidia,pins = "uart3_rts_pd3"; 243*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 244*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 245*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 246*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 247*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 248*6ec2c716SMark Zhang }; 249*6ec2c716SMark Zhang uart3_cts_pd4 { 250*6ec2c716SMark Zhang nvidia,pins = "uart3_cts_pd4"; 251*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 252*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 253*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 254*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 255*6ec2c716SMark Zhang }; 256*6ec2c716SMark Zhang dmic1_clk_pe0 { 257*6ec2c716SMark Zhang nvidia,pins = "dmic1_clk_pe0"; 258*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 259*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 260*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 261*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 262*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 263*6ec2c716SMark Zhang }; 264*6ec2c716SMark Zhang dmic1_dat_pe1 { 265*6ec2c716SMark Zhang nvidia,pins = "dmic1_dat_pe1"; 266*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 267*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 268*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 269*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 270*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 271*6ec2c716SMark Zhang }; 272*6ec2c716SMark Zhang dmic2_clk_pe2 { 273*6ec2c716SMark Zhang nvidia,pins = "dmic2_clk_pe2"; 274*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 275*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 276*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 277*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 278*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 279*6ec2c716SMark Zhang }; 280*6ec2c716SMark Zhang dmic2_dat_pe3 { 281*6ec2c716SMark Zhang nvidia,pins = "dmic2_dat_pe3"; 282*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 283*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 284*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 285*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 286*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 287*6ec2c716SMark Zhang }; 288*6ec2c716SMark Zhang dmic3_clk_pe4 { 289*6ec2c716SMark Zhang nvidia,pins = "dmic3_clk_pe4"; 290*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 291*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 292*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 293*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 294*6ec2c716SMark Zhang }; 295*6ec2c716SMark Zhang dmic3_dat_pe5 { 296*6ec2c716SMark Zhang nvidia,pins = "dmic3_dat_pe5"; 297*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 298*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 299*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 300*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 301*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 302*6ec2c716SMark Zhang }; 303*6ec2c716SMark Zhang pe6 { 304*6ec2c716SMark Zhang nvidia,pins = "pe6"; 305*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 306*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 307*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 308*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 309*6ec2c716SMark Zhang }; 310*6ec2c716SMark Zhang pe7 { 311*6ec2c716SMark Zhang nvidia,pins = "pe7"; 312*6ec2c716SMark Zhang nvidia,function = "pwm3"; 313*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 314*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 315*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 316*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 317*6ec2c716SMark Zhang }; 318*6ec2c716SMark Zhang gen3_i2c_scl_pf0 { 319*6ec2c716SMark Zhang nvidia,pins = "gen3_i2c_scl_pf0"; 320*6ec2c716SMark Zhang nvidia,function = "i2c3"; 321*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 322*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 323*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 324*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 325*6ec2c716SMark Zhang nvidia,io-hv = <TEGRA_PIN_DISABLE>; 326*6ec2c716SMark Zhang }; 327*6ec2c716SMark Zhang gen3_i2c_sda_pf1 { 328*6ec2c716SMark Zhang nvidia,pins = "gen3_i2c_sda_pf1"; 329*6ec2c716SMark Zhang nvidia,function = "i2c3"; 330*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 331*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 332*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 333*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 334*6ec2c716SMark Zhang nvidia,io-hv = <TEGRA_PIN_DISABLE>; 335*6ec2c716SMark Zhang }; 336*6ec2c716SMark Zhang uart2_tx_pg0 { 337*6ec2c716SMark Zhang nvidia,pins = "uart2_tx_pg0"; 338*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 339*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 340*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 341*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 342*6ec2c716SMark Zhang }; 343*6ec2c716SMark Zhang uart2_rx_pg1 { 344*6ec2c716SMark Zhang nvidia,pins = "uart2_rx_pg1"; 345*6ec2c716SMark Zhang nvidia,function = "uartb"; 346*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 347*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 348*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 349*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 350*6ec2c716SMark Zhang }; 351*6ec2c716SMark Zhang uart2_rts_pg2 { 352*6ec2c716SMark Zhang nvidia,pins = "uart2_rts_pg2"; 353*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 354*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 355*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 356*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 357*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 358*6ec2c716SMark Zhang }; 359*6ec2c716SMark Zhang uart2_cts_pg3 { 360*6ec2c716SMark Zhang nvidia,pins = "uart2_cts_pg3"; 361*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 362*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 363*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 364*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 365*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 366*6ec2c716SMark Zhang }; 367*6ec2c716SMark Zhang wifi_en_ph0 { 368*6ec2c716SMark Zhang nvidia,pins = "wifi_en_ph0"; 369*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 370*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 371*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 372*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 373*6ec2c716SMark Zhang }; 374*6ec2c716SMark Zhang wifi_rst_ph1 { 375*6ec2c716SMark Zhang nvidia,pins = "wifi_rst_ph1"; 376*6ec2c716SMark Zhang nvidia,function = "rsvd0"; 377*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 378*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 379*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 380*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 381*6ec2c716SMark Zhang }; 382*6ec2c716SMark Zhang wifi_wake_ap_ph2 { 383*6ec2c716SMark Zhang nvidia,pins = "wifi_wake_ap_ph2"; 384*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_UP>; 385*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 386*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 387*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 388*6ec2c716SMark Zhang }; 389*6ec2c716SMark Zhang ap_wake_bt_ph3 { 390*6ec2c716SMark Zhang nvidia,pins = "ap_wake_bt_ph3"; 391*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 392*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 393*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 394*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 395*6ec2c716SMark Zhang }; 396*6ec2c716SMark Zhang bt_rst_ph4 { 397*6ec2c716SMark Zhang nvidia,pins = "bt_rst_ph4"; 398*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 399*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 400*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 401*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 402*6ec2c716SMark Zhang }; 403*6ec2c716SMark Zhang bt_wake_ap_ph5 { 404*6ec2c716SMark Zhang nvidia,pins = "bt_wake_ap_ph5"; 405*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_UP>; 406*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 407*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 408*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 409*6ec2c716SMark Zhang }; 410*6ec2c716SMark Zhang ph6 { 411*6ec2c716SMark Zhang nvidia,pins = "ph6"; 412*6ec2c716SMark Zhang nvidia,function = "rsvd0"; 413*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 414*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 415*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 416*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 417*6ec2c716SMark Zhang }; 418*6ec2c716SMark Zhang ap_wake_nfc_ph7 { 419*6ec2c716SMark Zhang nvidia,pins = "ap_wake_nfc_ph7"; 420*6ec2c716SMark Zhang nvidia,function = "rsvd0"; 421*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 422*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 423*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 424*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 425*6ec2c716SMark Zhang }; 426*6ec2c716SMark Zhang nfc_en_pi0 { 427*6ec2c716SMark Zhang nvidia,pins = "nfc_en_pi0"; 428*6ec2c716SMark Zhang nvidia,function = "rsvd0"; 429*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 430*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 431*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 432*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 433*6ec2c716SMark Zhang }; 434*6ec2c716SMark Zhang nfc_int_pi1 { 435*6ec2c716SMark Zhang nvidia,pins = "nfc_int_pi1"; 436*6ec2c716SMark Zhang nvidia,function = "rsvd0"; 437*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 438*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 439*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 440*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 441*6ec2c716SMark Zhang }; 442*6ec2c716SMark Zhang gps_en_pi2 { 443*6ec2c716SMark Zhang nvidia,pins = "gps_en_pi2"; 444*6ec2c716SMark Zhang nvidia,function = "rsvd0"; 445*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 446*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 447*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 448*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 449*6ec2c716SMark Zhang }; 450*6ec2c716SMark Zhang gps_rst_pi3 { 451*6ec2c716SMark Zhang nvidia,pins = "gps_rst_pi3"; 452*6ec2c716SMark Zhang nvidia,function = "rsvd0"; 453*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 454*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 455*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 456*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 457*6ec2c716SMark Zhang }; 458*6ec2c716SMark Zhang uart4_tx_pi4 { 459*6ec2c716SMark Zhang nvidia,pins = "uart4_tx_pi4"; 460*6ec2c716SMark Zhang nvidia,function = "uartd"; 461*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 462*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 463*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 464*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 465*6ec2c716SMark Zhang }; 466*6ec2c716SMark Zhang uart4_rx_pi5 { 467*6ec2c716SMark Zhang nvidia,pins = "uart4_rx_pi5"; 468*6ec2c716SMark Zhang nvidia,function = "uartd"; 469*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 470*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 471*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 472*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 473*6ec2c716SMark Zhang }; 474*6ec2c716SMark Zhang uart4_rts_pi6 { 475*6ec2c716SMark Zhang nvidia,pins = "uart4_rts_pi6"; 476*6ec2c716SMark Zhang nvidia,function = "uartd"; 477*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 478*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 479*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 480*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 481*6ec2c716SMark Zhang }; 482*6ec2c716SMark Zhang uart4_cts_pi7 { 483*6ec2c716SMark Zhang nvidia,pins = "uart4_cts_pi7"; 484*6ec2c716SMark Zhang nvidia,function = "uartd"; 485*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 486*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 487*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 488*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 489*6ec2c716SMark Zhang }; 490*6ec2c716SMark Zhang gen1_i2c_sda_pj0 { 491*6ec2c716SMark Zhang nvidia,pins = "gen1_i2c_sda_pj0"; 492*6ec2c716SMark Zhang nvidia,function = "i2c1"; 493*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 494*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 495*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 496*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 497*6ec2c716SMark Zhang nvidia,io-hv = <TEGRA_PIN_DISABLE>; 498*6ec2c716SMark Zhang }; 499*6ec2c716SMark Zhang gen1_i2c_scl_pj1 { 500*6ec2c716SMark Zhang nvidia,pins = "gen1_i2c_scl_pj1"; 501*6ec2c716SMark Zhang nvidia,function = "i2c1"; 502*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 503*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 504*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 505*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 506*6ec2c716SMark Zhang nvidia,io-hv = <TEGRA_PIN_DISABLE>; 507*6ec2c716SMark Zhang }; 508*6ec2c716SMark Zhang gen2_i2c_scl_pj2 { 509*6ec2c716SMark Zhang nvidia,pins = "gen2_i2c_scl_pj2"; 510*6ec2c716SMark Zhang nvidia,function = "i2c2"; 511*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 512*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 513*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 514*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 515*6ec2c716SMark Zhang nvidia,io-hv = <TEGRA_PIN_ENABLE>; 516*6ec2c716SMark Zhang }; 517*6ec2c716SMark Zhang gen2_i2c_sda_pj3 { 518*6ec2c716SMark Zhang nvidia,pins = "gen2_i2c_sda_pj3"; 519*6ec2c716SMark Zhang nvidia,function = "i2c2"; 520*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 521*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 522*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 523*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 524*6ec2c716SMark Zhang nvidia,io-hv = <TEGRA_PIN_ENABLE>; 525*6ec2c716SMark Zhang }; 526*6ec2c716SMark Zhang dap4_fs_pj4 { 527*6ec2c716SMark Zhang nvidia,pins = "dap4_fs_pj4"; 528*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 529*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 530*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 531*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 532*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 533*6ec2c716SMark Zhang }; 534*6ec2c716SMark Zhang dap4_din_pj5 { 535*6ec2c716SMark Zhang nvidia,pins = "dap4_din_pj5"; 536*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 537*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 538*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 539*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 540*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 541*6ec2c716SMark Zhang }; 542*6ec2c716SMark Zhang dap4_dout_pj6 { 543*6ec2c716SMark Zhang nvidia,pins = "dap4_dout_pj6"; 544*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 545*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 546*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 547*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 548*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 549*6ec2c716SMark Zhang }; 550*6ec2c716SMark Zhang dap4_sclk_pj7 { 551*6ec2c716SMark Zhang nvidia,pins = "dap4_sclk_pj7"; 552*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 553*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 554*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 555*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 556*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 557*6ec2c716SMark Zhang }; 558*6ec2c716SMark Zhang pk0 { 559*6ec2c716SMark Zhang nvidia,pins = "pk0"; 560*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 561*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 562*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 563*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 564*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 565*6ec2c716SMark Zhang }; 566*6ec2c716SMark Zhang pk1 { 567*6ec2c716SMark Zhang nvidia,pins = "pk1"; 568*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 569*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 570*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 571*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 572*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 573*6ec2c716SMark Zhang }; 574*6ec2c716SMark Zhang pk2 { 575*6ec2c716SMark Zhang nvidia,pins = "pk2"; 576*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 577*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 578*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 579*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 580*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 581*6ec2c716SMark Zhang }; 582*6ec2c716SMark Zhang pk3 { 583*6ec2c716SMark Zhang nvidia,pins = "pk3"; 584*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 585*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 586*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 587*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 588*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 589*6ec2c716SMark Zhang }; 590*6ec2c716SMark Zhang pk4 { 591*6ec2c716SMark Zhang nvidia,pins = "pk4"; 592*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 593*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 594*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 595*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 596*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 597*6ec2c716SMark Zhang }; 598*6ec2c716SMark Zhang pk5 { 599*6ec2c716SMark Zhang nvidia,pins = "pk5"; 600*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 601*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 602*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 603*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 604*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 605*6ec2c716SMark Zhang }; 606*6ec2c716SMark Zhang pk6 { 607*6ec2c716SMark Zhang nvidia,pins = "pk6"; 608*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 609*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 610*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 611*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 612*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 613*6ec2c716SMark Zhang }; 614*6ec2c716SMark Zhang pk7 { 615*6ec2c716SMark Zhang nvidia,pins = "pk7"; 616*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 617*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 618*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 619*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 620*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 621*6ec2c716SMark Zhang }; 622*6ec2c716SMark Zhang pl0 { 623*6ec2c716SMark Zhang nvidia,pins = "pl0"; 624*6ec2c716SMark Zhang nvidia,function = "rsvd0"; 625*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 626*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 627*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 628*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 629*6ec2c716SMark Zhang }; 630*6ec2c716SMark Zhang pl1 { 631*6ec2c716SMark Zhang nvidia,pins = "pl1"; 632*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 633*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 634*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 635*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 636*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 637*6ec2c716SMark Zhang }; 638*6ec2c716SMark Zhang sdmmc1_clk_pm0 { 639*6ec2c716SMark Zhang nvidia,pins = "sdmmc1_clk_pm0"; 640*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 641*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 642*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 643*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 644*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 645*6ec2c716SMark Zhang }; 646*6ec2c716SMark Zhang sdmmc1_cmd_pm1 { 647*6ec2c716SMark Zhang nvidia,pins = "sdmmc1_cmd_pm1"; 648*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 649*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 650*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 651*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 652*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 653*6ec2c716SMark Zhang }; 654*6ec2c716SMark Zhang sdmmc1_dat3_pm2 { 655*6ec2c716SMark Zhang nvidia,pins = "sdmmc1_dat3_pm2"; 656*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 657*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 658*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 659*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 660*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 661*6ec2c716SMark Zhang }; 662*6ec2c716SMark Zhang sdmmc1_dat2_pm3 { 663*6ec2c716SMark Zhang nvidia,pins = "sdmmc1_dat2_pm3"; 664*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 665*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 666*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 667*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 668*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 669*6ec2c716SMark Zhang }; 670*6ec2c716SMark Zhang sdmmc1_dat1_pm4 { 671*6ec2c716SMark Zhang nvidia,pins = "sdmmc1_dat1_pm4"; 672*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 673*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 674*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 675*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 676*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 677*6ec2c716SMark Zhang }; 678*6ec2c716SMark Zhang sdmmc1_dat0_pm5 { 679*6ec2c716SMark Zhang nvidia,pins = "sdmmc1_dat0_pm5"; 680*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 681*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 682*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 683*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 684*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 685*6ec2c716SMark Zhang }; 686*6ec2c716SMark Zhang sdmmc3_clk_pp0 { 687*6ec2c716SMark Zhang nvidia,pins = "sdmmc3_clk_pp0"; 688*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 689*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 690*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 691*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 692*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 693*6ec2c716SMark Zhang }; 694*6ec2c716SMark Zhang sdmmc3_cmd_pp1 { 695*6ec2c716SMark Zhang nvidia,pins = "sdmmc3_cmd_pp1"; 696*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 697*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 698*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 699*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 700*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 701*6ec2c716SMark Zhang }; 702*6ec2c716SMark Zhang sdmmc3_dat3_pp2 { 703*6ec2c716SMark Zhang nvidia,pins = "sdmmc3_dat3_pp2"; 704*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 705*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 706*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 707*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 708*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 709*6ec2c716SMark Zhang }; 710*6ec2c716SMark Zhang sdmmc3_dat2_pp3 { 711*6ec2c716SMark Zhang nvidia,pins = "sdmmc3_dat2_pp3"; 712*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 713*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 714*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 715*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 716*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 717*6ec2c716SMark Zhang }; 718*6ec2c716SMark Zhang sdmmc3_dat1_pp4 { 719*6ec2c716SMark Zhang nvidia,pins = "sdmmc3_dat1_pp4"; 720*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 721*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 722*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 723*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 724*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 725*6ec2c716SMark Zhang }; 726*6ec2c716SMark Zhang sdmmc3_dat0_pp5 { 727*6ec2c716SMark Zhang nvidia,pins = "sdmmc3_dat0_pp5"; 728*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 729*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 730*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 731*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 732*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 733*6ec2c716SMark Zhang }; 734*6ec2c716SMark Zhang cam1_mclk_ps0 { 735*6ec2c716SMark Zhang nvidia,pins = "cam1_mclk_ps0"; 736*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 737*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 738*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 739*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 740*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 741*6ec2c716SMark Zhang }; 742*6ec2c716SMark Zhang cam2_mclk_ps1 { 743*6ec2c716SMark Zhang nvidia,pins = "cam2_mclk_ps1"; 744*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 745*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 746*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 747*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 748*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 749*6ec2c716SMark Zhang }; 750*6ec2c716SMark Zhang cam_i2c_scl_ps2 { 751*6ec2c716SMark Zhang nvidia,pins = "cam_i2c_scl_ps2"; 752*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 753*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 754*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 755*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 756*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 757*6ec2c716SMark Zhang nvidia,io-hv = <TEGRA_PIN_DISABLE>; 758*6ec2c716SMark Zhang }; 759*6ec2c716SMark Zhang cam_i2c_sda_ps3 { 760*6ec2c716SMark Zhang nvidia,pins = "cam_i2c_sda_ps3"; 761*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 762*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 763*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 764*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 765*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 766*6ec2c716SMark Zhang nvidia,io-hv = <TEGRA_PIN_DISABLE>; 767*6ec2c716SMark Zhang }; 768*6ec2c716SMark Zhang cam_rst_ps4 { 769*6ec2c716SMark Zhang nvidia,pins = "cam_rst_ps4"; 770*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 771*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 772*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 773*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 774*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 775*6ec2c716SMark Zhang }; 776*6ec2c716SMark Zhang cam_af_en_ps5 { 777*6ec2c716SMark Zhang nvidia,pins = "cam_af_en_ps5"; 778*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 779*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 780*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 781*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 782*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 783*6ec2c716SMark Zhang }; 784*6ec2c716SMark Zhang cam_flash_en_ps6 { 785*6ec2c716SMark Zhang nvidia,pins = "cam_flash_en_ps6"; 786*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 787*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 788*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 789*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 790*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 791*6ec2c716SMark Zhang }; 792*6ec2c716SMark Zhang cam1_pwdn_ps7 { 793*6ec2c716SMark Zhang nvidia,pins = "cam1_pwdn_ps7"; 794*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 795*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 796*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 797*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 798*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 799*6ec2c716SMark Zhang }; 800*6ec2c716SMark Zhang cam2_pwdn_pt0 { 801*6ec2c716SMark Zhang nvidia,pins = "cam2_pwdn_pt0"; 802*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 803*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 804*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 805*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 806*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 807*6ec2c716SMark Zhang }; 808*6ec2c716SMark Zhang cam1_strobe_pt1 { 809*6ec2c716SMark Zhang nvidia,pins = "cam1_strobe_pt1"; 810*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 811*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 812*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 813*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 814*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 815*6ec2c716SMark Zhang }; 816*6ec2c716SMark Zhang uart1_tx_pu0 { 817*6ec2c716SMark Zhang nvidia,pins = "uart1_tx_pu0"; 818*6ec2c716SMark Zhang nvidia,function = "uarta"; 819*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 820*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 821*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 822*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 823*6ec2c716SMark Zhang }; 824*6ec2c716SMark Zhang uart1_rx_pu1 { 825*6ec2c716SMark Zhang nvidia,pins = "uart1_rx_pu1"; 826*6ec2c716SMark Zhang nvidia,function = "uarta"; 827*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_UP>; 828*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 829*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 830*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 831*6ec2c716SMark Zhang }; 832*6ec2c716SMark Zhang uart1_rts_pu2 { 833*6ec2c716SMark Zhang nvidia,pins = "uart1_rts_pu2"; 834*6ec2c716SMark Zhang nvidia,function = "uarta"; 835*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 836*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 837*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 838*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 839*6ec2c716SMark Zhang }; 840*6ec2c716SMark Zhang uart1_cts_pu3 { 841*6ec2c716SMark Zhang nvidia,pins = "uart1_cts_pu3"; 842*6ec2c716SMark Zhang nvidia,function = "uarta"; 843*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_UP>; 844*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 845*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 846*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 847*6ec2c716SMark Zhang }; 848*6ec2c716SMark Zhang lcd_bl_pwm_pv0 { 849*6ec2c716SMark Zhang nvidia,pins = "lcd_bl_pwm_pv0"; 850*6ec2c716SMark Zhang nvidia,function = "pwm0"; 851*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 852*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 853*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 854*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 855*6ec2c716SMark Zhang }; 856*6ec2c716SMark Zhang lcd_bl_en_pv1 { 857*6ec2c716SMark Zhang nvidia,pins = "lcd_bl_en_pv1"; 858*6ec2c716SMark Zhang nvidia,function = "rsvd0"; 859*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 860*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 861*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 862*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 863*6ec2c716SMark Zhang }; 864*6ec2c716SMark Zhang lcd_rst_pv2 { 865*6ec2c716SMark Zhang nvidia,pins = "lcd_rst_pv2"; 866*6ec2c716SMark Zhang nvidia,function = "rsvd0"; 867*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 868*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 869*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 870*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 871*6ec2c716SMark Zhang }; 872*6ec2c716SMark Zhang lcd_gpio1_pv3 { 873*6ec2c716SMark Zhang nvidia,pins = "lcd_gpio1_pv3"; 874*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 875*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 876*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 877*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 878*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 879*6ec2c716SMark Zhang }; 880*6ec2c716SMark Zhang lcd_gpio2_pv4 { 881*6ec2c716SMark Zhang nvidia,pins = "lcd_gpio2_pv4"; 882*6ec2c716SMark Zhang nvidia,function = "pwm1"; 883*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 884*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 885*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 886*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 887*6ec2c716SMark Zhang }; 888*6ec2c716SMark Zhang ap_ready_pv5 { 889*6ec2c716SMark Zhang nvidia,pins = "ap_ready_pv5"; 890*6ec2c716SMark Zhang nvidia,function = "rsvd0"; 891*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 892*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 893*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 894*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 895*6ec2c716SMark Zhang }; 896*6ec2c716SMark Zhang touch_rst_pv6 { 897*6ec2c716SMark Zhang nvidia,pins = "touch_rst_pv6"; 898*6ec2c716SMark Zhang nvidia,function = "rsvd0"; 899*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 900*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 901*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 902*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 903*6ec2c716SMark Zhang }; 904*6ec2c716SMark Zhang touch_clk_pv7 { 905*6ec2c716SMark Zhang nvidia,pins = "touch_clk_pv7"; 906*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 907*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 908*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 909*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 910*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 911*6ec2c716SMark Zhang }; 912*6ec2c716SMark Zhang modem_wake_ap_px0 { 913*6ec2c716SMark Zhang nvidia,pins = "modem_wake_ap_px0"; 914*6ec2c716SMark Zhang nvidia,function = "rsvd0"; 915*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 916*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 917*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 918*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 919*6ec2c716SMark Zhang }; 920*6ec2c716SMark Zhang touch_int_px1 { 921*6ec2c716SMark Zhang nvidia,pins = "touch_int_px1"; 922*6ec2c716SMark Zhang nvidia,function = "rsvd0"; 923*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 924*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 925*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 926*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 927*6ec2c716SMark Zhang }; 928*6ec2c716SMark Zhang motion_int_px2 { 929*6ec2c716SMark Zhang nvidia,pins = "motion_int_px2"; 930*6ec2c716SMark Zhang nvidia,function = "rsvd0"; 931*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 932*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 933*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 934*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 935*6ec2c716SMark Zhang }; 936*6ec2c716SMark Zhang als_prox_int_px3 { 937*6ec2c716SMark Zhang nvidia,pins = "als_prox_int_px3"; 938*6ec2c716SMark Zhang nvidia,function = "rsvd0"; 939*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 940*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 941*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 942*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 943*6ec2c716SMark Zhang }; 944*6ec2c716SMark Zhang temp_alert_px4 { 945*6ec2c716SMark Zhang nvidia,pins = "temp_alert_px4"; 946*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_UP>; 947*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 948*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 949*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 950*6ec2c716SMark Zhang }; 951*6ec2c716SMark Zhang button_power_on_px5 { 952*6ec2c716SMark Zhang nvidia,pins = "button_power_on_px5"; 953*6ec2c716SMark Zhang nvidia,function = "rsvd0"; 954*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 955*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 956*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 957*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 958*6ec2c716SMark Zhang }; 959*6ec2c716SMark Zhang button_vol_up_px6 { 960*6ec2c716SMark Zhang nvidia,pins = "button_vol_up_px6"; 961*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_UP>; 962*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 963*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 964*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 965*6ec2c716SMark Zhang }; 966*6ec2c716SMark Zhang button_vol_down_px7 { 967*6ec2c716SMark Zhang nvidia,pins = "button_vol_down_px7"; 968*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_UP>; 969*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 970*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 971*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 972*6ec2c716SMark Zhang }; 973*6ec2c716SMark Zhang button_slide_sw_py0 { 974*6ec2c716SMark Zhang nvidia,pins = "button_slide_sw_py0"; 975*6ec2c716SMark Zhang nvidia,function = "rsvd0"; 976*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 977*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 978*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 979*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 980*6ec2c716SMark Zhang }; 981*6ec2c716SMark Zhang button_home_py1 { 982*6ec2c716SMark Zhang nvidia,pins = "button_home_py1"; 983*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_UP>; 984*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 985*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 986*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 987*6ec2c716SMark Zhang }; 988*6ec2c716SMark Zhang lcd_te_py2 { 989*6ec2c716SMark Zhang nvidia,pins = "lcd_te_py2"; 990*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 991*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 992*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 993*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 994*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 995*6ec2c716SMark Zhang }; 996*6ec2c716SMark Zhang pwr_i2c_scl_py3 { 997*6ec2c716SMark Zhang nvidia,pins = "pwr_i2c_scl_py3"; 998*6ec2c716SMark Zhang nvidia,function = "i2cpmu"; 999*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1000*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 1001*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1002*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1003*6ec2c716SMark Zhang nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1004*6ec2c716SMark Zhang }; 1005*6ec2c716SMark Zhang pwr_i2c_sda_py4 { 1006*6ec2c716SMark Zhang nvidia,pins = "pwr_i2c_sda_py4"; 1007*6ec2c716SMark Zhang nvidia,function = "i2cpmu"; 1008*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1009*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 1010*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1011*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1012*6ec2c716SMark Zhang nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1013*6ec2c716SMark Zhang }; 1014*6ec2c716SMark Zhang clk_32k_out_py5 { 1015*6ec2c716SMark Zhang nvidia,pins = "clk_32k_out_py5"; 1016*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 1017*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1018*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1019*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1020*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1021*6ec2c716SMark Zhang }; 1022*6ec2c716SMark Zhang pz0 { 1023*6ec2c716SMark Zhang nvidia,pins = "pz0"; 1024*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_UP>; 1025*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 1026*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1027*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1028*6ec2c716SMark Zhang }; 1029*6ec2c716SMark Zhang pz1 { 1030*6ec2c716SMark Zhang nvidia,pins = "pz1"; 1031*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 1032*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1033*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1034*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1035*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1036*6ec2c716SMark Zhang }; 1037*6ec2c716SMark Zhang pz2 { 1038*6ec2c716SMark Zhang nvidia,pins = "pz2"; 1039*6ec2c716SMark Zhang nvidia,function = "rsvd2"; 1040*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1041*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1042*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1043*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1044*6ec2c716SMark Zhang }; 1045*6ec2c716SMark Zhang pz3 { 1046*6ec2c716SMark Zhang nvidia,pins = "pz3"; 1047*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 1048*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1049*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1050*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1051*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1052*6ec2c716SMark Zhang }; 1053*6ec2c716SMark Zhang pz4 { 1054*6ec2c716SMark Zhang nvidia,pins = "pz4"; 1055*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 1056*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1057*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1058*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1059*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1060*6ec2c716SMark Zhang }; 1061*6ec2c716SMark Zhang pz5 { 1062*6ec2c716SMark Zhang nvidia,pins = "pz5"; 1063*6ec2c716SMark Zhang nvidia,function = "soc"; 1064*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_UP>; 1065*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 1066*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1067*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1068*6ec2c716SMark Zhang }; 1069*6ec2c716SMark Zhang dap2_fs_paa0 { 1070*6ec2c716SMark Zhang nvidia,pins = "dap2_fs_paa0"; 1071*6ec2c716SMark Zhang nvidia,function = "i2s2"; 1072*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1073*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 1074*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1075*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1076*6ec2c716SMark Zhang }; 1077*6ec2c716SMark Zhang dap2_sclk_paa1 { 1078*6ec2c716SMark Zhang nvidia,pins = "dap2_sclk_paa1"; 1079*6ec2c716SMark Zhang nvidia,function = "i2s2"; 1080*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1081*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 1082*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1083*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1084*6ec2c716SMark Zhang }; 1085*6ec2c716SMark Zhang dap2_din_paa2 { 1086*6ec2c716SMark Zhang nvidia,pins = "dap2_din_paa2"; 1087*6ec2c716SMark Zhang nvidia,function = "i2s2"; 1088*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1089*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 1090*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1091*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1092*6ec2c716SMark Zhang }; 1093*6ec2c716SMark Zhang dap2_dout_paa3 { 1094*6ec2c716SMark Zhang nvidia,pins = "dap2_dout_paa3"; 1095*6ec2c716SMark Zhang nvidia,function = "i2s2"; 1096*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1097*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 1098*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1099*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1100*6ec2c716SMark Zhang }; 1101*6ec2c716SMark Zhang aud_mclk_pbb0 { 1102*6ec2c716SMark Zhang nvidia,pins = "aud_mclk_pbb0"; 1103*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 1104*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1105*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1106*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1107*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1108*6ec2c716SMark Zhang }; 1109*6ec2c716SMark Zhang dvfs_pwm_pbb1 { 1110*6ec2c716SMark Zhang nvidia,pins = "dvfs_pwm_pbb1"; 1111*6ec2c716SMark Zhang nvidia,function = "cldvfs"; 1112*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1113*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1114*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1115*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1116*6ec2c716SMark Zhang }; 1117*6ec2c716SMark Zhang dvfs_clk_pbb2 { 1118*6ec2c716SMark Zhang nvidia,pins = "dvfs_clk_pbb2"; 1119*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1120*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 1121*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1122*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1123*6ec2c716SMark Zhang }; 1124*6ec2c716SMark Zhang gpio_x1_aud_pbb3 { 1125*6ec2c716SMark Zhang nvidia,pins = "gpio_x1_aud_pbb3"; 1126*6ec2c716SMark Zhang nvidia,function = "rsvd0"; 1127*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1128*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1129*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1130*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1131*6ec2c716SMark Zhang }; 1132*6ec2c716SMark Zhang gpio_x3_aud_pbb4 { 1133*6ec2c716SMark Zhang nvidia,pins = "gpio_x3_aud_pbb4"; 1134*6ec2c716SMark Zhang nvidia,function = "rsvd0"; 1135*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1136*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1137*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1138*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1139*6ec2c716SMark Zhang }; 1140*6ec2c716SMark Zhang hdmi_cec_pcc0 { 1141*6ec2c716SMark Zhang nvidia,pins = "hdmi_cec_pcc0"; 1142*6ec2c716SMark Zhang nvidia,function = "cec"; 1143*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1144*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 1145*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1146*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1147*6ec2c716SMark Zhang nvidia,io-hv = <TEGRA_PIN_ENABLE>; 1148*6ec2c716SMark Zhang }; 1149*6ec2c716SMark Zhang hdmi_int_dp_hpd_pcc1 { 1150*6ec2c716SMark Zhang nvidia,pins = "hdmi_int_dp_hpd_pcc1"; 1151*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1152*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 1153*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1154*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1155*6ec2c716SMark Zhang nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1156*6ec2c716SMark Zhang }; 1157*6ec2c716SMark Zhang spdif_out_pcc2 { 1158*6ec2c716SMark Zhang nvidia,pins = "spdif_out_pcc2"; 1159*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 1160*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1161*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1162*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1163*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1164*6ec2c716SMark Zhang }; 1165*6ec2c716SMark Zhang spdif_in_pcc3 { 1166*6ec2c716SMark Zhang nvidia,pins = "spdif_in_pcc3"; 1167*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 1168*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1169*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1170*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1171*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1172*6ec2c716SMark Zhang }; 1173*6ec2c716SMark Zhang usb_vbus_en0_pcc4 { 1174*6ec2c716SMark Zhang nvidia,pins = "usb_vbus_en0_pcc4"; 1175*6ec2c716SMark Zhang nvidia,function = "usb"; 1176*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1177*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 1178*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1179*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1180*6ec2c716SMark Zhang nvidia,io-hv = <TEGRA_PIN_ENABLE>; 1181*6ec2c716SMark Zhang }; 1182*6ec2c716SMark Zhang usb_vbus_en1_pcc5 { 1183*6ec2c716SMark Zhang nvidia,pins = "usb_vbus_en1_pcc5"; 1184*6ec2c716SMark Zhang nvidia,function = "usb"; 1185*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1186*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 1187*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1188*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1189*6ec2c716SMark Zhang nvidia,io-hv = <TEGRA_PIN_ENABLE>; 1190*6ec2c716SMark Zhang }; 1191*6ec2c716SMark Zhang dp_hpd0_pcc6 { 1192*6ec2c716SMark Zhang nvidia,pins = "dp_hpd0_pcc6"; 1193*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 1194*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1195*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1196*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1197*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1198*6ec2c716SMark Zhang }; 1199*6ec2c716SMark Zhang pcc7 { 1200*6ec2c716SMark Zhang nvidia,pins = "pcc7"; 1201*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1202*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 1203*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1204*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1205*6ec2c716SMark Zhang nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1206*6ec2c716SMark Zhang }; 1207*6ec2c716SMark Zhang spi2_cs1_pdd0 { 1208*6ec2c716SMark Zhang nvidia,pins = "spi2_cs1_pdd0"; 1209*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 1210*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1211*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1212*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1213*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1214*6ec2c716SMark Zhang }; 1215*6ec2c716SMark Zhang qspi_sck_pee0 { 1216*6ec2c716SMark Zhang nvidia,pins = "qspi_sck_pee0"; 1217*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 1218*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1219*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1220*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1221*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1222*6ec2c716SMark Zhang }; 1223*6ec2c716SMark Zhang qspi_cs_n_pee1 { 1224*6ec2c716SMark Zhang nvidia,pins = "qspi_cs_n_pee1"; 1225*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 1226*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1227*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1228*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1229*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1230*6ec2c716SMark Zhang }; 1231*6ec2c716SMark Zhang qspi_io0_pee2 { 1232*6ec2c716SMark Zhang nvidia,pins = "qspi_io0_pee2"; 1233*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 1234*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1235*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1236*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1237*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1238*6ec2c716SMark Zhang }; 1239*6ec2c716SMark Zhang qspi_io1_pee3 { 1240*6ec2c716SMark Zhang nvidia,pins = "qspi_io1_pee3"; 1241*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 1242*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1243*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1244*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1245*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1246*6ec2c716SMark Zhang }; 1247*6ec2c716SMark Zhang qspi_io2_pee4 { 1248*6ec2c716SMark Zhang nvidia,pins = "qspi_io2_pee4"; 1249*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 1250*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1251*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1252*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1253*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1254*6ec2c716SMark Zhang }; 1255*6ec2c716SMark Zhang qspi_io3_pee5 { 1256*6ec2c716SMark Zhang nvidia,pins = "qspi_io3_pee5"; 1257*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 1258*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1259*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1260*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1261*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1262*6ec2c716SMark Zhang }; 1263*6ec2c716SMark Zhang core_pwr_req { 1264*6ec2c716SMark Zhang nvidia,pins = "core_pwr_req"; 1265*6ec2c716SMark Zhang nvidia,function = "core"; 1266*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1267*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 1268*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1269*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1270*6ec2c716SMark Zhang }; 1271*6ec2c716SMark Zhang cpu_pwr_req { 1272*6ec2c716SMark Zhang nvidia,pins = "cpu_pwr_req"; 1273*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 1274*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1275*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1276*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1277*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1278*6ec2c716SMark Zhang }; 1279*6ec2c716SMark Zhang pwr_int_n { 1280*6ec2c716SMark Zhang nvidia,pins = "pwr_int_n"; 1281*6ec2c716SMark Zhang nvidia,function = "pmi"; 1282*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_UP>; 1283*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 1284*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1285*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1286*6ec2c716SMark Zhang }; 1287*6ec2c716SMark Zhang clk_32k_in { 1288*6ec2c716SMark Zhang nvidia,pins = "clk_32k_in"; 1289*6ec2c716SMark Zhang nvidia,function = "clk"; 1290*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1291*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 1292*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1293*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1294*6ec2c716SMark Zhang }; 1295*6ec2c716SMark Zhang jtag_rtck { 1296*6ec2c716SMark Zhang nvidia,pins = "jtag_rtck"; 1297*6ec2c716SMark Zhang nvidia,function = "jtag"; 1298*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1299*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 1300*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1301*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1302*6ec2c716SMark Zhang }; 1303*6ec2c716SMark Zhang clk_req { 1304*6ec2c716SMark Zhang nvidia,pins = "clk_req"; 1305*6ec2c716SMark Zhang nvidia,function = "rsvd1"; 1306*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1307*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_ENABLE>; 1308*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1309*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1310*6ec2c716SMark Zhang }; 1311*6ec2c716SMark Zhang shutdown { 1312*6ec2c716SMark Zhang nvidia,pins = "shutdown"; 1313*6ec2c716SMark Zhang nvidia,function = "shutdown"; 1314*6ec2c716SMark Zhang nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1315*6ec2c716SMark Zhang nvidia,tristate = <TEGRA_PIN_DISABLE>; 1316*6ec2c716SMark Zhang nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1317*6ec2c716SMark Zhang nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1318*6ec2c716SMark Zhang }; 1319*6ec2c716SMark Zhang }; 1320*6ec2c716SMark Zhang }; 1321*6ec2c716SMark Zhang 1322dd03aeefSMark Zhang serial@70006000 { 1323dd03aeefSMark Zhang status = "okay"; 1324dd03aeefSMark Zhang }; 1325dd03aeefSMark Zhang 1326dd03aeefSMark Zhang pmc@7000e400 { 1327dd03aeefSMark Zhang nvidia,invert-interrupt; 1328dd03aeefSMark Zhang nvidia,suspend-mode = <0>; 1329dd03aeefSMark Zhang nvidia,cpu-pwr-good-time = <0>; 1330dd03aeefSMark Zhang nvidia,cpu-pwr-off-time = <0>; 1331dd03aeefSMark Zhang nvidia,core-pwr-good-time = <4587 3876>; 1332dd03aeefSMark Zhang nvidia,core-pwr-off-time = <39065>; 1333dd03aeefSMark Zhang nvidia,core-power-req-active-high; 1334dd03aeefSMark Zhang nvidia,sys-clock-req-active-high; 1335dd03aeefSMark Zhang status = "okay"; 1336dd03aeefSMark Zhang }; 1337dd03aeefSMark Zhang 1338dd03aeefSMark Zhang sdhci@700b0600 { 1339dd03aeefSMark Zhang bus-width = <8>; 1340dd03aeefSMark Zhang non-removable; 1341dd03aeefSMark Zhang status = "okay"; 1342dd03aeefSMark Zhang }; 1343dd03aeefSMark Zhang 1344dd03aeefSMark Zhang clocks { 1345dd03aeefSMark Zhang compatible = "simple-bus"; 1346dd03aeefSMark Zhang #address-cells = <1>; 1347dd03aeefSMark Zhang #size-cells = <0>; 1348dd03aeefSMark Zhang 1349dd03aeefSMark Zhang clk32k_in: clock@0 { 1350dd03aeefSMark Zhang compatible = "fixed-clock"; 1351dd03aeefSMark Zhang reg = <0>; 1352dd03aeefSMark Zhang #clock-cells = <0>; 1353dd03aeefSMark Zhang clock-frequency = <32768>; 1354dd03aeefSMark Zhang }; 1355dd03aeefSMark Zhang }; 1356dd03aeefSMark Zhang 13577152879dSMark Zhang gpio-keys { 13587152879dSMark Zhang compatible = "gpio-keys"; 13597152879dSMark Zhang status = "okay"; 13607152879dSMark Zhang 13617152879dSMark Zhang power { 13627152879dSMark Zhang debounce-interval = <30>; 13637152879dSMark Zhang gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>; 13647152879dSMark Zhang label = "Power"; 13657152879dSMark Zhang linux,code = <KEY_POWER>; 13667152879dSMark Zhang wakeup-event-action = <EV_ACT_ASSERTED>; 13677152879dSMark Zhang wakeup-source; 13687152879dSMark Zhang }; 13697152879dSMark Zhang }; 13707152879dSMark Zhang 1371dd03aeefSMark Zhang cpus { 1372dd03aeefSMark Zhang cpu@0 { 1373dd03aeefSMark Zhang enable-method = "psci"; 1374dd03aeefSMark Zhang }; 1375dd03aeefSMark Zhang 1376dd03aeefSMark Zhang cpu@1 { 1377dd03aeefSMark Zhang enable-method = "psci"; 1378dd03aeefSMark Zhang }; 1379dd03aeefSMark Zhang 1380dd03aeefSMark Zhang cpu@2 { 1381dd03aeefSMark Zhang enable-method = "psci"; 1382dd03aeefSMark Zhang }; 1383dd03aeefSMark Zhang 1384dd03aeefSMark Zhang cpu@3 { 1385dd03aeefSMark Zhang enable-method = "psci"; 1386dd03aeefSMark Zhang }; 1387dd03aeefSMark Zhang }; 1388dd03aeefSMark Zhang 1389dd03aeefSMark Zhang psci { 1390dd03aeefSMark Zhang compatible = "arm,psci-1.0"; 1391dd03aeefSMark Zhang method = "smc"; 1392dd03aeefSMark Zhang }; 1393dd03aeefSMark Zhang}; 1394