1*8e01fb15SFrank Wunderlich// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2*8e01fb15SFrank Wunderlich/* 3*8e01fb15SFrank Wunderlich * Copyright (C) 2021 MediaTek Inc. 4*8e01fb15SFrank Wunderlich * Authors: Sam.Shih <sam.shih@mediatek.com> 5*8e01fb15SFrank Wunderlich * Frank Wunderlich <frank-w@public-files.de> 6*8e01fb15SFrank Wunderlich * Daniel Golle <daniel@makrotopia.org> 7*8e01fb15SFrank Wunderlich */ 8*8e01fb15SFrank Wunderlich 9*8e01fb15SFrank Wunderlich/dts-v1/; 10*8e01fb15SFrank Wunderlich#include <dt-bindings/gpio/gpio.h> 11*8e01fb15SFrank Wunderlich#include <dt-bindings/input/input.h> 12*8e01fb15SFrank Wunderlich#include <dt-bindings/leds/common.h> 13*8e01fb15SFrank Wunderlich#include <dt-bindings/pinctrl/mt65xx.h> 14*8e01fb15SFrank Wunderlich 15*8e01fb15SFrank Wunderlich#include "mt7986a.dtsi" 16*8e01fb15SFrank Wunderlich 17*8e01fb15SFrank Wunderlich/ { 18*8e01fb15SFrank Wunderlich model = "Bananapi BPI-R3"; 19*8e01fb15SFrank Wunderlich compatible = "bananapi,bpi-r3", "mediatek,mt7986a"; 20*8e01fb15SFrank Wunderlich 21*8e01fb15SFrank Wunderlich aliases { 22*8e01fb15SFrank Wunderlich serial0 = &uart0; 23*8e01fb15SFrank Wunderlich ethernet0 = &gmac0; 24*8e01fb15SFrank Wunderlich ethernet1 = &gmac1; 25*8e01fb15SFrank Wunderlich }; 26*8e01fb15SFrank Wunderlich 27*8e01fb15SFrank Wunderlich chosen { 28*8e01fb15SFrank Wunderlich stdout-path = "serial0:115200n8"; 29*8e01fb15SFrank Wunderlich }; 30*8e01fb15SFrank Wunderlich 31*8e01fb15SFrank Wunderlich dcin: regulator-12vd { 32*8e01fb15SFrank Wunderlich compatible = "regulator-fixed"; 33*8e01fb15SFrank Wunderlich regulator-name = "12vd"; 34*8e01fb15SFrank Wunderlich regulator-min-microvolt = <12000000>; 35*8e01fb15SFrank Wunderlich regulator-max-microvolt = <12000000>; 36*8e01fb15SFrank Wunderlich regulator-boot-on; 37*8e01fb15SFrank Wunderlich regulator-always-on; 38*8e01fb15SFrank Wunderlich }; 39*8e01fb15SFrank Wunderlich 40*8e01fb15SFrank Wunderlich gpio-keys { 41*8e01fb15SFrank Wunderlich compatible = "gpio-keys"; 42*8e01fb15SFrank Wunderlich 43*8e01fb15SFrank Wunderlich reset-key { 44*8e01fb15SFrank Wunderlich label = "reset"; 45*8e01fb15SFrank Wunderlich linux,code = <KEY_RESTART>; 46*8e01fb15SFrank Wunderlich gpios = <&pio 9 GPIO_ACTIVE_LOW>; 47*8e01fb15SFrank Wunderlich }; 48*8e01fb15SFrank Wunderlich 49*8e01fb15SFrank Wunderlich wps-key { 50*8e01fb15SFrank Wunderlich label = "wps"; 51*8e01fb15SFrank Wunderlich linux,code = <KEY_WPS_BUTTON>; 52*8e01fb15SFrank Wunderlich gpios = <&pio 10 GPIO_ACTIVE_LOW>; 53*8e01fb15SFrank Wunderlich }; 54*8e01fb15SFrank Wunderlich }; 55*8e01fb15SFrank Wunderlich 56*8e01fb15SFrank Wunderlich /* i2c of the left SFP cage (wan) */ 57*8e01fb15SFrank Wunderlich i2c_sfp1: i2c-gpio-0 { 58*8e01fb15SFrank Wunderlich compatible = "i2c-gpio"; 59*8e01fb15SFrank Wunderlich sda-gpios = <&pio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 60*8e01fb15SFrank Wunderlich scl-gpios = <&pio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 61*8e01fb15SFrank Wunderlich i2c-gpio,delay-us = <2>; 62*8e01fb15SFrank Wunderlich #address-cells = <1>; 63*8e01fb15SFrank Wunderlich #size-cells = <0>; 64*8e01fb15SFrank Wunderlich }; 65*8e01fb15SFrank Wunderlich 66*8e01fb15SFrank Wunderlich /* i2c of the right SFP cage (lan) */ 67*8e01fb15SFrank Wunderlich i2c_sfp2: i2c-gpio-1 { 68*8e01fb15SFrank Wunderlich compatible = "i2c-gpio"; 69*8e01fb15SFrank Wunderlich sda-gpios = <&pio 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 70*8e01fb15SFrank Wunderlich scl-gpios = <&pio 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 71*8e01fb15SFrank Wunderlich i2c-gpio,delay-us = <2>; 72*8e01fb15SFrank Wunderlich #address-cells = <1>; 73*8e01fb15SFrank Wunderlich #size-cells = <0>; 74*8e01fb15SFrank Wunderlich }; 75*8e01fb15SFrank Wunderlich 76*8e01fb15SFrank Wunderlich leds { 77*8e01fb15SFrank Wunderlich compatible = "gpio-leds"; 78*8e01fb15SFrank Wunderlich 79*8e01fb15SFrank Wunderlich green_led: led-0 { 80*8e01fb15SFrank Wunderlich color = <LED_COLOR_ID_GREEN>; 81*8e01fb15SFrank Wunderlich function = LED_FUNCTION_POWER; 82*8e01fb15SFrank Wunderlich gpios = <&pio 69 GPIO_ACTIVE_HIGH>; 83*8e01fb15SFrank Wunderlich default-state = "on"; 84*8e01fb15SFrank Wunderlich }; 85*8e01fb15SFrank Wunderlich 86*8e01fb15SFrank Wunderlich blue_led: led-1 { 87*8e01fb15SFrank Wunderlich color = <LED_COLOR_ID_BLUE>; 88*8e01fb15SFrank Wunderlich function = LED_FUNCTION_STATUS; 89*8e01fb15SFrank Wunderlich gpios = <&pio 86 GPIO_ACTIVE_HIGH>; 90*8e01fb15SFrank Wunderlich default-state = "off"; 91*8e01fb15SFrank Wunderlich }; 92*8e01fb15SFrank Wunderlich }; 93*8e01fb15SFrank Wunderlich 94*8e01fb15SFrank Wunderlich reg_1p8v: regulator-1p8v { 95*8e01fb15SFrank Wunderlich compatible = "regulator-fixed"; 96*8e01fb15SFrank Wunderlich regulator-name = "1.8vd"; 97*8e01fb15SFrank Wunderlich regulator-min-microvolt = <1800000>; 98*8e01fb15SFrank Wunderlich regulator-max-microvolt = <1800000>; 99*8e01fb15SFrank Wunderlich regulator-boot-on; 100*8e01fb15SFrank Wunderlich regulator-always-on; 101*8e01fb15SFrank Wunderlich vin-supply = <&dcin>; 102*8e01fb15SFrank Wunderlich }; 103*8e01fb15SFrank Wunderlich 104*8e01fb15SFrank Wunderlich reg_3p3v: regulator-3p3v { 105*8e01fb15SFrank Wunderlich compatible = "regulator-fixed"; 106*8e01fb15SFrank Wunderlich regulator-name = "3.3vd"; 107*8e01fb15SFrank Wunderlich regulator-min-microvolt = <3300000>; 108*8e01fb15SFrank Wunderlich regulator-max-microvolt = <3300000>; 109*8e01fb15SFrank Wunderlich regulator-boot-on; 110*8e01fb15SFrank Wunderlich regulator-always-on; 111*8e01fb15SFrank Wunderlich vin-supply = <&dcin>; 112*8e01fb15SFrank Wunderlich }; 113*8e01fb15SFrank Wunderlich 114*8e01fb15SFrank Wunderlich /* left SFP cage (wan) */ 115*8e01fb15SFrank Wunderlich sfp1: sfp-1 { 116*8e01fb15SFrank Wunderlich compatible = "sff,sfp"; 117*8e01fb15SFrank Wunderlich i2c-bus = <&i2c_sfp1>; 118*8e01fb15SFrank Wunderlich los-gpios = <&pio 46 GPIO_ACTIVE_HIGH>; 119*8e01fb15SFrank Wunderlich mod-def0-gpios = <&pio 49 GPIO_ACTIVE_LOW>; 120*8e01fb15SFrank Wunderlich tx-disable-gpios = <&pio 20 GPIO_ACTIVE_HIGH>; 121*8e01fb15SFrank Wunderlich tx-fault-gpios = <&pio 7 GPIO_ACTIVE_HIGH>; 122*8e01fb15SFrank Wunderlich }; 123*8e01fb15SFrank Wunderlich 124*8e01fb15SFrank Wunderlich /* right SFP cage (lan) */ 125*8e01fb15SFrank Wunderlich sfp2: sfp-2 { 126*8e01fb15SFrank Wunderlich compatible = "sff,sfp"; 127*8e01fb15SFrank Wunderlich i2c-bus = <&i2c_sfp2>; 128*8e01fb15SFrank Wunderlich los-gpios = <&pio 31 GPIO_ACTIVE_HIGH>; 129*8e01fb15SFrank Wunderlich mod-def0-gpios = <&pio 47 GPIO_ACTIVE_LOW>; 130*8e01fb15SFrank Wunderlich tx-disable-gpios = <&pio 15 GPIO_ACTIVE_HIGH>; 131*8e01fb15SFrank Wunderlich tx-fault-gpios = <&pio 48 GPIO_ACTIVE_HIGH>; 132*8e01fb15SFrank Wunderlich }; 133*8e01fb15SFrank Wunderlich}; 134*8e01fb15SFrank Wunderlich 135*8e01fb15SFrank Wunderlich&crypto { 136*8e01fb15SFrank Wunderlich status = "okay"; 137*8e01fb15SFrank Wunderlich}; 138*8e01fb15SFrank Wunderlich 139*8e01fb15SFrank Wunderlichð { 140*8e01fb15SFrank Wunderlich status = "okay"; 141*8e01fb15SFrank Wunderlich 142*8e01fb15SFrank Wunderlich gmac0: mac@0 { 143*8e01fb15SFrank Wunderlich compatible = "mediatek,eth-mac"; 144*8e01fb15SFrank Wunderlich reg = <0>; 145*8e01fb15SFrank Wunderlich phy-mode = "2500base-x"; 146*8e01fb15SFrank Wunderlich 147*8e01fb15SFrank Wunderlich fixed-link { 148*8e01fb15SFrank Wunderlich speed = <2500>; 149*8e01fb15SFrank Wunderlich full-duplex; 150*8e01fb15SFrank Wunderlich pause; 151*8e01fb15SFrank Wunderlich }; 152*8e01fb15SFrank Wunderlich }; 153*8e01fb15SFrank Wunderlich 154*8e01fb15SFrank Wunderlich gmac1: mac@1 { 155*8e01fb15SFrank Wunderlich compatible = "mediatek,eth-mac"; 156*8e01fb15SFrank Wunderlich reg = <1>; 157*8e01fb15SFrank Wunderlich phy-mode = "2500base-x"; 158*8e01fb15SFrank Wunderlich sfp = <&sfp1>; 159*8e01fb15SFrank Wunderlich managed = "in-band-status"; 160*8e01fb15SFrank Wunderlich }; 161*8e01fb15SFrank Wunderlich 162*8e01fb15SFrank Wunderlich mdio: mdio-bus { 163*8e01fb15SFrank Wunderlich #address-cells = <1>; 164*8e01fb15SFrank Wunderlich #size-cells = <0>; 165*8e01fb15SFrank Wunderlich }; 166*8e01fb15SFrank Wunderlich}; 167*8e01fb15SFrank Wunderlich 168*8e01fb15SFrank Wunderlich&mdio { 169*8e01fb15SFrank Wunderlich switch: switch@31 { 170*8e01fb15SFrank Wunderlich compatible = "mediatek,mt7531"; 171*8e01fb15SFrank Wunderlich reg = <31>; 172*8e01fb15SFrank Wunderlich interrupt-controller; 173*8e01fb15SFrank Wunderlich #interrupt-cells = <1>; 174*8e01fb15SFrank Wunderlich interrupt-parent = <&pio>; 175*8e01fb15SFrank Wunderlich interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; 176*8e01fb15SFrank Wunderlich reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>; 177*8e01fb15SFrank Wunderlich }; 178*8e01fb15SFrank Wunderlich}; 179*8e01fb15SFrank Wunderlich 180*8e01fb15SFrank Wunderlich&mmc0 { 181*8e01fb15SFrank Wunderlich pinctrl-names = "default", "state_uhs"; 182*8e01fb15SFrank Wunderlich pinctrl-0 = <&mmc0_pins_default>; 183*8e01fb15SFrank Wunderlich pinctrl-1 = <&mmc0_pins_uhs>; 184*8e01fb15SFrank Wunderlich vmmc-supply = <®_3p3v>; 185*8e01fb15SFrank Wunderlich vqmmc-supply = <®_1p8v>; 186*8e01fb15SFrank Wunderlich}; 187*8e01fb15SFrank Wunderlich 188*8e01fb15SFrank Wunderlich&i2c0 { 189*8e01fb15SFrank Wunderlich pinctrl-names = "default"; 190*8e01fb15SFrank Wunderlich pinctrl-0 = <&i2c_pins>; 191*8e01fb15SFrank Wunderlich status = "okay"; 192*8e01fb15SFrank Wunderlich}; 193*8e01fb15SFrank Wunderlich 194*8e01fb15SFrank Wunderlich&pcie { 195*8e01fb15SFrank Wunderlich pinctrl-names = "default"; 196*8e01fb15SFrank Wunderlich pinctrl-0 = <&pcie_pins>; 197*8e01fb15SFrank Wunderlich status = "okay"; 198*8e01fb15SFrank Wunderlich}; 199*8e01fb15SFrank Wunderlich 200*8e01fb15SFrank Wunderlich&pcie_phy { 201*8e01fb15SFrank Wunderlich status = "okay"; 202*8e01fb15SFrank Wunderlich}; 203*8e01fb15SFrank Wunderlich 204*8e01fb15SFrank Wunderlich&pio { 205*8e01fb15SFrank Wunderlich i2c_pins: i2c-pins { 206*8e01fb15SFrank Wunderlich mux { 207*8e01fb15SFrank Wunderlich function = "i2c"; 208*8e01fb15SFrank Wunderlich groups = "i2c"; 209*8e01fb15SFrank Wunderlich }; 210*8e01fb15SFrank Wunderlich }; 211*8e01fb15SFrank Wunderlich 212*8e01fb15SFrank Wunderlich mmc0_pins_default: mmc0-pins { 213*8e01fb15SFrank Wunderlich mux { 214*8e01fb15SFrank Wunderlich function = "emmc"; 215*8e01fb15SFrank Wunderlich groups = "emmc_51"; 216*8e01fb15SFrank Wunderlich }; 217*8e01fb15SFrank Wunderlich conf-cmd-dat { 218*8e01fb15SFrank Wunderlich pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", 219*8e01fb15SFrank Wunderlich "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", 220*8e01fb15SFrank Wunderlich "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; 221*8e01fb15SFrank Wunderlich input-enable; 222*8e01fb15SFrank Wunderlich drive-strength = <4>; 223*8e01fb15SFrank Wunderlich bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ 224*8e01fb15SFrank Wunderlich }; 225*8e01fb15SFrank Wunderlich conf-clk { 226*8e01fb15SFrank Wunderlich pins = "EMMC_CK"; 227*8e01fb15SFrank Wunderlich drive-strength = <6>; 228*8e01fb15SFrank Wunderlich bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ 229*8e01fb15SFrank Wunderlich }; 230*8e01fb15SFrank Wunderlich conf-ds { 231*8e01fb15SFrank Wunderlich pins = "EMMC_DSL"; 232*8e01fb15SFrank Wunderlich bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ 233*8e01fb15SFrank Wunderlich }; 234*8e01fb15SFrank Wunderlich conf-rst { 235*8e01fb15SFrank Wunderlich pins = "EMMC_RSTB"; 236*8e01fb15SFrank Wunderlich drive-strength = <4>; 237*8e01fb15SFrank Wunderlich bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ 238*8e01fb15SFrank Wunderlich }; 239*8e01fb15SFrank Wunderlich }; 240*8e01fb15SFrank Wunderlich 241*8e01fb15SFrank Wunderlich mmc0_pins_uhs: mmc0-uhs-pins { 242*8e01fb15SFrank Wunderlich mux { 243*8e01fb15SFrank Wunderlich function = "emmc"; 244*8e01fb15SFrank Wunderlich groups = "emmc_51"; 245*8e01fb15SFrank Wunderlich }; 246*8e01fb15SFrank Wunderlich conf-cmd-dat { 247*8e01fb15SFrank Wunderlich pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", 248*8e01fb15SFrank Wunderlich "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", 249*8e01fb15SFrank Wunderlich "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; 250*8e01fb15SFrank Wunderlich input-enable; 251*8e01fb15SFrank Wunderlich drive-strength = <4>; 252*8e01fb15SFrank Wunderlich bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ 253*8e01fb15SFrank Wunderlich }; 254*8e01fb15SFrank Wunderlich conf-clk { 255*8e01fb15SFrank Wunderlich pins = "EMMC_CK"; 256*8e01fb15SFrank Wunderlich drive-strength = <6>; 257*8e01fb15SFrank Wunderlich bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ 258*8e01fb15SFrank Wunderlich }; 259*8e01fb15SFrank Wunderlich conf-ds { 260*8e01fb15SFrank Wunderlich pins = "EMMC_DSL"; 261*8e01fb15SFrank Wunderlich bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ 262*8e01fb15SFrank Wunderlich }; 263*8e01fb15SFrank Wunderlich conf-rst { 264*8e01fb15SFrank Wunderlich pins = "EMMC_RSTB"; 265*8e01fb15SFrank Wunderlich drive-strength = <4>; 266*8e01fb15SFrank Wunderlich bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ 267*8e01fb15SFrank Wunderlich }; 268*8e01fb15SFrank Wunderlich }; 269*8e01fb15SFrank Wunderlich 270*8e01fb15SFrank Wunderlich pcie_pins: pcie-pins { 271*8e01fb15SFrank Wunderlich mux { 272*8e01fb15SFrank Wunderlich function = "pcie"; 273*8e01fb15SFrank Wunderlich groups = "pcie_clk", "pcie_pereset"; 274*8e01fb15SFrank Wunderlich }; 275*8e01fb15SFrank Wunderlich }; 276*8e01fb15SFrank Wunderlich 277*8e01fb15SFrank Wunderlich spi_flash_pins: spi-flash-pins { 278*8e01fb15SFrank Wunderlich mux { 279*8e01fb15SFrank Wunderlich function = "spi"; 280*8e01fb15SFrank Wunderlich groups = "spi0", "spi0_wp_hold"; 281*8e01fb15SFrank Wunderlich }; 282*8e01fb15SFrank Wunderlich }; 283*8e01fb15SFrank Wunderlich 284*8e01fb15SFrank Wunderlich spic_pins: spic-pins { 285*8e01fb15SFrank Wunderlich mux { 286*8e01fb15SFrank Wunderlich function = "spi"; 287*8e01fb15SFrank Wunderlich groups = "spi1_0"; 288*8e01fb15SFrank Wunderlich }; 289*8e01fb15SFrank Wunderlich }; 290*8e01fb15SFrank Wunderlich 291*8e01fb15SFrank Wunderlich uart1_pins: uart1-pins { 292*8e01fb15SFrank Wunderlich mux { 293*8e01fb15SFrank Wunderlich function = "uart"; 294*8e01fb15SFrank Wunderlich groups = "uart1_rx_tx"; 295*8e01fb15SFrank Wunderlich }; 296*8e01fb15SFrank Wunderlich }; 297*8e01fb15SFrank Wunderlich 298*8e01fb15SFrank Wunderlich uart2_pins: uart2-pins { 299*8e01fb15SFrank Wunderlich mux { 300*8e01fb15SFrank Wunderlich function = "uart"; 301*8e01fb15SFrank Wunderlich groups = "uart2_0_rx_tx"; 302*8e01fb15SFrank Wunderlich }; 303*8e01fb15SFrank Wunderlich }; 304*8e01fb15SFrank Wunderlich 305*8e01fb15SFrank Wunderlich wf_2g_5g_pins: wf-2g-5g-pins { 306*8e01fb15SFrank Wunderlich mux { 307*8e01fb15SFrank Wunderlich function = "wifi"; 308*8e01fb15SFrank Wunderlich groups = "wf_2g", "wf_5g"; 309*8e01fb15SFrank Wunderlich }; 310*8e01fb15SFrank Wunderlich conf { 311*8e01fb15SFrank Wunderlich pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", 312*8e01fb15SFrank Wunderlich "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", 313*8e01fb15SFrank Wunderlich "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", 314*8e01fb15SFrank Wunderlich "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", 315*8e01fb15SFrank Wunderlich "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", 316*8e01fb15SFrank Wunderlich "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", 317*8e01fb15SFrank Wunderlich "WF1_TOP_CLK", "WF1_TOP_DATA"; 318*8e01fb15SFrank Wunderlich drive-strength = <4>; 319*8e01fb15SFrank Wunderlich }; 320*8e01fb15SFrank Wunderlich }; 321*8e01fb15SFrank Wunderlich 322*8e01fb15SFrank Wunderlich wf_dbdc_pins: wf-dbdc-pins { 323*8e01fb15SFrank Wunderlich mux { 324*8e01fb15SFrank Wunderlich function = "wifi"; 325*8e01fb15SFrank Wunderlich groups = "wf_dbdc"; 326*8e01fb15SFrank Wunderlich }; 327*8e01fb15SFrank Wunderlich conf { 328*8e01fb15SFrank Wunderlich pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", 329*8e01fb15SFrank Wunderlich "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", 330*8e01fb15SFrank Wunderlich "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", 331*8e01fb15SFrank Wunderlich "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", 332*8e01fb15SFrank Wunderlich "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", 333*8e01fb15SFrank Wunderlich "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", 334*8e01fb15SFrank Wunderlich "WF1_TOP_CLK", "WF1_TOP_DATA"; 335*8e01fb15SFrank Wunderlich drive-strength = <4>; 336*8e01fb15SFrank Wunderlich }; 337*8e01fb15SFrank Wunderlich }; 338*8e01fb15SFrank Wunderlich 339*8e01fb15SFrank Wunderlich wf_led_pins: wf-led-pins { 340*8e01fb15SFrank Wunderlich mux { 341*8e01fb15SFrank Wunderlich function = "led"; 342*8e01fb15SFrank Wunderlich groups = "wifi_led"; 343*8e01fb15SFrank Wunderlich }; 344*8e01fb15SFrank Wunderlich }; 345*8e01fb15SFrank Wunderlich}; 346*8e01fb15SFrank Wunderlich 347*8e01fb15SFrank Wunderlich&spi0 { 348*8e01fb15SFrank Wunderlich pinctrl-names = "default"; 349*8e01fb15SFrank Wunderlich pinctrl-0 = <&spi_flash_pins>; 350*8e01fb15SFrank Wunderlich status = "okay"; 351*8e01fb15SFrank Wunderlich}; 352*8e01fb15SFrank Wunderlich 353*8e01fb15SFrank Wunderlich&spi1 { 354*8e01fb15SFrank Wunderlich pinctrl-names = "default"; 355*8e01fb15SFrank Wunderlich pinctrl-0 = <&spic_pins>; 356*8e01fb15SFrank Wunderlich status = "okay"; 357*8e01fb15SFrank Wunderlich}; 358*8e01fb15SFrank Wunderlich 359*8e01fb15SFrank Wunderlich&ssusb { 360*8e01fb15SFrank Wunderlich status = "okay"; 361*8e01fb15SFrank Wunderlich}; 362*8e01fb15SFrank Wunderlich 363*8e01fb15SFrank Wunderlich&switch { 364*8e01fb15SFrank Wunderlich ports { 365*8e01fb15SFrank Wunderlich #address-cells = <1>; 366*8e01fb15SFrank Wunderlich #size-cells = <0>; 367*8e01fb15SFrank Wunderlich 368*8e01fb15SFrank Wunderlich port@0 { 369*8e01fb15SFrank Wunderlich reg = <0>; 370*8e01fb15SFrank Wunderlich label = "wan"; 371*8e01fb15SFrank Wunderlich }; 372*8e01fb15SFrank Wunderlich 373*8e01fb15SFrank Wunderlich port@1 { 374*8e01fb15SFrank Wunderlich reg = <1>; 375*8e01fb15SFrank Wunderlich label = "lan0"; 376*8e01fb15SFrank Wunderlich }; 377*8e01fb15SFrank Wunderlich 378*8e01fb15SFrank Wunderlich port@2 { 379*8e01fb15SFrank Wunderlich reg = <2>; 380*8e01fb15SFrank Wunderlich label = "lan1"; 381*8e01fb15SFrank Wunderlich }; 382*8e01fb15SFrank Wunderlich 383*8e01fb15SFrank Wunderlich port@3 { 384*8e01fb15SFrank Wunderlich reg = <3>; 385*8e01fb15SFrank Wunderlich label = "lan2"; 386*8e01fb15SFrank Wunderlich }; 387*8e01fb15SFrank Wunderlich 388*8e01fb15SFrank Wunderlich port@4 { 389*8e01fb15SFrank Wunderlich reg = <4>; 390*8e01fb15SFrank Wunderlich label = "lan3"; 391*8e01fb15SFrank Wunderlich }; 392*8e01fb15SFrank Wunderlich 393*8e01fb15SFrank Wunderlich port5: port@5 { 394*8e01fb15SFrank Wunderlich reg = <5>; 395*8e01fb15SFrank Wunderlich label = "lan4"; 396*8e01fb15SFrank Wunderlich phy-mode = "2500base-x"; 397*8e01fb15SFrank Wunderlich sfp = <&sfp2>; 398*8e01fb15SFrank Wunderlich managed = "in-band-status"; 399*8e01fb15SFrank Wunderlich }; 400*8e01fb15SFrank Wunderlich 401*8e01fb15SFrank Wunderlich port@6 { 402*8e01fb15SFrank Wunderlich reg = <6>; 403*8e01fb15SFrank Wunderlich label = "cpu"; 404*8e01fb15SFrank Wunderlich ethernet = <&gmac0>; 405*8e01fb15SFrank Wunderlich phy-mode = "2500base-x"; 406*8e01fb15SFrank Wunderlich 407*8e01fb15SFrank Wunderlich fixed-link { 408*8e01fb15SFrank Wunderlich speed = <2500>; 409*8e01fb15SFrank Wunderlich full-duplex; 410*8e01fb15SFrank Wunderlich pause; 411*8e01fb15SFrank Wunderlich }; 412*8e01fb15SFrank Wunderlich }; 413*8e01fb15SFrank Wunderlich }; 414*8e01fb15SFrank Wunderlich}; 415*8e01fb15SFrank Wunderlich 416*8e01fb15SFrank Wunderlich&trng { 417*8e01fb15SFrank Wunderlich status = "okay"; 418*8e01fb15SFrank Wunderlich}; 419*8e01fb15SFrank Wunderlich 420*8e01fb15SFrank Wunderlich&uart0 { 421*8e01fb15SFrank Wunderlich status = "okay"; 422*8e01fb15SFrank Wunderlich}; 423*8e01fb15SFrank Wunderlich 424*8e01fb15SFrank Wunderlich&uart1 { 425*8e01fb15SFrank Wunderlich pinctrl-names = "default"; 426*8e01fb15SFrank Wunderlich pinctrl-0 = <&uart1_pins>; 427*8e01fb15SFrank Wunderlich status = "okay"; 428*8e01fb15SFrank Wunderlich}; 429*8e01fb15SFrank Wunderlich 430*8e01fb15SFrank Wunderlich&uart2 { 431*8e01fb15SFrank Wunderlich pinctrl-names = "default"; 432*8e01fb15SFrank Wunderlich pinctrl-0 = <&uart2_pins>; 433*8e01fb15SFrank Wunderlich status = "okay"; 434*8e01fb15SFrank Wunderlich}; 435*8e01fb15SFrank Wunderlich 436*8e01fb15SFrank Wunderlich&usb_phy { 437*8e01fb15SFrank Wunderlich status = "okay"; 438*8e01fb15SFrank Wunderlich}; 439*8e01fb15SFrank Wunderlich 440*8e01fb15SFrank Wunderlich&watchdog { 441*8e01fb15SFrank Wunderlich status = "okay"; 442*8e01fb15SFrank Wunderlich}; 443*8e01fb15SFrank Wunderlich 444*8e01fb15SFrank Wunderlich&wifi { 445*8e01fb15SFrank Wunderlich status = "okay"; 446*8e01fb15SFrank Wunderlich pinctrl-names = "default", "dbdc"; 447*8e01fb15SFrank Wunderlich pinctrl-0 = <&wf_2g_5g_pins>, <&wf_led_pins>; 448*8e01fb15SFrank Wunderlich pinctrl-1 = <&wf_dbdc_pins>, <&wf_led_pins>; 449*8e01fb15SFrank Wunderlich}; 450*8e01fb15SFrank Wunderlich 451