xref: /openbmc/linux/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts (revision 380d18fb2758058bf4bf037aebfafcf7b7ecbca5)
18e01fb15SFrank Wunderlich// SPDX-License-Identifier: (GPL-2.0 OR MIT)
28e01fb15SFrank Wunderlich/*
38e01fb15SFrank Wunderlich * Copyright (C) 2021 MediaTek Inc.
48e01fb15SFrank Wunderlich * Authors: Sam.Shih <sam.shih@mediatek.com>
58e01fb15SFrank Wunderlich *          Frank Wunderlich <frank-w@public-files.de>
68e01fb15SFrank Wunderlich *          Daniel Golle <daniel@makrotopia.org>
78e01fb15SFrank Wunderlich */
88e01fb15SFrank Wunderlich
98e01fb15SFrank Wunderlich/dts-v1/;
108e01fb15SFrank Wunderlich#include <dt-bindings/gpio/gpio.h>
118e01fb15SFrank Wunderlich#include <dt-bindings/input/input.h>
128e01fb15SFrank Wunderlich#include <dt-bindings/leds/common.h>
138e01fb15SFrank Wunderlich#include <dt-bindings/pinctrl/mt65xx.h>
148e01fb15SFrank Wunderlich
158e01fb15SFrank Wunderlich#include "mt7986a.dtsi"
168e01fb15SFrank Wunderlich
178e01fb15SFrank Wunderlich/ {
188e01fb15SFrank Wunderlich	model = "Bananapi BPI-R3";
19*380d18fbSAngeloGioacchino Del Regno	chassis-type = "embedded";
208e01fb15SFrank Wunderlich	compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
218e01fb15SFrank Wunderlich
228e01fb15SFrank Wunderlich	aliases {
238e01fb15SFrank Wunderlich		serial0 = &uart0;
248e01fb15SFrank Wunderlich		ethernet0 = &gmac0;
258e01fb15SFrank Wunderlich		ethernet1 = &gmac1;
268e01fb15SFrank Wunderlich	};
278e01fb15SFrank Wunderlich
288e01fb15SFrank Wunderlich	chosen {
298e01fb15SFrank Wunderlich		stdout-path = "serial0:115200n8";
308e01fb15SFrank Wunderlich	};
318e01fb15SFrank Wunderlich
328e01fb15SFrank Wunderlich	dcin: regulator-12vd {
338e01fb15SFrank Wunderlich		compatible = "regulator-fixed";
348e01fb15SFrank Wunderlich		regulator-name = "12vd";
358e01fb15SFrank Wunderlich		regulator-min-microvolt = <12000000>;
368e01fb15SFrank Wunderlich		regulator-max-microvolt = <12000000>;
378e01fb15SFrank Wunderlich		regulator-boot-on;
388e01fb15SFrank Wunderlich		regulator-always-on;
398e01fb15SFrank Wunderlich	};
408e01fb15SFrank Wunderlich
418e01fb15SFrank Wunderlich	gpio-keys {
428e01fb15SFrank Wunderlich		compatible = "gpio-keys";
438e01fb15SFrank Wunderlich
448e01fb15SFrank Wunderlich		reset-key {
458e01fb15SFrank Wunderlich			label = "reset";
468e01fb15SFrank Wunderlich			linux,code = <KEY_RESTART>;
478e01fb15SFrank Wunderlich			gpios = <&pio 9 GPIO_ACTIVE_LOW>;
488e01fb15SFrank Wunderlich		};
498e01fb15SFrank Wunderlich
508e01fb15SFrank Wunderlich		wps-key {
518e01fb15SFrank Wunderlich			label = "wps";
528e01fb15SFrank Wunderlich			linux,code = <KEY_WPS_BUTTON>;
538e01fb15SFrank Wunderlich			gpios = <&pio 10 GPIO_ACTIVE_LOW>;
548e01fb15SFrank Wunderlich		};
558e01fb15SFrank Wunderlich	};
568e01fb15SFrank Wunderlich
578e01fb15SFrank Wunderlich	/* i2c of the left SFP cage (wan) */
588e01fb15SFrank Wunderlich	i2c_sfp1: i2c-gpio-0 {
598e01fb15SFrank Wunderlich		compatible = "i2c-gpio";
608e01fb15SFrank Wunderlich		sda-gpios = <&pio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
618e01fb15SFrank Wunderlich		scl-gpios = <&pio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
628e01fb15SFrank Wunderlich		i2c-gpio,delay-us = <2>;
638e01fb15SFrank Wunderlich		#address-cells = <1>;
648e01fb15SFrank Wunderlich		#size-cells = <0>;
658e01fb15SFrank Wunderlich	};
668e01fb15SFrank Wunderlich
678e01fb15SFrank Wunderlich	/* i2c of the right SFP cage (lan) */
688e01fb15SFrank Wunderlich	i2c_sfp2: i2c-gpio-1 {
698e01fb15SFrank Wunderlich		compatible = "i2c-gpio";
708e01fb15SFrank Wunderlich		sda-gpios = <&pio 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
718e01fb15SFrank Wunderlich		scl-gpios = <&pio 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
728e01fb15SFrank Wunderlich		i2c-gpio,delay-us = <2>;
738e01fb15SFrank Wunderlich		#address-cells = <1>;
748e01fb15SFrank Wunderlich		#size-cells = <0>;
758e01fb15SFrank Wunderlich	};
768e01fb15SFrank Wunderlich
778e01fb15SFrank Wunderlich	leds {
788e01fb15SFrank Wunderlich		compatible = "gpio-leds";
798e01fb15SFrank Wunderlich
808e01fb15SFrank Wunderlich		green_led: led-0 {
818e01fb15SFrank Wunderlich			color = <LED_COLOR_ID_GREEN>;
828e01fb15SFrank Wunderlich			function = LED_FUNCTION_POWER;
838e01fb15SFrank Wunderlich			gpios = <&pio 69 GPIO_ACTIVE_HIGH>;
848e01fb15SFrank Wunderlich			default-state = "on";
858e01fb15SFrank Wunderlich		};
868e01fb15SFrank Wunderlich
878e01fb15SFrank Wunderlich		blue_led: led-1 {
888e01fb15SFrank Wunderlich			color = <LED_COLOR_ID_BLUE>;
898e01fb15SFrank Wunderlich			function = LED_FUNCTION_STATUS;
908e01fb15SFrank Wunderlich			gpios = <&pio 86 GPIO_ACTIVE_HIGH>;
918e01fb15SFrank Wunderlich			default-state = "off";
928e01fb15SFrank Wunderlich		};
938e01fb15SFrank Wunderlich	};
948e01fb15SFrank Wunderlich
958e01fb15SFrank Wunderlich	reg_1p8v: regulator-1p8v {
968e01fb15SFrank Wunderlich		compatible = "regulator-fixed";
978e01fb15SFrank Wunderlich		regulator-name = "1.8vd";
988e01fb15SFrank Wunderlich		regulator-min-microvolt = <1800000>;
998e01fb15SFrank Wunderlich		regulator-max-microvolt = <1800000>;
1008e01fb15SFrank Wunderlich		regulator-boot-on;
1018e01fb15SFrank Wunderlich		regulator-always-on;
1028e01fb15SFrank Wunderlich		vin-supply = <&dcin>;
1038e01fb15SFrank Wunderlich	};
1048e01fb15SFrank Wunderlich
1058e01fb15SFrank Wunderlich	reg_3p3v: regulator-3p3v {
1068e01fb15SFrank Wunderlich		compatible = "regulator-fixed";
1078e01fb15SFrank Wunderlich		regulator-name = "3.3vd";
1088e01fb15SFrank Wunderlich		regulator-min-microvolt = <3300000>;
1098e01fb15SFrank Wunderlich		regulator-max-microvolt = <3300000>;
1108e01fb15SFrank Wunderlich		regulator-boot-on;
1118e01fb15SFrank Wunderlich		regulator-always-on;
1128e01fb15SFrank Wunderlich		vin-supply = <&dcin>;
1138e01fb15SFrank Wunderlich	};
1148e01fb15SFrank Wunderlich
1158e01fb15SFrank Wunderlich	/* left SFP cage (wan) */
1168e01fb15SFrank Wunderlich	sfp1: sfp-1 {
1178e01fb15SFrank Wunderlich		compatible = "sff,sfp";
1188e01fb15SFrank Wunderlich		i2c-bus = <&i2c_sfp1>;
1198e01fb15SFrank Wunderlich		los-gpios = <&pio 46 GPIO_ACTIVE_HIGH>;
1208e01fb15SFrank Wunderlich		mod-def0-gpios = <&pio 49 GPIO_ACTIVE_LOW>;
1218e01fb15SFrank Wunderlich		tx-disable-gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
1228e01fb15SFrank Wunderlich		tx-fault-gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
1238e01fb15SFrank Wunderlich	};
1248e01fb15SFrank Wunderlich
1258e01fb15SFrank Wunderlich	/* right SFP cage (lan) */
1268e01fb15SFrank Wunderlich	sfp2: sfp-2 {
1278e01fb15SFrank Wunderlich		compatible = "sff,sfp";
1288e01fb15SFrank Wunderlich		i2c-bus = <&i2c_sfp2>;
1298e01fb15SFrank Wunderlich		los-gpios = <&pio 31 GPIO_ACTIVE_HIGH>;
1308e01fb15SFrank Wunderlich		mod-def0-gpios = <&pio 47 GPIO_ACTIVE_LOW>;
1318e01fb15SFrank Wunderlich		tx-disable-gpios = <&pio 15 GPIO_ACTIVE_HIGH>;
1328e01fb15SFrank Wunderlich		tx-fault-gpios = <&pio 48 GPIO_ACTIVE_HIGH>;
1338e01fb15SFrank Wunderlich	};
1348e01fb15SFrank Wunderlich};
1358e01fb15SFrank Wunderlich
1368e01fb15SFrank Wunderlich&crypto {
1378e01fb15SFrank Wunderlich	status = "okay";
1388e01fb15SFrank Wunderlich};
1398e01fb15SFrank Wunderlich
1408e01fb15SFrank Wunderlich&eth {
1418e01fb15SFrank Wunderlich	status = "okay";
1428e01fb15SFrank Wunderlich
1438e01fb15SFrank Wunderlich	gmac0: mac@0 {
1448e01fb15SFrank Wunderlich		compatible = "mediatek,eth-mac";
1458e01fb15SFrank Wunderlich		reg = <0>;
1468e01fb15SFrank Wunderlich		phy-mode = "2500base-x";
1478e01fb15SFrank Wunderlich
1488e01fb15SFrank Wunderlich		fixed-link {
1498e01fb15SFrank Wunderlich			speed = <2500>;
1508e01fb15SFrank Wunderlich			full-duplex;
1518e01fb15SFrank Wunderlich			pause;
1528e01fb15SFrank Wunderlich		};
1538e01fb15SFrank Wunderlich	};
1548e01fb15SFrank Wunderlich
1558e01fb15SFrank Wunderlich	gmac1: mac@1 {
1568e01fb15SFrank Wunderlich		compatible = "mediatek,eth-mac";
1578e01fb15SFrank Wunderlich		reg = <1>;
1588e01fb15SFrank Wunderlich		phy-mode = "2500base-x";
1598e01fb15SFrank Wunderlich		sfp = <&sfp1>;
1608e01fb15SFrank Wunderlich		managed = "in-band-status";
1618e01fb15SFrank Wunderlich	};
1628e01fb15SFrank Wunderlich
1638e01fb15SFrank Wunderlich	mdio: mdio-bus {
1648e01fb15SFrank Wunderlich		#address-cells = <1>;
1658e01fb15SFrank Wunderlich		#size-cells = <0>;
1668e01fb15SFrank Wunderlich	};
1678e01fb15SFrank Wunderlich};
1688e01fb15SFrank Wunderlich
1698e01fb15SFrank Wunderlich&mdio {
1708e01fb15SFrank Wunderlich	switch: switch@31 {
1718e01fb15SFrank Wunderlich		compatible = "mediatek,mt7531";
1728e01fb15SFrank Wunderlich		reg = <31>;
1738e01fb15SFrank Wunderlich		interrupt-controller;
1748e01fb15SFrank Wunderlich		#interrupt-cells = <1>;
1758e01fb15SFrank Wunderlich		interrupt-parent = <&pio>;
1768e01fb15SFrank Wunderlich		interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
1778e01fb15SFrank Wunderlich		reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
1788e01fb15SFrank Wunderlich	};
1798e01fb15SFrank Wunderlich};
1808e01fb15SFrank Wunderlich
1818e01fb15SFrank Wunderlich&mmc0 {
1828e01fb15SFrank Wunderlich	pinctrl-names = "default", "state_uhs";
1838e01fb15SFrank Wunderlich	pinctrl-0 = <&mmc0_pins_default>;
1848e01fb15SFrank Wunderlich	pinctrl-1 = <&mmc0_pins_uhs>;
1858e01fb15SFrank Wunderlich	vmmc-supply = <&reg_3p3v>;
1868e01fb15SFrank Wunderlich	vqmmc-supply = <&reg_1p8v>;
1878e01fb15SFrank Wunderlich};
1888e01fb15SFrank Wunderlich
1898e01fb15SFrank Wunderlich&i2c0 {
1908e01fb15SFrank Wunderlich	pinctrl-names = "default";
1918e01fb15SFrank Wunderlich	pinctrl-0 = <&i2c_pins>;
1928e01fb15SFrank Wunderlich	status = "okay";
1938e01fb15SFrank Wunderlich};
1948e01fb15SFrank Wunderlich
1958e01fb15SFrank Wunderlich&pcie {
1968e01fb15SFrank Wunderlich	pinctrl-names = "default";
1978e01fb15SFrank Wunderlich	pinctrl-0 = <&pcie_pins>;
1988e01fb15SFrank Wunderlich	status = "okay";
1998e01fb15SFrank Wunderlich};
2008e01fb15SFrank Wunderlich
2018e01fb15SFrank Wunderlich&pcie_phy {
2028e01fb15SFrank Wunderlich	status = "okay";
2038e01fb15SFrank Wunderlich};
2048e01fb15SFrank Wunderlich
2058e01fb15SFrank Wunderlich&pio {
2068e01fb15SFrank Wunderlich	i2c_pins: i2c-pins {
2078e01fb15SFrank Wunderlich		mux {
2088e01fb15SFrank Wunderlich			function = "i2c";
2098e01fb15SFrank Wunderlich			groups = "i2c";
2108e01fb15SFrank Wunderlich		};
2118e01fb15SFrank Wunderlich	};
2128e01fb15SFrank Wunderlich
2138e01fb15SFrank Wunderlich	mmc0_pins_default: mmc0-pins {
2148e01fb15SFrank Wunderlich		mux {
2158e01fb15SFrank Wunderlich			function = "emmc";
2168e01fb15SFrank Wunderlich			groups = "emmc_51";
2178e01fb15SFrank Wunderlich		};
2188e01fb15SFrank Wunderlich		conf-cmd-dat {
2198e01fb15SFrank Wunderlich			pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
2208e01fb15SFrank Wunderlich			       "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
2218e01fb15SFrank Wunderlich			       "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
2228e01fb15SFrank Wunderlich			input-enable;
2238e01fb15SFrank Wunderlich			drive-strength = <4>;
2248e01fb15SFrank Wunderlich			bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
2258e01fb15SFrank Wunderlich		};
2268e01fb15SFrank Wunderlich		conf-clk {
2278e01fb15SFrank Wunderlich			pins = "EMMC_CK";
2288e01fb15SFrank Wunderlich			drive-strength = <6>;
2298e01fb15SFrank Wunderlich			bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
2308e01fb15SFrank Wunderlich		};
2318e01fb15SFrank Wunderlich		conf-ds {
2328e01fb15SFrank Wunderlich			pins = "EMMC_DSL";
2338e01fb15SFrank Wunderlich			bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
2348e01fb15SFrank Wunderlich		};
2358e01fb15SFrank Wunderlich		conf-rst {
2368e01fb15SFrank Wunderlich			pins = "EMMC_RSTB";
2378e01fb15SFrank Wunderlich			drive-strength = <4>;
2388e01fb15SFrank Wunderlich			bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
2398e01fb15SFrank Wunderlich		};
2408e01fb15SFrank Wunderlich	};
2418e01fb15SFrank Wunderlich
2428e01fb15SFrank Wunderlich	mmc0_pins_uhs: mmc0-uhs-pins {
2438e01fb15SFrank Wunderlich		mux {
2448e01fb15SFrank Wunderlich			function = "emmc";
2458e01fb15SFrank Wunderlich			groups = "emmc_51";
2468e01fb15SFrank Wunderlich		};
2478e01fb15SFrank Wunderlich		conf-cmd-dat {
2488e01fb15SFrank Wunderlich			pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
2498e01fb15SFrank Wunderlich			       "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
2508e01fb15SFrank Wunderlich			       "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
2518e01fb15SFrank Wunderlich			input-enable;
2528e01fb15SFrank Wunderlich			drive-strength = <4>;
2538e01fb15SFrank Wunderlich			bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
2548e01fb15SFrank Wunderlich		};
2558e01fb15SFrank Wunderlich		conf-clk {
2568e01fb15SFrank Wunderlich			pins = "EMMC_CK";
2578e01fb15SFrank Wunderlich			drive-strength = <6>;
2588e01fb15SFrank Wunderlich			bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
2598e01fb15SFrank Wunderlich		};
2608e01fb15SFrank Wunderlich		conf-ds {
2618e01fb15SFrank Wunderlich			pins = "EMMC_DSL";
2628e01fb15SFrank Wunderlich			bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
2638e01fb15SFrank Wunderlich		};
2648e01fb15SFrank Wunderlich		conf-rst {
2658e01fb15SFrank Wunderlich			pins = "EMMC_RSTB";
2668e01fb15SFrank Wunderlich			drive-strength = <4>;
2678e01fb15SFrank Wunderlich			bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
2688e01fb15SFrank Wunderlich		};
2698e01fb15SFrank Wunderlich	};
2708e01fb15SFrank Wunderlich
2718e01fb15SFrank Wunderlich	pcie_pins: pcie-pins {
2728e01fb15SFrank Wunderlich		mux {
2738e01fb15SFrank Wunderlich			function = "pcie";
2748e01fb15SFrank Wunderlich			groups = "pcie_clk", "pcie_pereset";
2758e01fb15SFrank Wunderlich		};
2768e01fb15SFrank Wunderlich	};
2778e01fb15SFrank Wunderlich
2788e01fb15SFrank Wunderlich	spi_flash_pins: spi-flash-pins {
2798e01fb15SFrank Wunderlich		mux {
2808e01fb15SFrank Wunderlich			function = "spi";
2818e01fb15SFrank Wunderlich			groups = "spi0", "spi0_wp_hold";
2828e01fb15SFrank Wunderlich		};
2838e01fb15SFrank Wunderlich	};
2848e01fb15SFrank Wunderlich
2858e01fb15SFrank Wunderlich	spic_pins: spic-pins {
2868e01fb15SFrank Wunderlich		mux {
2878e01fb15SFrank Wunderlich			function = "spi";
2888e01fb15SFrank Wunderlich			groups = "spi1_0";
2898e01fb15SFrank Wunderlich		};
2908e01fb15SFrank Wunderlich	};
2918e01fb15SFrank Wunderlich
2928e01fb15SFrank Wunderlich	uart1_pins: uart1-pins {
2938e01fb15SFrank Wunderlich		mux {
2948e01fb15SFrank Wunderlich			function = "uart";
2958e01fb15SFrank Wunderlich			groups = "uart1_rx_tx";
2968e01fb15SFrank Wunderlich		};
2978e01fb15SFrank Wunderlich	};
2988e01fb15SFrank Wunderlich
2998e01fb15SFrank Wunderlich	uart2_pins: uart2-pins {
3008e01fb15SFrank Wunderlich		mux {
3018e01fb15SFrank Wunderlich			function = "uart";
3028e01fb15SFrank Wunderlich			groups = "uart2_0_rx_tx";
3038e01fb15SFrank Wunderlich		};
3048e01fb15SFrank Wunderlich	};
3058e01fb15SFrank Wunderlich
3068e01fb15SFrank Wunderlich	wf_2g_5g_pins: wf-2g-5g-pins {
3078e01fb15SFrank Wunderlich		mux {
3088e01fb15SFrank Wunderlich			function = "wifi";
3098e01fb15SFrank Wunderlich			groups = "wf_2g", "wf_5g";
3108e01fb15SFrank Wunderlich		};
3118e01fb15SFrank Wunderlich		conf {
3128e01fb15SFrank Wunderlich			pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
3138e01fb15SFrank Wunderlich			       "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
3148e01fb15SFrank Wunderlich			       "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
3158e01fb15SFrank Wunderlich			       "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
3168e01fb15SFrank Wunderlich			       "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
3178e01fb15SFrank Wunderlich			       "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
3188e01fb15SFrank Wunderlich			       "WF1_TOP_CLK", "WF1_TOP_DATA";
3198e01fb15SFrank Wunderlich			drive-strength = <4>;
3208e01fb15SFrank Wunderlich		};
3218e01fb15SFrank Wunderlich	};
3228e01fb15SFrank Wunderlich
3238e01fb15SFrank Wunderlich	wf_dbdc_pins: wf-dbdc-pins {
3248e01fb15SFrank Wunderlich		mux {
3258e01fb15SFrank Wunderlich			function = "wifi";
3268e01fb15SFrank Wunderlich			groups = "wf_dbdc";
3278e01fb15SFrank Wunderlich		};
3288e01fb15SFrank Wunderlich		conf {
3298e01fb15SFrank Wunderlich			pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
3308e01fb15SFrank Wunderlich			       "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
3318e01fb15SFrank Wunderlich			       "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
3328e01fb15SFrank Wunderlich			       "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
3338e01fb15SFrank Wunderlich			       "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
3348e01fb15SFrank Wunderlich			       "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
3358e01fb15SFrank Wunderlich			       "WF1_TOP_CLK", "WF1_TOP_DATA";
3368e01fb15SFrank Wunderlich			drive-strength = <4>;
3378e01fb15SFrank Wunderlich		};
3388e01fb15SFrank Wunderlich	};
3398e01fb15SFrank Wunderlich
3408e01fb15SFrank Wunderlich	wf_led_pins: wf-led-pins {
3418e01fb15SFrank Wunderlich		mux {
3428e01fb15SFrank Wunderlich			function = "led";
3438e01fb15SFrank Wunderlich			groups = "wifi_led";
3448e01fb15SFrank Wunderlich		};
3458e01fb15SFrank Wunderlich	};
3468e01fb15SFrank Wunderlich};
3478e01fb15SFrank Wunderlich
3488e01fb15SFrank Wunderlich&spi0 {
3498e01fb15SFrank Wunderlich	pinctrl-names = "default";
3508e01fb15SFrank Wunderlich	pinctrl-0 = <&spi_flash_pins>;
3518e01fb15SFrank Wunderlich	status = "okay";
3528e01fb15SFrank Wunderlich};
3538e01fb15SFrank Wunderlich
3548e01fb15SFrank Wunderlich&spi1 {
3558e01fb15SFrank Wunderlich	pinctrl-names = "default";
3568e01fb15SFrank Wunderlich	pinctrl-0 = <&spic_pins>;
3578e01fb15SFrank Wunderlich	status = "okay";
3588e01fb15SFrank Wunderlich};
3598e01fb15SFrank Wunderlich
3608e01fb15SFrank Wunderlich&ssusb {
3618e01fb15SFrank Wunderlich	status = "okay";
3628e01fb15SFrank Wunderlich};
3638e01fb15SFrank Wunderlich
3648e01fb15SFrank Wunderlich&switch {
3658e01fb15SFrank Wunderlich	ports {
3668e01fb15SFrank Wunderlich		#address-cells = <1>;
3678e01fb15SFrank Wunderlich		#size-cells = <0>;
3688e01fb15SFrank Wunderlich
3698e01fb15SFrank Wunderlich		port@0 {
3708e01fb15SFrank Wunderlich			reg = <0>;
3718e01fb15SFrank Wunderlich			label = "wan";
3728e01fb15SFrank Wunderlich		};
3738e01fb15SFrank Wunderlich
3748e01fb15SFrank Wunderlich		port@1 {
3758e01fb15SFrank Wunderlich			reg = <1>;
3768e01fb15SFrank Wunderlich			label = "lan0";
3778e01fb15SFrank Wunderlich		};
3788e01fb15SFrank Wunderlich
3798e01fb15SFrank Wunderlich		port@2 {
3808e01fb15SFrank Wunderlich			reg = <2>;
3818e01fb15SFrank Wunderlich			label = "lan1";
3828e01fb15SFrank Wunderlich		};
3838e01fb15SFrank Wunderlich
3848e01fb15SFrank Wunderlich		port@3 {
3858e01fb15SFrank Wunderlich			reg = <3>;
3868e01fb15SFrank Wunderlich			label = "lan2";
3878e01fb15SFrank Wunderlich		};
3888e01fb15SFrank Wunderlich
3898e01fb15SFrank Wunderlich		port@4 {
3908e01fb15SFrank Wunderlich			reg = <4>;
3918e01fb15SFrank Wunderlich			label = "lan3";
3928e01fb15SFrank Wunderlich		};
3938e01fb15SFrank Wunderlich
3948e01fb15SFrank Wunderlich		port5: port@5 {
3958e01fb15SFrank Wunderlich			reg = <5>;
3968e01fb15SFrank Wunderlich			label = "lan4";
3978e01fb15SFrank Wunderlich			phy-mode = "2500base-x";
3988e01fb15SFrank Wunderlich			sfp = <&sfp2>;
3998e01fb15SFrank Wunderlich			managed = "in-band-status";
4008e01fb15SFrank Wunderlich		};
4018e01fb15SFrank Wunderlich
4028e01fb15SFrank Wunderlich		port@6 {
4038e01fb15SFrank Wunderlich			reg = <6>;
4048e01fb15SFrank Wunderlich			label = "cpu";
4058e01fb15SFrank Wunderlich			ethernet = <&gmac0>;
4068e01fb15SFrank Wunderlich			phy-mode = "2500base-x";
4078e01fb15SFrank Wunderlich
4088e01fb15SFrank Wunderlich			fixed-link {
4098e01fb15SFrank Wunderlich				speed = <2500>;
4108e01fb15SFrank Wunderlich				full-duplex;
4118e01fb15SFrank Wunderlich				pause;
4128e01fb15SFrank Wunderlich			};
4138e01fb15SFrank Wunderlich		};
4148e01fb15SFrank Wunderlich	};
4158e01fb15SFrank Wunderlich};
4168e01fb15SFrank Wunderlich
4178e01fb15SFrank Wunderlich&trng {
4188e01fb15SFrank Wunderlich	status = "okay";
4198e01fb15SFrank Wunderlich};
4208e01fb15SFrank Wunderlich
4218e01fb15SFrank Wunderlich&uart0 {
4228e01fb15SFrank Wunderlich	status = "okay";
4238e01fb15SFrank Wunderlich};
4248e01fb15SFrank Wunderlich
4258e01fb15SFrank Wunderlich&uart1 {
4268e01fb15SFrank Wunderlich	pinctrl-names = "default";
4278e01fb15SFrank Wunderlich	pinctrl-0 = <&uart1_pins>;
4288e01fb15SFrank Wunderlich	status = "okay";
4298e01fb15SFrank Wunderlich};
4308e01fb15SFrank Wunderlich
4318e01fb15SFrank Wunderlich&uart2 {
4328e01fb15SFrank Wunderlich	pinctrl-names = "default";
4338e01fb15SFrank Wunderlich	pinctrl-0 = <&uart2_pins>;
4348e01fb15SFrank Wunderlich	status = "okay";
4358e01fb15SFrank Wunderlich};
4368e01fb15SFrank Wunderlich
4378e01fb15SFrank Wunderlich&usb_phy {
4388e01fb15SFrank Wunderlich	status = "okay";
4398e01fb15SFrank Wunderlich};
4408e01fb15SFrank Wunderlich
4418e01fb15SFrank Wunderlich&watchdog {
4428e01fb15SFrank Wunderlich	status = "okay";
4438e01fb15SFrank Wunderlich};
4448e01fb15SFrank Wunderlich
4458e01fb15SFrank Wunderlich&wifi {
4468e01fb15SFrank Wunderlich	status = "okay";
4478e01fb15SFrank Wunderlich	pinctrl-names = "default", "dbdc";
4488e01fb15SFrank Wunderlich	pinctrl-0 = <&wf_2g_5g_pins>, <&wf_led_pins>;
4498e01fb15SFrank Wunderlich	pinctrl-1 = <&wf_dbdc_pins>, <&wf_led_pins>;
4508e01fb15SFrank Wunderlich};
4518e01fb15SFrank Wunderlich
452