1*292816a6SGregory CLEMENT// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2ec7e5a56SThomas Petazzoni/* 3ec7e5a56SThomas Petazzoni * Copyright (C) 2016 Marvell Technology Group Ltd. 4ec7e5a56SThomas Petazzoni * 5ec7e5a56SThomas Petazzoni * Device Tree file for Marvell Armada AP806. 6ec7e5a56SThomas Petazzoni */ 7ec7e5a56SThomas Petazzoni 8ec7e5a56SThomas Petazzoni#include "armada-ap806.dtsi" 9ec7e5a56SThomas Petazzoni 10ec7e5a56SThomas Petazzoni/ { 11ec7e5a56SThomas Petazzoni model = "Marvell Armada AP806 Quad"; 12ec7e5a56SThomas Petazzoni compatible = "marvell,armada-ap806-quad", "marvell,armada-ap806"; 13ec7e5a56SThomas Petazzoni 14ec7e5a56SThomas Petazzoni cpus { 15ec7e5a56SThomas Petazzoni #address-cells = <1>; 16ec7e5a56SThomas Petazzoni #size-cells = <0>; 17ec7e5a56SThomas Petazzoni 18d8bcaabeSRob Herring cpu@0 { 19ec7e5a56SThomas Petazzoni device_type = "cpu"; 20ec7e5a56SThomas Petazzoni compatible = "arm,cortex-a72", "arm,armv8"; 21ec7e5a56SThomas Petazzoni reg = <0x000>; 22ec7e5a56SThomas Petazzoni enable-method = "psci"; 23ec7e5a56SThomas Petazzoni }; 24d8bcaabeSRob Herring cpu@1 { 25ec7e5a56SThomas Petazzoni device_type = "cpu"; 26ec7e5a56SThomas Petazzoni compatible = "arm,cortex-a72", "arm,armv8"; 27ec7e5a56SThomas Petazzoni reg = <0x001>; 28ec7e5a56SThomas Petazzoni enable-method = "psci"; 29ec7e5a56SThomas Petazzoni }; 30ec7e5a56SThomas Petazzoni cpu@100 { 31ec7e5a56SThomas Petazzoni device_type = "cpu"; 32ec7e5a56SThomas Petazzoni compatible = "arm,cortex-a72", "arm,armv8"; 33ec7e5a56SThomas Petazzoni reg = <0x100>; 34ec7e5a56SThomas Petazzoni enable-method = "psci"; 35ec7e5a56SThomas Petazzoni }; 36ec7e5a56SThomas Petazzoni cpu@101 { 37ec7e5a56SThomas Petazzoni device_type = "cpu"; 38ec7e5a56SThomas Petazzoni compatible = "arm,cortex-a72", "arm,armv8"; 39ec7e5a56SThomas Petazzoni reg = <0x101>; 40ec7e5a56SThomas Petazzoni enable-method = "psci"; 41ec7e5a56SThomas Petazzoni }; 42ec7e5a56SThomas Petazzoni }; 43ec7e5a56SThomas Petazzoni}; 44