xref: /openbmc/linux/arch/arm64/boot/dts/marvell/armada-8040.dtsi (revision 83a3545d9c377c8524a238d22258e0319106f080)
1292816a6SGregory CLEMENT// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2ec7e5a56SThomas Petazzoni/*
3ec7e5a56SThomas Petazzoni * Copyright (C) 2016 Marvell Technology Group Ltd.
4ec7e5a56SThomas Petazzoni *
5ec7e5a56SThomas Petazzoni * Device Tree file for the Armada 8040 SoC, made of an AP806 Quad and
6ec7e5a56SThomas Petazzoni * two CP110.
7ec7e5a56SThomas Petazzoni */
8ec7e5a56SThomas Petazzoni
9ec7e5a56SThomas Petazzoni#include "armada-ap806-quad.dtsi"
10ae701b60SGregory CLEMENT#include "armada-80x0.dtsi"
11ec7e5a56SThomas Petazzoni
12ec7e5a56SThomas Petazzoni/ {
13ec7e5a56SThomas Petazzoni	model = "Marvell Armada 8040";
14ec7e5a56SThomas Petazzoni	compatible = "marvell,armada8040", "marvell,armada-ap806-quad",
15ec7e5a56SThomas Petazzoni		     "marvell,armada-ap806";
16ec7e5a56SThomas Petazzoni};
17bbedcf58SGregory CLEMENT
18*83a3545dSMarcin Wojtas&smmu {
19*83a3545dSMarcin Wojtas	status = "okay";
20*83a3545dSMarcin Wojtas};
21*83a3545dSMarcin Wojtas
22*83a3545dSMarcin Wojtas&cp0_pcie0 {
23*83a3545dSMarcin Wojtas	iommu-map =
24*83a3545dSMarcin Wojtas		<0x0   &smmu 0x480 0x20>,
25*83a3545dSMarcin Wojtas		<0x100 &smmu 0x4a0 0x20>,
26*83a3545dSMarcin Wojtas		<0x200 &smmu 0x4c0 0x20>;
27*83a3545dSMarcin Wojtas	iommu-map-mask = <0x031f>;
28*83a3545dSMarcin Wojtas};
29*83a3545dSMarcin Wojtas
30bbedcf58SGregory CLEMENT/* The RTC requires external oscillator. But on Aramda 80x0, the RTC clock
31bbedcf58SGregory CLEMENT * in CP master is not connected (by package) to the oscillator. So
32bbedcf58SGregory CLEMENT * disable it. However, the RTC clock in CP slave is connected to the
33bbedcf58SGregory CLEMENT * oscillator so this one is let enabled.
34bbedcf58SGregory CLEMENT */
3591f1be92SThomas Petazzoni&cp0_rtc {
36bbedcf58SGregory CLEMENT	status = "disabled";
37bbedcf58SGregory CLEMENT};
38*83a3545dSMarcin Wojtas
39*83a3545dSMarcin Wojtas&cp0_sata0 {
40*83a3545dSMarcin Wojtas	iommus = <&smmu 0x444>;
41*83a3545dSMarcin Wojtas};
42*83a3545dSMarcin Wojtas
43*83a3545dSMarcin Wojtas&cp0_sdhci0 {
44*83a3545dSMarcin Wojtas	iommus = <&smmu 0x445>;
45*83a3545dSMarcin Wojtas};
46*83a3545dSMarcin Wojtas
47*83a3545dSMarcin Wojtas&cp0_usb3_0 {
48*83a3545dSMarcin Wojtas	iommus = <&smmu 0x440>;
49*83a3545dSMarcin Wojtas};
50*83a3545dSMarcin Wojtas
51*83a3545dSMarcin Wojtas&cp0_usb3_1 {
52*83a3545dSMarcin Wojtas	iommus = <&smmu 0x441>;
53*83a3545dSMarcin Wojtas};
54*83a3545dSMarcin Wojtas
55*83a3545dSMarcin Wojtas&cp1_sata0 {
56*83a3545dSMarcin Wojtas	iommus = <&smmu 0x454>;
57*83a3545dSMarcin Wojtas};
58*83a3545dSMarcin Wojtas
59*83a3545dSMarcin Wojtas&cp1_usb3_0 {
60*83a3545dSMarcin Wojtas	iommus = <&smmu 0x450>;
61*83a3545dSMarcin Wojtas};
62*83a3545dSMarcin Wojtas
63*83a3545dSMarcin Wojtas&cp1_usb3_1 {
64*83a3545dSMarcin Wojtas	iommus = <&smmu 0x451>;
65*83a3545dSMarcin Wojtas};
66