1a427485aSDinh Nguyen// SPDX-License-Identifier: GPL-2.0 2a427485aSDinh Nguyen/* 3a427485aSDinh Nguyen * Copyright (C) 2021, Intel Corporation 4a427485aSDinh Nguyen */ 5a427485aSDinh Nguyen#include "socfpga_agilex.dtsi" 6a427485aSDinh Nguyen 7a427485aSDinh Nguyen/ { 8a427485aSDinh Nguyen model = "eASIC N5X SoCDK"; 9fae3aa6cSKrzysztof Kozlowski compatible = "intel,n5x-socdk", "intel,socfpga-agilex"; 10a427485aSDinh Nguyen 11a427485aSDinh Nguyen aliases { 12a427485aSDinh Nguyen serial0 = &uart0; 13a427485aSDinh Nguyen ethernet0 = &gmac0; 14a427485aSDinh Nguyen ethernet1 = &gmac1; 15a427485aSDinh Nguyen ethernet2 = &gmac2; 16a427485aSDinh Nguyen }; 17a427485aSDinh Nguyen 18a427485aSDinh Nguyen chosen { 19a427485aSDinh Nguyen stdout-path = "serial0:115200n8"; 20a427485aSDinh Nguyen }; 21a427485aSDinh Nguyen 22b2c62c39SDinh Nguyen memory@80000000 { 23a427485aSDinh Nguyen device_type = "memory"; 24a427485aSDinh Nguyen /* We expect the bootloader to fill in the reg */ 25b2c62c39SDinh Nguyen reg = <0 0x80000000 0 0>; 26a427485aSDinh Nguyen }; 27ef82c9beSDinh Nguyen 28ef82c9beSDinh Nguyen soc { 29bcea9aaaSKrzysztof Kozlowski sdram_edac: memory-controller@f87f8000 { 30ef82c9beSDinh Nguyen compatible = "snps,ddrc-3.80a"; 31ef82c9beSDinh Nguyen reg = <0xf87f8000 0x400>; 32ef82c9beSDinh Nguyen interrupts = <0 175 4>; 33ef82c9beSDinh Nguyen status = "okay"; 34ef82c9beSDinh Nguyen }; 35ef82c9beSDinh Nguyen }; 36a427485aSDinh Nguyen}; 37a427485aSDinh Nguyen 38a427485aSDinh Nguyen&clkmgr { 39a427485aSDinh Nguyen compatible = "intel,easic-n5x-clkmgr"; 40a427485aSDinh Nguyen}; 41a427485aSDinh Nguyen 42f4c35356SDinh Nguyen&gmac0 { 43f4c35356SDinh Nguyen status = "okay"; 44f4c35356SDinh Nguyen phy-mode = "rgmii"; 45f4c35356SDinh Nguyen phy-handle = <&phy0>; 46f4c35356SDinh Nguyen 47f4c35356SDinh Nguyen max-frame-size = <9000>; 48f4c35356SDinh Nguyen 49f4c35356SDinh Nguyen mdio0 { 50f4c35356SDinh Nguyen #address-cells = <1>; 51f4c35356SDinh Nguyen #size-cells = <0>; 52f4c35356SDinh Nguyen compatible = "snps,dwmac-mdio"; 53f4c35356SDinh Nguyen phy0: ethernet-phy@0 { 54f4c35356SDinh Nguyen reg = <4>; 55f4c35356SDinh Nguyen 56f4c35356SDinh Nguyen txd0-skew-ps = <0>; /* -420ps */ 57f4c35356SDinh Nguyen txd1-skew-ps = <0>; /* -420ps */ 58f4c35356SDinh Nguyen txd2-skew-ps = <0>; /* -420ps */ 59f4c35356SDinh Nguyen txd3-skew-ps = <0>; /* -420ps */ 60f4c35356SDinh Nguyen rxd0-skew-ps = <420>; /* 0ps */ 61f4c35356SDinh Nguyen rxd1-skew-ps = <420>; /* 0ps */ 62f4c35356SDinh Nguyen rxd2-skew-ps = <420>; /* 0ps */ 63f4c35356SDinh Nguyen rxd3-skew-ps = <420>; /* 0ps */ 64f4c35356SDinh Nguyen txen-skew-ps = <0>; /* -420ps */ 65f4c35356SDinh Nguyen txc-skew-ps = <900>; /* 0ps */ 66f4c35356SDinh Nguyen rxdv-skew-ps = <420>; /* 0ps */ 67f4c35356SDinh Nguyen rxc-skew-ps = <1680>; /* 780ps */ 68f4c35356SDinh Nguyen }; 69f4c35356SDinh Nguyen }; 70f4c35356SDinh Nguyen}; 71f4c35356SDinh Nguyen 72a427485aSDinh Nguyen&mmc { 73a427485aSDinh Nguyen status = "okay"; 74a427485aSDinh Nguyen cap-sd-highspeed; 75a427485aSDinh Nguyen broken-cd; 76a427485aSDinh Nguyen bus-width = <4>; 7731354121SDinh Nguyen clk-phase-sd-hs = <0>, <135>; 78a427485aSDinh Nguyen}; 79a427485aSDinh Nguyen 8015e26f69SKrzysztof Kozlowski&osc1 { 8115e26f69SKrzysztof Kozlowski clock-frequency = <25000000>; 8215e26f69SKrzysztof Kozlowski}; 8315e26f69SKrzysztof Kozlowski 84f4c35356SDinh Nguyen&qspi { 85f4c35356SDinh Nguyen status = "okay"; 86f4c35356SDinh Nguyen flash@0 { 87f4c35356SDinh Nguyen #address-cells = <1>; 88f4c35356SDinh Nguyen #size-cells = <1>; 89f4c35356SDinh Nguyen compatible = "micron,mt25qu02g", "jedec,spi-nor"; 90f4c35356SDinh Nguyen reg = <0>; 91f4c35356SDinh Nguyen spi-max-frequency = <100000000>; 92f4c35356SDinh Nguyen 93f4c35356SDinh Nguyen m25p,fast-read; 94f4c35356SDinh Nguyen cdns,page-size = <256>; 95f4c35356SDinh Nguyen cdns,block-size = <16>; 96f4c35356SDinh Nguyen cdns,read-delay = <2>; 97f4c35356SDinh Nguyen cdns,tshsl-ns = <50>; 98f4c35356SDinh Nguyen cdns,tsd2d-ns = <50>; 99f4c35356SDinh Nguyen cdns,tchsh-ns = <4>; 100f4c35356SDinh Nguyen cdns,tslch-ns = <4>; 101f4c35356SDinh Nguyen 102f4c35356SDinh Nguyen partitions { 103f4c35356SDinh Nguyen compatible = "fixed-partitions"; 104f4c35356SDinh Nguyen #address-cells = <1>; 105f4c35356SDinh Nguyen #size-cells = <1>; 106f4c35356SDinh Nguyen 107f4c35356SDinh Nguyen qspi_boot: partition@0 { 108f4c35356SDinh Nguyen label = "Boot and fpga data"; 109f4c35356SDinh Nguyen reg = <0x0 0x03FE0000>; 110f4c35356SDinh Nguyen }; 111f4c35356SDinh Nguyen 112*774acd59SDinh Nguyen qspi_rootfs: partition@3fe0000 { 113f4c35356SDinh Nguyen label = "Root Filesystem - JFFS2"; 114f4c35356SDinh Nguyen reg = <0x03FE0000 0x0C020000>; 115f4c35356SDinh Nguyen }; 116f4c35356SDinh Nguyen }; 117f4c35356SDinh Nguyen }; 118f4c35356SDinh Nguyen}; 119f4c35356SDinh Nguyen 120a427485aSDinh Nguyen&uart0 { 121a427485aSDinh Nguyen status = "okay"; 122a427485aSDinh Nguyen}; 123a427485aSDinh Nguyen 124f4c35356SDinh Nguyen&usb0 { 125f4c35356SDinh Nguyen status = "okay"; 126f4c35356SDinh Nguyen disable-over-current; 127f4c35356SDinh Nguyen}; 128f4c35356SDinh Nguyen 129a427485aSDinh Nguyen&watchdog0 { 130a427485aSDinh Nguyen status = "okay"; 131a427485aSDinh Nguyen}; 132