1*4f357f94SKefeng Wang/** 2*4f357f94SKefeng Wang * dts file for Hisilicon D05 Development Board 3*4f357f94SKefeng Wang * 4*4f357f94SKefeng Wang * Copyright (C) 2016 Hisilicon Ltd. 5*4f357f94SKefeng Wang * 6*4f357f94SKefeng Wang * This program is free software; you can redistribute it and/or modify 7*4f357f94SKefeng Wang * it under the terms of the GNU General Public License version 2 as 8*4f357f94SKefeng Wang * publishhed by the Free Software Foundation. 9*4f357f94SKefeng Wang * 10*4f357f94SKefeng Wang */ 11*4f357f94SKefeng Wang 12*4f357f94SKefeng Wang#include <dt-bindings/interrupt-controller/arm-gic.h> 13*4f357f94SKefeng Wang 14*4f357f94SKefeng Wang/ { 15*4f357f94SKefeng Wang compatible = "hisilicon,hip07-d05"; 16*4f357f94SKefeng Wang interrupt-parent = <&gic>; 17*4f357f94SKefeng Wang #address-cells = <2>; 18*4f357f94SKefeng Wang #size-cells = <2>; 19*4f357f94SKefeng Wang 20*4f357f94SKefeng Wang psci { 21*4f357f94SKefeng Wang compatible = "arm,psci-0.2"; 22*4f357f94SKefeng Wang method = "smc"; 23*4f357f94SKefeng Wang }; 24*4f357f94SKefeng Wang 25*4f357f94SKefeng Wang cpus { 26*4f357f94SKefeng Wang #address-cells = <1>; 27*4f357f94SKefeng Wang #size-cells = <0>; 28*4f357f94SKefeng Wang 29*4f357f94SKefeng Wang cpu-map { 30*4f357f94SKefeng Wang cluster0 { 31*4f357f94SKefeng Wang core0 { 32*4f357f94SKefeng Wang cpu = <&cpu0>; 33*4f357f94SKefeng Wang }; 34*4f357f94SKefeng Wang core1 { 35*4f357f94SKefeng Wang cpu = <&cpu1>; 36*4f357f94SKefeng Wang }; 37*4f357f94SKefeng Wang core2 { 38*4f357f94SKefeng Wang cpu = <&cpu2>; 39*4f357f94SKefeng Wang }; 40*4f357f94SKefeng Wang core3 { 41*4f357f94SKefeng Wang cpu = <&cpu3>; 42*4f357f94SKefeng Wang }; 43*4f357f94SKefeng Wang }; 44*4f357f94SKefeng Wang 45*4f357f94SKefeng Wang cluster1 { 46*4f357f94SKefeng Wang core0 { 47*4f357f94SKefeng Wang cpu = <&cpu4>; 48*4f357f94SKefeng Wang }; 49*4f357f94SKefeng Wang core1 { 50*4f357f94SKefeng Wang cpu = <&cpu5>; 51*4f357f94SKefeng Wang }; 52*4f357f94SKefeng Wang core2 { 53*4f357f94SKefeng Wang cpu = <&cpu6>; 54*4f357f94SKefeng Wang }; 55*4f357f94SKefeng Wang core3 { 56*4f357f94SKefeng Wang cpu = <&cpu7>; 57*4f357f94SKefeng Wang }; 58*4f357f94SKefeng Wang }; 59*4f357f94SKefeng Wang 60*4f357f94SKefeng Wang cluster2 { 61*4f357f94SKefeng Wang core0 { 62*4f357f94SKefeng Wang cpu = <&cpu8>; 63*4f357f94SKefeng Wang }; 64*4f357f94SKefeng Wang core1 { 65*4f357f94SKefeng Wang cpu = <&cpu9>; 66*4f357f94SKefeng Wang }; 67*4f357f94SKefeng Wang core2 { 68*4f357f94SKefeng Wang cpu = <&cpu10>; 69*4f357f94SKefeng Wang }; 70*4f357f94SKefeng Wang core3 { 71*4f357f94SKefeng Wang cpu = <&cpu11>; 72*4f357f94SKefeng Wang }; 73*4f357f94SKefeng Wang }; 74*4f357f94SKefeng Wang 75*4f357f94SKefeng Wang cluster3 { 76*4f357f94SKefeng Wang core0 { 77*4f357f94SKefeng Wang cpu = <&cpu12>; 78*4f357f94SKefeng Wang }; 79*4f357f94SKefeng Wang core1 { 80*4f357f94SKefeng Wang cpu = <&cpu13>; 81*4f357f94SKefeng Wang }; 82*4f357f94SKefeng Wang core2 { 83*4f357f94SKefeng Wang cpu = <&cpu14>; 84*4f357f94SKefeng Wang }; 85*4f357f94SKefeng Wang core3 { 86*4f357f94SKefeng Wang cpu = <&cpu15>; 87*4f357f94SKefeng Wang }; 88*4f357f94SKefeng Wang }; 89*4f357f94SKefeng Wang 90*4f357f94SKefeng Wang cluster4 { 91*4f357f94SKefeng Wang core0 { 92*4f357f94SKefeng Wang cpu = <&cpu16>; 93*4f357f94SKefeng Wang }; 94*4f357f94SKefeng Wang core1 { 95*4f357f94SKefeng Wang cpu = <&cpu17>; 96*4f357f94SKefeng Wang }; 97*4f357f94SKefeng Wang core2 { 98*4f357f94SKefeng Wang cpu = <&cpu18>; 99*4f357f94SKefeng Wang }; 100*4f357f94SKefeng Wang core3 { 101*4f357f94SKefeng Wang cpu = <&cpu19>; 102*4f357f94SKefeng Wang }; 103*4f357f94SKefeng Wang }; 104*4f357f94SKefeng Wang 105*4f357f94SKefeng Wang cluster5 { 106*4f357f94SKefeng Wang core0 { 107*4f357f94SKefeng Wang cpu = <&cpu20>; 108*4f357f94SKefeng Wang }; 109*4f357f94SKefeng Wang core1 { 110*4f357f94SKefeng Wang cpu = <&cpu21>; 111*4f357f94SKefeng Wang }; 112*4f357f94SKefeng Wang core2 { 113*4f357f94SKefeng Wang cpu = <&cpu22>; 114*4f357f94SKefeng Wang }; 115*4f357f94SKefeng Wang core3 { 116*4f357f94SKefeng Wang cpu = <&cpu23>; 117*4f357f94SKefeng Wang }; 118*4f357f94SKefeng Wang }; 119*4f357f94SKefeng Wang 120*4f357f94SKefeng Wang cluster6 { 121*4f357f94SKefeng Wang core0 { 122*4f357f94SKefeng Wang cpu = <&cpu24>; 123*4f357f94SKefeng Wang }; 124*4f357f94SKefeng Wang core1 { 125*4f357f94SKefeng Wang cpu = <&cpu25>; 126*4f357f94SKefeng Wang }; 127*4f357f94SKefeng Wang core2 { 128*4f357f94SKefeng Wang cpu = <&cpu26>; 129*4f357f94SKefeng Wang }; 130*4f357f94SKefeng Wang core3 { 131*4f357f94SKefeng Wang cpu = <&cpu27>; 132*4f357f94SKefeng Wang }; 133*4f357f94SKefeng Wang }; 134*4f357f94SKefeng Wang 135*4f357f94SKefeng Wang cluster7 { 136*4f357f94SKefeng Wang core0 { 137*4f357f94SKefeng Wang cpu = <&cpu28>; 138*4f357f94SKefeng Wang }; 139*4f357f94SKefeng Wang core1 { 140*4f357f94SKefeng Wang cpu = <&cpu29>; 141*4f357f94SKefeng Wang }; 142*4f357f94SKefeng Wang core2 { 143*4f357f94SKefeng Wang cpu = <&cpu30>; 144*4f357f94SKefeng Wang }; 145*4f357f94SKefeng Wang core3 { 146*4f357f94SKefeng Wang cpu = <&cpu31>; 147*4f357f94SKefeng Wang }; 148*4f357f94SKefeng Wang }; 149*4f357f94SKefeng Wang 150*4f357f94SKefeng Wang cluster8 { 151*4f357f94SKefeng Wang core0 { 152*4f357f94SKefeng Wang cpu = <&cpu32>; 153*4f357f94SKefeng Wang }; 154*4f357f94SKefeng Wang core1 { 155*4f357f94SKefeng Wang cpu = <&cpu33>; 156*4f357f94SKefeng Wang }; 157*4f357f94SKefeng Wang core2 { 158*4f357f94SKefeng Wang cpu = <&cpu34>; 159*4f357f94SKefeng Wang }; 160*4f357f94SKefeng Wang core3 { 161*4f357f94SKefeng Wang cpu = <&cpu35>; 162*4f357f94SKefeng Wang }; 163*4f357f94SKefeng Wang }; 164*4f357f94SKefeng Wang 165*4f357f94SKefeng Wang cluster9 { 166*4f357f94SKefeng Wang core0 { 167*4f357f94SKefeng Wang cpu = <&cpu36>; 168*4f357f94SKefeng Wang }; 169*4f357f94SKefeng Wang core1 { 170*4f357f94SKefeng Wang cpu = <&cpu37>; 171*4f357f94SKefeng Wang }; 172*4f357f94SKefeng Wang core2 { 173*4f357f94SKefeng Wang cpu = <&cpu38>; 174*4f357f94SKefeng Wang }; 175*4f357f94SKefeng Wang core3 { 176*4f357f94SKefeng Wang cpu = <&cpu39>; 177*4f357f94SKefeng Wang }; 178*4f357f94SKefeng Wang }; 179*4f357f94SKefeng Wang 180*4f357f94SKefeng Wang cluster10 { 181*4f357f94SKefeng Wang core0 { 182*4f357f94SKefeng Wang cpu = <&cpu40>; 183*4f357f94SKefeng Wang }; 184*4f357f94SKefeng Wang core1 { 185*4f357f94SKefeng Wang cpu = <&cpu41>; 186*4f357f94SKefeng Wang }; 187*4f357f94SKefeng Wang core2 { 188*4f357f94SKefeng Wang cpu = <&cpu42>; 189*4f357f94SKefeng Wang }; 190*4f357f94SKefeng Wang core3 { 191*4f357f94SKefeng Wang cpu = <&cpu43>; 192*4f357f94SKefeng Wang }; 193*4f357f94SKefeng Wang }; 194*4f357f94SKefeng Wang 195*4f357f94SKefeng Wang cluster11 { 196*4f357f94SKefeng Wang core0 { 197*4f357f94SKefeng Wang cpu = <&cpu44>; 198*4f357f94SKefeng Wang }; 199*4f357f94SKefeng Wang core1 { 200*4f357f94SKefeng Wang cpu = <&cpu45>; 201*4f357f94SKefeng Wang }; 202*4f357f94SKefeng Wang core2 { 203*4f357f94SKefeng Wang cpu = <&cpu46>; 204*4f357f94SKefeng Wang }; 205*4f357f94SKefeng Wang core3 { 206*4f357f94SKefeng Wang cpu = <&cpu47>; 207*4f357f94SKefeng Wang }; 208*4f357f94SKefeng Wang }; 209*4f357f94SKefeng Wang 210*4f357f94SKefeng Wang cluster12 { 211*4f357f94SKefeng Wang core0 { 212*4f357f94SKefeng Wang cpu = <&cpu48>; 213*4f357f94SKefeng Wang }; 214*4f357f94SKefeng Wang core1 { 215*4f357f94SKefeng Wang cpu = <&cpu49>; 216*4f357f94SKefeng Wang }; 217*4f357f94SKefeng Wang core2 { 218*4f357f94SKefeng Wang cpu = <&cpu50>; 219*4f357f94SKefeng Wang }; 220*4f357f94SKefeng Wang core3 { 221*4f357f94SKefeng Wang cpu = <&cpu51>; 222*4f357f94SKefeng Wang }; 223*4f357f94SKefeng Wang }; 224*4f357f94SKefeng Wang 225*4f357f94SKefeng Wang cluster13 { 226*4f357f94SKefeng Wang core0 { 227*4f357f94SKefeng Wang cpu = <&cpu52>; 228*4f357f94SKefeng Wang }; 229*4f357f94SKefeng Wang core1 { 230*4f357f94SKefeng Wang cpu = <&cpu53>; 231*4f357f94SKefeng Wang }; 232*4f357f94SKefeng Wang core2 { 233*4f357f94SKefeng Wang cpu = <&cpu54>; 234*4f357f94SKefeng Wang }; 235*4f357f94SKefeng Wang core3 { 236*4f357f94SKefeng Wang cpu = <&cpu55>; 237*4f357f94SKefeng Wang }; 238*4f357f94SKefeng Wang }; 239*4f357f94SKefeng Wang 240*4f357f94SKefeng Wang cluster14 { 241*4f357f94SKefeng Wang core0 { 242*4f357f94SKefeng Wang cpu = <&cpu56>; 243*4f357f94SKefeng Wang }; 244*4f357f94SKefeng Wang core1 { 245*4f357f94SKefeng Wang cpu = <&cpu57>; 246*4f357f94SKefeng Wang }; 247*4f357f94SKefeng Wang core2 { 248*4f357f94SKefeng Wang cpu = <&cpu58>; 249*4f357f94SKefeng Wang }; 250*4f357f94SKefeng Wang core3 { 251*4f357f94SKefeng Wang cpu = <&cpu59>; 252*4f357f94SKefeng Wang }; 253*4f357f94SKefeng Wang }; 254*4f357f94SKefeng Wang 255*4f357f94SKefeng Wang cluster15 { 256*4f357f94SKefeng Wang core0 { 257*4f357f94SKefeng Wang cpu = <&cpu60>; 258*4f357f94SKefeng Wang }; 259*4f357f94SKefeng Wang core1 { 260*4f357f94SKefeng Wang cpu = <&cpu61>; 261*4f357f94SKefeng Wang }; 262*4f357f94SKefeng Wang core2 { 263*4f357f94SKefeng Wang cpu = <&cpu62>; 264*4f357f94SKefeng Wang }; 265*4f357f94SKefeng Wang core3 { 266*4f357f94SKefeng Wang cpu = <&cpu63>; 267*4f357f94SKefeng Wang }; 268*4f357f94SKefeng Wang }; 269*4f357f94SKefeng Wang }; 270*4f357f94SKefeng Wang 271*4f357f94SKefeng Wang cpu0: cpu@10000 { 272*4f357f94SKefeng Wang device_type = "cpu"; 273*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 274*4f357f94SKefeng Wang reg = <0x10000>; 275*4f357f94SKefeng Wang enable-method = "psci"; 276*4f357f94SKefeng Wang next-level-cache = <&cluster0_l2>; 277*4f357f94SKefeng Wang numa-node-id = <0>; 278*4f357f94SKefeng Wang }; 279*4f357f94SKefeng Wang 280*4f357f94SKefeng Wang cpu1: cpu@10001 { 281*4f357f94SKefeng Wang device_type = "cpu"; 282*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 283*4f357f94SKefeng Wang reg = <0x10001>; 284*4f357f94SKefeng Wang enable-method = "psci"; 285*4f357f94SKefeng Wang next-level-cache = <&cluster0_l2>; 286*4f357f94SKefeng Wang numa-node-id = <0>; 287*4f357f94SKefeng Wang }; 288*4f357f94SKefeng Wang 289*4f357f94SKefeng Wang cpu2: cpu@10002 { 290*4f357f94SKefeng Wang device_type = "cpu"; 291*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 292*4f357f94SKefeng Wang reg = <0x10002>; 293*4f357f94SKefeng Wang enable-method = "psci"; 294*4f357f94SKefeng Wang next-level-cache = <&cluster0_l2>; 295*4f357f94SKefeng Wang numa-node-id = <0>; 296*4f357f94SKefeng Wang }; 297*4f357f94SKefeng Wang 298*4f357f94SKefeng Wang cpu3: cpu@10003 { 299*4f357f94SKefeng Wang device_type = "cpu"; 300*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 301*4f357f94SKefeng Wang reg = <0x10003>; 302*4f357f94SKefeng Wang enable-method = "psci"; 303*4f357f94SKefeng Wang next-level-cache = <&cluster0_l2>; 304*4f357f94SKefeng Wang numa-node-id = <0>; 305*4f357f94SKefeng Wang }; 306*4f357f94SKefeng Wang 307*4f357f94SKefeng Wang cpu4: cpu@10100 { 308*4f357f94SKefeng Wang device_type = "cpu"; 309*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 310*4f357f94SKefeng Wang reg = <0x10100>; 311*4f357f94SKefeng Wang enable-method = "psci"; 312*4f357f94SKefeng Wang next-level-cache = <&cluster1_l2>; 313*4f357f94SKefeng Wang numa-node-id = <0>; 314*4f357f94SKefeng Wang }; 315*4f357f94SKefeng Wang 316*4f357f94SKefeng Wang cpu5: cpu@10101 { 317*4f357f94SKefeng Wang device_type = "cpu"; 318*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 319*4f357f94SKefeng Wang reg = <0x10101>; 320*4f357f94SKefeng Wang enable-method = "psci"; 321*4f357f94SKefeng Wang next-level-cache = <&cluster1_l2>; 322*4f357f94SKefeng Wang numa-node-id = <0>; 323*4f357f94SKefeng Wang }; 324*4f357f94SKefeng Wang 325*4f357f94SKefeng Wang cpu6: cpu@10102 { 326*4f357f94SKefeng Wang device_type = "cpu"; 327*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 328*4f357f94SKefeng Wang reg = <0x10102>; 329*4f357f94SKefeng Wang enable-method = "psci"; 330*4f357f94SKefeng Wang next-level-cache = <&cluster1_l2>; 331*4f357f94SKefeng Wang numa-node-id = <0>; 332*4f357f94SKefeng Wang }; 333*4f357f94SKefeng Wang 334*4f357f94SKefeng Wang cpu7: cpu@10103 { 335*4f357f94SKefeng Wang device_type = "cpu"; 336*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 337*4f357f94SKefeng Wang reg = <0x10103>; 338*4f357f94SKefeng Wang enable-method = "psci"; 339*4f357f94SKefeng Wang next-level-cache = <&cluster1_l2>; 340*4f357f94SKefeng Wang numa-node-id = <0>; 341*4f357f94SKefeng Wang }; 342*4f357f94SKefeng Wang 343*4f357f94SKefeng Wang cpu8: cpu@10200 { 344*4f357f94SKefeng Wang device_type = "cpu"; 345*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 346*4f357f94SKefeng Wang reg = <0x10200>; 347*4f357f94SKefeng Wang enable-method = "psci"; 348*4f357f94SKefeng Wang next-level-cache = <&cluster2_l2>; 349*4f357f94SKefeng Wang numa-node-id = <0>; 350*4f357f94SKefeng Wang }; 351*4f357f94SKefeng Wang 352*4f357f94SKefeng Wang cpu9: cpu@10201 { 353*4f357f94SKefeng Wang device_type = "cpu"; 354*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 355*4f357f94SKefeng Wang reg = <0x10201>; 356*4f357f94SKefeng Wang enable-method = "psci"; 357*4f357f94SKefeng Wang next-level-cache = <&cluster2_l2>; 358*4f357f94SKefeng Wang numa-node-id = <0>; 359*4f357f94SKefeng Wang }; 360*4f357f94SKefeng Wang 361*4f357f94SKefeng Wang cpu10: cpu@10202 { 362*4f357f94SKefeng Wang device_type = "cpu"; 363*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 364*4f357f94SKefeng Wang reg = <0x10202>; 365*4f357f94SKefeng Wang enable-method = "psci"; 366*4f357f94SKefeng Wang next-level-cache = <&cluster2_l2>; 367*4f357f94SKefeng Wang numa-node-id = <0>; 368*4f357f94SKefeng Wang }; 369*4f357f94SKefeng Wang 370*4f357f94SKefeng Wang cpu11: cpu@10203 { 371*4f357f94SKefeng Wang device_type = "cpu"; 372*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 373*4f357f94SKefeng Wang reg = <0x10203>; 374*4f357f94SKefeng Wang enable-method = "psci"; 375*4f357f94SKefeng Wang next-level-cache = <&cluster2_l2>; 376*4f357f94SKefeng Wang numa-node-id = <0>; 377*4f357f94SKefeng Wang }; 378*4f357f94SKefeng Wang 379*4f357f94SKefeng Wang cpu12: cpu@10300 { 380*4f357f94SKefeng Wang device_type = "cpu"; 381*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 382*4f357f94SKefeng Wang reg = <0x10300>; 383*4f357f94SKefeng Wang enable-method = "psci"; 384*4f357f94SKefeng Wang next-level-cache = <&cluster3_l2>; 385*4f357f94SKefeng Wang numa-node-id = <0>; 386*4f357f94SKefeng Wang }; 387*4f357f94SKefeng Wang 388*4f357f94SKefeng Wang cpu13: cpu@10301 { 389*4f357f94SKefeng Wang device_type = "cpu"; 390*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 391*4f357f94SKefeng Wang reg = <0x10301>; 392*4f357f94SKefeng Wang enable-method = "psci"; 393*4f357f94SKefeng Wang next-level-cache = <&cluster3_l2>; 394*4f357f94SKefeng Wang numa-node-id = <0>; 395*4f357f94SKefeng Wang }; 396*4f357f94SKefeng Wang 397*4f357f94SKefeng Wang cpu14: cpu@10302 { 398*4f357f94SKefeng Wang device_type = "cpu"; 399*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 400*4f357f94SKefeng Wang reg = <0x10302>; 401*4f357f94SKefeng Wang enable-method = "psci"; 402*4f357f94SKefeng Wang next-level-cache = <&cluster3_l2>; 403*4f357f94SKefeng Wang numa-node-id = <0>; 404*4f357f94SKefeng Wang }; 405*4f357f94SKefeng Wang 406*4f357f94SKefeng Wang cpu15: cpu@10303 { 407*4f357f94SKefeng Wang device_type = "cpu"; 408*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 409*4f357f94SKefeng Wang reg = <0x10303>; 410*4f357f94SKefeng Wang enable-method = "psci"; 411*4f357f94SKefeng Wang next-level-cache = <&cluster3_l2>; 412*4f357f94SKefeng Wang numa-node-id = <0>; 413*4f357f94SKefeng Wang }; 414*4f357f94SKefeng Wang 415*4f357f94SKefeng Wang cpu16: cpu@30000 { 416*4f357f94SKefeng Wang device_type = "cpu"; 417*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 418*4f357f94SKefeng Wang reg = <0x30000>; 419*4f357f94SKefeng Wang enable-method = "psci"; 420*4f357f94SKefeng Wang next-level-cache = <&cluster4_l2>; 421*4f357f94SKefeng Wang numa-node-id = <1>; 422*4f357f94SKefeng Wang }; 423*4f357f94SKefeng Wang 424*4f357f94SKefeng Wang cpu17: cpu@30001 { 425*4f357f94SKefeng Wang device_type = "cpu"; 426*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 427*4f357f94SKefeng Wang reg = <0x30001>; 428*4f357f94SKefeng Wang enable-method = "psci"; 429*4f357f94SKefeng Wang next-level-cache = <&cluster4_l2>; 430*4f357f94SKefeng Wang numa-node-id = <1>; 431*4f357f94SKefeng Wang }; 432*4f357f94SKefeng Wang 433*4f357f94SKefeng Wang cpu18: cpu@30002 { 434*4f357f94SKefeng Wang device_type = "cpu"; 435*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 436*4f357f94SKefeng Wang reg = <0x30002>; 437*4f357f94SKefeng Wang enable-method = "psci"; 438*4f357f94SKefeng Wang next-level-cache = <&cluster4_l2>; 439*4f357f94SKefeng Wang numa-node-id = <1>; 440*4f357f94SKefeng Wang }; 441*4f357f94SKefeng Wang 442*4f357f94SKefeng Wang cpu19: cpu@30003 { 443*4f357f94SKefeng Wang device_type = "cpu"; 444*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 445*4f357f94SKefeng Wang reg = <0x30003>; 446*4f357f94SKefeng Wang enable-method = "psci"; 447*4f357f94SKefeng Wang next-level-cache = <&cluster4_l2>; 448*4f357f94SKefeng Wang numa-node-id = <1>; 449*4f357f94SKefeng Wang }; 450*4f357f94SKefeng Wang 451*4f357f94SKefeng Wang cpu20: cpu@30100 { 452*4f357f94SKefeng Wang device_type = "cpu"; 453*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 454*4f357f94SKefeng Wang reg = <0x30100>; 455*4f357f94SKefeng Wang enable-method = "psci"; 456*4f357f94SKefeng Wang next-level-cache = <&cluster5_l2>; 457*4f357f94SKefeng Wang numa-node-id = <1>; 458*4f357f94SKefeng Wang }; 459*4f357f94SKefeng Wang 460*4f357f94SKefeng Wang cpu21: cpu@30101 { 461*4f357f94SKefeng Wang device_type = "cpu"; 462*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 463*4f357f94SKefeng Wang reg = <0x30101>; 464*4f357f94SKefeng Wang enable-method = "psci"; 465*4f357f94SKefeng Wang next-level-cache = <&cluster5_l2>; 466*4f357f94SKefeng Wang numa-node-id = <1>; 467*4f357f94SKefeng Wang }; 468*4f357f94SKefeng Wang 469*4f357f94SKefeng Wang cpu22: cpu@30102 { 470*4f357f94SKefeng Wang device_type = "cpu"; 471*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 472*4f357f94SKefeng Wang reg = <0x30102>; 473*4f357f94SKefeng Wang enable-method = "psci"; 474*4f357f94SKefeng Wang next-level-cache = <&cluster5_l2>; 475*4f357f94SKefeng Wang numa-node-id = <1>; 476*4f357f94SKefeng Wang }; 477*4f357f94SKefeng Wang 478*4f357f94SKefeng Wang cpu23: cpu@30103 { 479*4f357f94SKefeng Wang device_type = "cpu"; 480*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 481*4f357f94SKefeng Wang reg = <0x30103>; 482*4f357f94SKefeng Wang enable-method = "psci"; 483*4f357f94SKefeng Wang next-level-cache = <&cluster5_l2>; 484*4f357f94SKefeng Wang numa-node-id = <1>; 485*4f357f94SKefeng Wang }; 486*4f357f94SKefeng Wang 487*4f357f94SKefeng Wang cpu24: cpu@30200 { 488*4f357f94SKefeng Wang device_type = "cpu"; 489*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 490*4f357f94SKefeng Wang reg = <0x30200>; 491*4f357f94SKefeng Wang enable-method = "psci"; 492*4f357f94SKefeng Wang next-level-cache = <&cluster6_l2>; 493*4f357f94SKefeng Wang numa-node-id = <1>; 494*4f357f94SKefeng Wang }; 495*4f357f94SKefeng Wang 496*4f357f94SKefeng Wang cpu25: cpu@30201 { 497*4f357f94SKefeng Wang device_type = "cpu"; 498*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 499*4f357f94SKefeng Wang reg = <0x30201>; 500*4f357f94SKefeng Wang enable-method = "psci"; 501*4f357f94SKefeng Wang next-level-cache = <&cluster6_l2>; 502*4f357f94SKefeng Wang numa-node-id = <1>; 503*4f357f94SKefeng Wang }; 504*4f357f94SKefeng Wang 505*4f357f94SKefeng Wang cpu26: cpu@30202 { 506*4f357f94SKefeng Wang device_type = "cpu"; 507*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 508*4f357f94SKefeng Wang reg = <0x30202>; 509*4f357f94SKefeng Wang enable-method = "psci"; 510*4f357f94SKefeng Wang next-level-cache = <&cluster6_l2>; 511*4f357f94SKefeng Wang numa-node-id = <1>; 512*4f357f94SKefeng Wang }; 513*4f357f94SKefeng Wang 514*4f357f94SKefeng Wang cpu27: cpu@30203 { 515*4f357f94SKefeng Wang device_type = "cpu"; 516*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 517*4f357f94SKefeng Wang reg = <0x30203>; 518*4f357f94SKefeng Wang enable-method = "psci"; 519*4f357f94SKefeng Wang next-level-cache = <&cluster6_l2>; 520*4f357f94SKefeng Wang numa-node-id = <1>; 521*4f357f94SKefeng Wang }; 522*4f357f94SKefeng Wang 523*4f357f94SKefeng Wang cpu28: cpu@30300 { 524*4f357f94SKefeng Wang device_type = "cpu"; 525*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 526*4f357f94SKefeng Wang reg = <0x30300>; 527*4f357f94SKefeng Wang enable-method = "psci"; 528*4f357f94SKefeng Wang next-level-cache = <&cluster7_l2>; 529*4f357f94SKefeng Wang numa-node-id = <1>; 530*4f357f94SKefeng Wang }; 531*4f357f94SKefeng Wang 532*4f357f94SKefeng Wang cpu29: cpu@30301 { 533*4f357f94SKefeng Wang device_type = "cpu"; 534*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 535*4f357f94SKefeng Wang reg = <0x30301>; 536*4f357f94SKefeng Wang enable-method = "psci"; 537*4f357f94SKefeng Wang next-level-cache = <&cluster7_l2>; 538*4f357f94SKefeng Wang numa-node-id = <1>; 539*4f357f94SKefeng Wang }; 540*4f357f94SKefeng Wang 541*4f357f94SKefeng Wang cpu30: cpu@30302 { 542*4f357f94SKefeng Wang device_type = "cpu"; 543*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 544*4f357f94SKefeng Wang reg = <0x30302>; 545*4f357f94SKefeng Wang enable-method = "psci"; 546*4f357f94SKefeng Wang next-level-cache = <&cluster7_l2>; 547*4f357f94SKefeng Wang numa-node-id = <1>; 548*4f357f94SKefeng Wang }; 549*4f357f94SKefeng Wang 550*4f357f94SKefeng Wang cpu31: cpu@30303 { 551*4f357f94SKefeng Wang device_type = "cpu"; 552*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 553*4f357f94SKefeng Wang reg = <0x30303>; 554*4f357f94SKefeng Wang enable-method = "psci"; 555*4f357f94SKefeng Wang next-level-cache = <&cluster7_l2>; 556*4f357f94SKefeng Wang numa-node-id = <1>; 557*4f357f94SKefeng Wang }; 558*4f357f94SKefeng Wang 559*4f357f94SKefeng Wang cpu32: cpu@50000 { 560*4f357f94SKefeng Wang device_type = "cpu"; 561*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 562*4f357f94SKefeng Wang reg = <0x50000>; 563*4f357f94SKefeng Wang enable-method = "psci"; 564*4f357f94SKefeng Wang next-level-cache = <&cluster8_l2>; 565*4f357f94SKefeng Wang numa-node-id = <2>; 566*4f357f94SKefeng Wang }; 567*4f357f94SKefeng Wang 568*4f357f94SKefeng Wang cpu33: cpu@50001 { 569*4f357f94SKefeng Wang device_type = "cpu"; 570*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 571*4f357f94SKefeng Wang reg = <0x50001>; 572*4f357f94SKefeng Wang enable-method = "psci"; 573*4f357f94SKefeng Wang next-level-cache = <&cluster8_l2>; 574*4f357f94SKefeng Wang numa-node-id = <2>; 575*4f357f94SKefeng Wang }; 576*4f357f94SKefeng Wang 577*4f357f94SKefeng Wang cpu34: cpu@50002 { 578*4f357f94SKefeng Wang device_type = "cpu"; 579*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 580*4f357f94SKefeng Wang reg = <0x50002>; 581*4f357f94SKefeng Wang enable-method = "psci"; 582*4f357f94SKefeng Wang next-level-cache = <&cluster8_l2>; 583*4f357f94SKefeng Wang numa-node-id = <2>; 584*4f357f94SKefeng Wang }; 585*4f357f94SKefeng Wang 586*4f357f94SKefeng Wang cpu35: cpu@50003 { 587*4f357f94SKefeng Wang device_type = "cpu"; 588*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 589*4f357f94SKefeng Wang reg = <0x50003>; 590*4f357f94SKefeng Wang enable-method = "psci"; 591*4f357f94SKefeng Wang next-level-cache = <&cluster8_l2>; 592*4f357f94SKefeng Wang numa-node-id = <2>; 593*4f357f94SKefeng Wang }; 594*4f357f94SKefeng Wang 595*4f357f94SKefeng Wang cpu36: cpu@50100 { 596*4f357f94SKefeng Wang device_type = "cpu"; 597*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 598*4f357f94SKefeng Wang reg = <0x50100>; 599*4f357f94SKefeng Wang enable-method = "psci"; 600*4f357f94SKefeng Wang next-level-cache = <&cluster9_l2>; 601*4f357f94SKefeng Wang numa-node-id = <2>; 602*4f357f94SKefeng Wang }; 603*4f357f94SKefeng Wang 604*4f357f94SKefeng Wang cpu37: cpu@50101 { 605*4f357f94SKefeng Wang device_type = "cpu"; 606*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 607*4f357f94SKefeng Wang reg = <0x50101>; 608*4f357f94SKefeng Wang enable-method = "psci"; 609*4f357f94SKefeng Wang next-level-cache = <&cluster9_l2>; 610*4f357f94SKefeng Wang numa-node-id = <2>; 611*4f357f94SKefeng Wang }; 612*4f357f94SKefeng Wang 613*4f357f94SKefeng Wang cpu38: cpu@50102 { 614*4f357f94SKefeng Wang device_type = "cpu"; 615*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 616*4f357f94SKefeng Wang reg = <0x50102>; 617*4f357f94SKefeng Wang enable-method = "psci"; 618*4f357f94SKefeng Wang next-level-cache = <&cluster9_l2>; 619*4f357f94SKefeng Wang numa-node-id = <2>; 620*4f357f94SKefeng Wang }; 621*4f357f94SKefeng Wang 622*4f357f94SKefeng Wang cpu39: cpu@50103 { 623*4f357f94SKefeng Wang device_type = "cpu"; 624*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 625*4f357f94SKefeng Wang reg = <0x50103>; 626*4f357f94SKefeng Wang enable-method = "psci"; 627*4f357f94SKefeng Wang next-level-cache = <&cluster9_l2>; 628*4f357f94SKefeng Wang numa-node-id = <2>; 629*4f357f94SKefeng Wang }; 630*4f357f94SKefeng Wang 631*4f357f94SKefeng Wang cpu40: cpu@50200 { 632*4f357f94SKefeng Wang device_type = "cpu"; 633*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 634*4f357f94SKefeng Wang reg = <0x50200>; 635*4f357f94SKefeng Wang enable-method = "psci"; 636*4f357f94SKefeng Wang next-level-cache = <&cluster10_l2>; 637*4f357f94SKefeng Wang numa-node-id = <2>; 638*4f357f94SKefeng Wang }; 639*4f357f94SKefeng Wang 640*4f357f94SKefeng Wang cpu41: cpu@50201 { 641*4f357f94SKefeng Wang device_type = "cpu"; 642*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 643*4f357f94SKefeng Wang reg = <0x50201>; 644*4f357f94SKefeng Wang enable-method = "psci"; 645*4f357f94SKefeng Wang next-level-cache = <&cluster10_l2>; 646*4f357f94SKefeng Wang numa-node-id = <2>; 647*4f357f94SKefeng Wang }; 648*4f357f94SKefeng Wang 649*4f357f94SKefeng Wang cpu42: cpu@50202 { 650*4f357f94SKefeng Wang device_type = "cpu"; 651*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 652*4f357f94SKefeng Wang reg = <0x50202>; 653*4f357f94SKefeng Wang enable-method = "psci"; 654*4f357f94SKefeng Wang next-level-cache = <&cluster10_l2>; 655*4f357f94SKefeng Wang numa-node-id = <2>; 656*4f357f94SKefeng Wang }; 657*4f357f94SKefeng Wang 658*4f357f94SKefeng Wang cpu43: cpu@50203 { 659*4f357f94SKefeng Wang device_type = "cpu"; 660*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 661*4f357f94SKefeng Wang reg = <0x50203>; 662*4f357f94SKefeng Wang enable-method = "psci"; 663*4f357f94SKefeng Wang next-level-cache = <&cluster10_l2>; 664*4f357f94SKefeng Wang numa-node-id = <2>; 665*4f357f94SKefeng Wang }; 666*4f357f94SKefeng Wang 667*4f357f94SKefeng Wang cpu44: cpu@50300 { 668*4f357f94SKefeng Wang device_type = "cpu"; 669*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 670*4f357f94SKefeng Wang reg = <0x50300>; 671*4f357f94SKefeng Wang enable-method = "psci"; 672*4f357f94SKefeng Wang next-level-cache = <&cluster11_l2>; 673*4f357f94SKefeng Wang numa-node-id = <2>; 674*4f357f94SKefeng Wang }; 675*4f357f94SKefeng Wang 676*4f357f94SKefeng Wang cpu45: cpu@50301 { 677*4f357f94SKefeng Wang device_type = "cpu"; 678*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 679*4f357f94SKefeng Wang reg = <0x50301>; 680*4f357f94SKefeng Wang enable-method = "psci"; 681*4f357f94SKefeng Wang next-level-cache = <&cluster11_l2>; 682*4f357f94SKefeng Wang numa-node-id = <2>; 683*4f357f94SKefeng Wang }; 684*4f357f94SKefeng Wang 685*4f357f94SKefeng Wang cpu46: cpu@50302 { 686*4f357f94SKefeng Wang device_type = "cpu"; 687*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 688*4f357f94SKefeng Wang reg = <0x50302>; 689*4f357f94SKefeng Wang enable-method = "psci"; 690*4f357f94SKefeng Wang next-level-cache = <&cluster11_l2>; 691*4f357f94SKefeng Wang numa-node-id = <2>; 692*4f357f94SKefeng Wang }; 693*4f357f94SKefeng Wang 694*4f357f94SKefeng Wang cpu47: cpu@50303 { 695*4f357f94SKefeng Wang device_type = "cpu"; 696*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 697*4f357f94SKefeng Wang reg = <0x50303>; 698*4f357f94SKefeng Wang enable-method = "psci"; 699*4f357f94SKefeng Wang next-level-cache = <&cluster11_l2>; 700*4f357f94SKefeng Wang numa-node-id = <2>; 701*4f357f94SKefeng Wang }; 702*4f357f94SKefeng Wang 703*4f357f94SKefeng Wang cpu48: cpu@70000 { 704*4f357f94SKefeng Wang device_type = "cpu"; 705*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 706*4f357f94SKefeng Wang reg = <0x70000>; 707*4f357f94SKefeng Wang enable-method = "psci"; 708*4f357f94SKefeng Wang next-level-cache = <&cluster12_l2>; 709*4f357f94SKefeng Wang numa-node-id = <3>; 710*4f357f94SKefeng Wang }; 711*4f357f94SKefeng Wang 712*4f357f94SKefeng Wang cpu49: cpu@70001 { 713*4f357f94SKefeng Wang device_type = "cpu"; 714*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 715*4f357f94SKefeng Wang reg = <0x70001>; 716*4f357f94SKefeng Wang enable-method = "psci"; 717*4f357f94SKefeng Wang next-level-cache = <&cluster12_l2>; 718*4f357f94SKefeng Wang numa-node-id = <3>; 719*4f357f94SKefeng Wang }; 720*4f357f94SKefeng Wang 721*4f357f94SKefeng Wang cpu50: cpu@70002 { 722*4f357f94SKefeng Wang device_type = "cpu"; 723*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 724*4f357f94SKefeng Wang reg = <0x70002>; 725*4f357f94SKefeng Wang enable-method = "psci"; 726*4f357f94SKefeng Wang next-level-cache = <&cluster12_l2>; 727*4f357f94SKefeng Wang numa-node-id = <3>; 728*4f357f94SKefeng Wang }; 729*4f357f94SKefeng Wang 730*4f357f94SKefeng Wang cpu51: cpu@70003 { 731*4f357f94SKefeng Wang device_type = "cpu"; 732*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 733*4f357f94SKefeng Wang reg = <0x70003>; 734*4f357f94SKefeng Wang enable-method = "psci"; 735*4f357f94SKefeng Wang next-level-cache = <&cluster12_l2>; 736*4f357f94SKefeng Wang numa-node-id = <3>; 737*4f357f94SKefeng Wang }; 738*4f357f94SKefeng Wang 739*4f357f94SKefeng Wang cpu52: cpu@70100 { 740*4f357f94SKefeng Wang device_type = "cpu"; 741*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 742*4f357f94SKefeng Wang reg = <0x70100>; 743*4f357f94SKefeng Wang enable-method = "psci"; 744*4f357f94SKefeng Wang next-level-cache = <&cluster13_l2>; 745*4f357f94SKefeng Wang numa-node-id = <3>; 746*4f357f94SKefeng Wang }; 747*4f357f94SKefeng Wang 748*4f357f94SKefeng Wang cpu53: cpu@70101 { 749*4f357f94SKefeng Wang device_type = "cpu"; 750*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 751*4f357f94SKefeng Wang reg = <0x70101>; 752*4f357f94SKefeng Wang enable-method = "psci"; 753*4f357f94SKefeng Wang next-level-cache = <&cluster13_l2>; 754*4f357f94SKefeng Wang numa-node-id = <3>; 755*4f357f94SKefeng Wang }; 756*4f357f94SKefeng Wang 757*4f357f94SKefeng Wang cpu54: cpu@70102 { 758*4f357f94SKefeng Wang device_type = "cpu"; 759*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 760*4f357f94SKefeng Wang reg = <0x70102>; 761*4f357f94SKefeng Wang enable-method = "psci"; 762*4f357f94SKefeng Wang next-level-cache = <&cluster13_l2>; 763*4f357f94SKefeng Wang numa-node-id = <3>; 764*4f357f94SKefeng Wang }; 765*4f357f94SKefeng Wang 766*4f357f94SKefeng Wang cpu55: cpu@70103 { 767*4f357f94SKefeng Wang device_type = "cpu"; 768*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 769*4f357f94SKefeng Wang reg = <0x70103>; 770*4f357f94SKefeng Wang enable-method = "psci"; 771*4f357f94SKefeng Wang next-level-cache = <&cluster13_l2>; 772*4f357f94SKefeng Wang numa-node-id = <3>; 773*4f357f94SKefeng Wang }; 774*4f357f94SKefeng Wang 775*4f357f94SKefeng Wang cpu56: cpu@70200 { 776*4f357f94SKefeng Wang device_type = "cpu"; 777*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 778*4f357f94SKefeng Wang reg = <0x70200>; 779*4f357f94SKefeng Wang enable-method = "psci"; 780*4f357f94SKefeng Wang next-level-cache = <&cluster14_l2>; 781*4f357f94SKefeng Wang numa-node-id = <3>; 782*4f357f94SKefeng Wang }; 783*4f357f94SKefeng Wang 784*4f357f94SKefeng Wang cpu57: cpu@70201 { 785*4f357f94SKefeng Wang device_type = "cpu"; 786*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 787*4f357f94SKefeng Wang reg = <0x70201>; 788*4f357f94SKefeng Wang enable-method = "psci"; 789*4f357f94SKefeng Wang next-level-cache = <&cluster14_l2>; 790*4f357f94SKefeng Wang numa-node-id = <3>; 791*4f357f94SKefeng Wang }; 792*4f357f94SKefeng Wang 793*4f357f94SKefeng Wang cpu58: cpu@70202 { 794*4f357f94SKefeng Wang device_type = "cpu"; 795*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 796*4f357f94SKefeng Wang reg = <0x70202>; 797*4f357f94SKefeng Wang enable-method = "psci"; 798*4f357f94SKefeng Wang next-level-cache = <&cluster14_l2>; 799*4f357f94SKefeng Wang numa-node-id = <3>; 800*4f357f94SKefeng Wang }; 801*4f357f94SKefeng Wang 802*4f357f94SKefeng Wang cpu59: cpu@70203 { 803*4f357f94SKefeng Wang device_type = "cpu"; 804*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 805*4f357f94SKefeng Wang reg = <0x70203>; 806*4f357f94SKefeng Wang enable-method = "psci"; 807*4f357f94SKefeng Wang next-level-cache = <&cluster14_l2>; 808*4f357f94SKefeng Wang numa-node-id = <3>; 809*4f357f94SKefeng Wang }; 810*4f357f94SKefeng Wang 811*4f357f94SKefeng Wang cpu60: cpu@70300 { 812*4f357f94SKefeng Wang device_type = "cpu"; 813*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 814*4f357f94SKefeng Wang reg = <0x70300>; 815*4f357f94SKefeng Wang enable-method = "psci"; 816*4f357f94SKefeng Wang next-level-cache = <&cluster15_l2>; 817*4f357f94SKefeng Wang numa-node-id = <3>; 818*4f357f94SKefeng Wang }; 819*4f357f94SKefeng Wang 820*4f357f94SKefeng Wang cpu61: cpu@70301 { 821*4f357f94SKefeng Wang device_type = "cpu"; 822*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 823*4f357f94SKefeng Wang reg = <0x70301>; 824*4f357f94SKefeng Wang enable-method = "psci"; 825*4f357f94SKefeng Wang next-level-cache = <&cluster15_l2>; 826*4f357f94SKefeng Wang numa-node-id = <3>; 827*4f357f94SKefeng Wang }; 828*4f357f94SKefeng Wang 829*4f357f94SKefeng Wang cpu62: cpu@70302 { 830*4f357f94SKefeng Wang device_type = "cpu"; 831*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 832*4f357f94SKefeng Wang reg = <0x70302>; 833*4f357f94SKefeng Wang enable-method = "psci"; 834*4f357f94SKefeng Wang next-level-cache = <&cluster15_l2>; 835*4f357f94SKefeng Wang numa-node-id = <3>; 836*4f357f94SKefeng Wang }; 837*4f357f94SKefeng Wang 838*4f357f94SKefeng Wang cpu63: cpu@70303 { 839*4f357f94SKefeng Wang device_type = "cpu"; 840*4f357f94SKefeng Wang compatible = "arm,cortex-a72", "arm,armv8"; 841*4f357f94SKefeng Wang reg = <0x70303>; 842*4f357f94SKefeng Wang enable-method = "psci"; 843*4f357f94SKefeng Wang next-level-cache = <&cluster15_l2>; 844*4f357f94SKefeng Wang numa-node-id = <3>; 845*4f357f94SKefeng Wang }; 846*4f357f94SKefeng Wang 847*4f357f94SKefeng Wang cluster0_l2: l2-cache0 { 848*4f357f94SKefeng Wang compatible = "cache"; 849*4f357f94SKefeng Wang }; 850*4f357f94SKefeng Wang 851*4f357f94SKefeng Wang cluster1_l2: l2-cache1 { 852*4f357f94SKefeng Wang compatible = "cache"; 853*4f357f94SKefeng Wang }; 854*4f357f94SKefeng Wang 855*4f357f94SKefeng Wang cluster2_l2: l2-cache2 { 856*4f357f94SKefeng Wang compatible = "cache"; 857*4f357f94SKefeng Wang }; 858*4f357f94SKefeng Wang 859*4f357f94SKefeng Wang cluster3_l2: l2-cache3 { 860*4f357f94SKefeng Wang compatible = "cache"; 861*4f357f94SKefeng Wang }; 862*4f357f94SKefeng Wang 863*4f357f94SKefeng Wang cluster4_l2: l2-cache4 { 864*4f357f94SKefeng Wang compatible = "cache"; 865*4f357f94SKefeng Wang }; 866*4f357f94SKefeng Wang 867*4f357f94SKefeng Wang cluster5_l2: l2-cache5 { 868*4f357f94SKefeng Wang compatible = "cache"; 869*4f357f94SKefeng Wang }; 870*4f357f94SKefeng Wang 871*4f357f94SKefeng Wang cluster6_l2: l2-cache6 { 872*4f357f94SKefeng Wang compatible = "cache"; 873*4f357f94SKefeng Wang }; 874*4f357f94SKefeng Wang 875*4f357f94SKefeng Wang cluster7_l2: l2-cache7 { 876*4f357f94SKefeng Wang compatible = "cache"; 877*4f357f94SKefeng Wang }; 878*4f357f94SKefeng Wang 879*4f357f94SKefeng Wang cluster8_l2: l2-cache8 { 880*4f357f94SKefeng Wang compatible = "cache"; 881*4f357f94SKefeng Wang }; 882*4f357f94SKefeng Wang 883*4f357f94SKefeng Wang cluster9_l2: l2-cache9 { 884*4f357f94SKefeng Wang compatible = "cache"; 885*4f357f94SKefeng Wang }; 886*4f357f94SKefeng Wang 887*4f357f94SKefeng Wang cluster10_l2: l2-cache10 { 888*4f357f94SKefeng Wang compatible = "cache"; 889*4f357f94SKefeng Wang }; 890*4f357f94SKefeng Wang 891*4f357f94SKefeng Wang cluster11_l2: l2-cache11 { 892*4f357f94SKefeng Wang compatible = "cache"; 893*4f357f94SKefeng Wang }; 894*4f357f94SKefeng Wang 895*4f357f94SKefeng Wang cluster12_l2: l2-cache12 { 896*4f357f94SKefeng Wang compatible = "cache"; 897*4f357f94SKefeng Wang }; 898*4f357f94SKefeng Wang 899*4f357f94SKefeng Wang cluster13_l2: l2-cache13 { 900*4f357f94SKefeng Wang compatible = "cache"; 901*4f357f94SKefeng Wang }; 902*4f357f94SKefeng Wang 903*4f357f94SKefeng Wang cluster14_l2: l2-cache14 { 904*4f357f94SKefeng Wang compatible = "cache"; 905*4f357f94SKefeng Wang }; 906*4f357f94SKefeng Wang 907*4f357f94SKefeng Wang cluster15_l2: l2-cache15 { 908*4f357f94SKefeng Wang compatible = "cache"; 909*4f357f94SKefeng Wang }; 910*4f357f94SKefeng Wang }; 911*4f357f94SKefeng Wang 912*4f357f94SKefeng Wang gic: interrupt-controller@4d000000 { 913*4f357f94SKefeng Wang compatible = "arm,gic-v3"; 914*4f357f94SKefeng Wang #interrupt-cells = <3>; 915*4f357f94SKefeng Wang #address-cells = <2>; 916*4f357f94SKefeng Wang #size-cells = <2>; 917*4f357f94SKefeng Wang ranges; 918*4f357f94SKefeng Wang interrupt-controller; 919*4f357f94SKefeng Wang #redistributor-regions = <4>; 920*4f357f94SKefeng Wang redistributor-stride = <0x0 0x40000>; 921*4f357f94SKefeng Wang reg = <0x0 0x4d000000 0x0 0x10000>, /* GICD */ 922*4f357f94SKefeng Wang <0x0 0x4d100000 0x0 0x400000>, /* p0 GICR node 0 */ 923*4f357f94SKefeng Wang <0x0 0x6d100000 0x0 0x400000>, /* p0 GICR node 1 */ 924*4f357f94SKefeng Wang <0x400 0x4d100000 0x0 0x400000>, /* p1 GICR node 2 */ 925*4f357f94SKefeng Wang <0x400 0x6d100000 0x0 0x400000>, /* p1 GICR node 3 */ 926*4f357f94SKefeng Wang <0x0 0xfe000000 0x0 0x10000>, /* GICC */ 927*4f357f94SKefeng Wang <0x0 0xfe010000 0x0 0x10000>, /* GICH */ 928*4f357f94SKefeng Wang <0x0 0xfe020000 0x0 0x10000>; /* GICV */ 929*4f357f94SKefeng Wang interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 930*4f357f94SKefeng Wang 931*4f357f94SKefeng Wang p0_its_peri_a: interrupt-controller@4c000000 { 932*4f357f94SKefeng Wang compatible = "arm,gic-v3-its"; 933*4f357f94SKefeng Wang msi-controller; 934*4f357f94SKefeng Wang #msi-cells = <1>; 935*4f357f94SKefeng Wang reg = <0x0 0x4c000000 0x0 0x40000>; 936*4f357f94SKefeng Wang }; 937*4f357f94SKefeng Wang 938*4f357f94SKefeng Wang p0_its_peri_b: interrupt-controller@6c000000 { 939*4f357f94SKefeng Wang compatible = "arm,gic-v3-its"; 940*4f357f94SKefeng Wang msi-controller; 941*4f357f94SKefeng Wang #msi-cells = <1>; 942*4f357f94SKefeng Wang reg = <0x0 0x6c000000 0x0 0x40000>; 943*4f357f94SKefeng Wang }; 944*4f357f94SKefeng Wang 945*4f357f94SKefeng Wang p0_its_dsa_a: interrupt-controller@c6000000 { 946*4f357f94SKefeng Wang compatible = "arm,gic-v3-its"; 947*4f357f94SKefeng Wang msi-controller; 948*4f357f94SKefeng Wang #msi-cells = <1>; 949*4f357f94SKefeng Wang reg = <0x0 0xc6000000 0x0 0x40000>; 950*4f357f94SKefeng Wang }; 951*4f357f94SKefeng Wang 952*4f357f94SKefeng Wang p0_its_dsa_b: interrupt-controller@8,c6000000 { 953*4f357f94SKefeng Wang compatible = "arm,gic-v3-its"; 954*4f357f94SKefeng Wang msi-controller; 955*4f357f94SKefeng Wang #msi-cells = <1>; 956*4f357f94SKefeng Wang reg = <0x8 0xc6000000 0x0 0x40000>; 957*4f357f94SKefeng Wang }; 958*4f357f94SKefeng Wang 959*4f357f94SKefeng Wang p1_its_peri_a: interrupt-controller@400,4c000000 { 960*4f357f94SKefeng Wang compatible = "arm,gic-v3-its"; 961*4f357f94SKefeng Wang msi-controller; 962*4f357f94SKefeng Wang #msi-cells = <1>; 963*4f357f94SKefeng Wang reg = <0x400 0x4c000000 0x0 0x40000>; 964*4f357f94SKefeng Wang }; 965*4f357f94SKefeng Wang 966*4f357f94SKefeng Wang p1_its_peri_b: interrupt-controller@400,6c000000 { 967*4f357f94SKefeng Wang compatible = "arm,gic-v3-its"; 968*4f357f94SKefeng Wang msi-controller; 969*4f357f94SKefeng Wang #msi-cells = <1>; 970*4f357f94SKefeng Wang reg = <0x400 0x6c000000 0x0 0x40000>; 971*4f357f94SKefeng Wang }; 972*4f357f94SKefeng Wang 973*4f357f94SKefeng Wang p1_its_dsa_a: interrupt-controller@400,c6000000 { 974*4f357f94SKefeng Wang compatible = "arm,gic-v3-its"; 975*4f357f94SKefeng Wang msi-controller; 976*4f357f94SKefeng Wang #msi-cells = <1>; 977*4f357f94SKefeng Wang reg = <0x400 0xc6000000 0x0 0x40000>; 978*4f357f94SKefeng Wang }; 979*4f357f94SKefeng Wang 980*4f357f94SKefeng Wang p1_its_dsa_b: interrupt-controller@408,c6000000 { 981*4f357f94SKefeng Wang compatible = "arm,gic-v3-its"; 982*4f357f94SKefeng Wang msi-controller; 983*4f357f94SKefeng Wang #msi-cells = <1>; 984*4f357f94SKefeng Wang reg = <0x408 0xc6000000 0x0 0x40000>; 985*4f357f94SKefeng Wang }; 986*4f357f94SKefeng Wang }; 987*4f357f94SKefeng Wang 988*4f357f94SKefeng Wang timer { 989*4f357f94SKefeng Wang compatible = "arm,armv8-timer"; 990*4f357f94SKefeng Wang interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, 991*4f357f94SKefeng Wang <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, 992*4f357f94SKefeng Wang <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, 993*4f357f94SKefeng Wang <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; 994*4f357f94SKefeng Wang }; 995*4f357f94SKefeng Wang 996*4f357f94SKefeng Wang pmu { 997*4f357f94SKefeng Wang compatible = "arm,cortex-a72-pmu"; 998*4f357f94SKefeng Wang interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; 999*4f357f94SKefeng Wang }; 1000*4f357f94SKefeng Wang 1001*4f357f94SKefeng Wang p0_mbigen_peri_b: interrupt-controller@60080000 { 1002*4f357f94SKefeng Wang compatible = "hisilicon,mbigen-v2"; 1003*4f357f94SKefeng Wang reg = <0x0 0x60080000 0x0 0x10000>; 1004*4f357f94SKefeng Wang 1005*4f357f94SKefeng Wang mbigen_uart: uart_intc { 1006*4f357f94SKefeng Wang msi-parent = <&p0_its_peri_b 0x120c7>; 1007*4f357f94SKefeng Wang interrupt-controller; 1008*4f357f94SKefeng Wang #interrupt-cells = <2>; 1009*4f357f94SKefeng Wang num-pins = <1>; 1010*4f357f94SKefeng Wang }; 1011*4f357f94SKefeng Wang }; 1012*4f357f94SKefeng Wang 1013*4f357f94SKefeng Wang p0_mbigen_pcie_a: interrupt-controller@a0080000 { 1014*4f357f94SKefeng Wang compatible = "hisilicon,mbigen-v2"; 1015*4f357f94SKefeng Wang reg = <0x0 0xa0080000 0x0 0x10000>; 1016*4f357f94SKefeng Wang 1017*4f357f94SKefeng Wang mbigen_usb: intc_usb { 1018*4f357f94SKefeng Wang msi-parent = <&p0_its_dsa_a 0x40080>; 1019*4f357f94SKefeng Wang interrupt-controller; 1020*4f357f94SKefeng Wang #interrupt-cells = <2>; 1021*4f357f94SKefeng Wang num-pins = <2>; 1022*4f357f94SKefeng Wang }; 1023*4f357f94SKefeng Wang }; 1024*4f357f94SKefeng Wang 1025*4f357f94SKefeng Wang soc { 1026*4f357f94SKefeng Wang compatible = "simple-bus"; 1027*4f357f94SKefeng Wang #address-cells = <2>; 1028*4f357f94SKefeng Wang #size-cells = <2>; 1029*4f357f94SKefeng Wang ranges; 1030*4f357f94SKefeng Wang 1031*4f357f94SKefeng Wang uart0: uart@602b0000 { 1032*4f357f94SKefeng Wang compatible = "arm,sbsa-uart"; 1033*4f357f94SKefeng Wang reg = <0x0 0x602b0000 0x0 0x1000>; 1034*4f357f94SKefeng Wang interrupt-parent = <&mbigen_uart>; 1035*4f357f94SKefeng Wang interrupts = <807 4>; 1036*4f357f94SKefeng Wang current-speed = <115200>; 1037*4f357f94SKefeng Wang reg-io-width = <4>; 1038*4f357f94SKefeng Wang status = "disabled"; 1039*4f357f94SKefeng Wang }; 1040*4f357f94SKefeng Wang 1041*4f357f94SKefeng Wang usb_ohci: ohci@a7030000 { 1042*4f357f94SKefeng Wang compatible = "generic-ohci"; 1043*4f357f94SKefeng Wang reg = <0x0 0xa7030000 0x0 0x10000>; 1044*4f357f94SKefeng Wang interrupt-parent = <&mbigen_usb>; 1045*4f357f94SKefeng Wang interrupts = <640 4>; 1046*4f357f94SKefeng Wang dma-coherent; 1047*4f357f94SKefeng Wang status = "disabled"; 1048*4f357f94SKefeng Wang }; 1049*4f357f94SKefeng Wang 1050*4f357f94SKefeng Wang usb_ehci: ehci@a7020000 { 1051*4f357f94SKefeng Wang compatible = "generic-ehci"; 1052*4f357f94SKefeng Wang reg = <0x0 0xa7020000 0x0 0x10000>; 1053*4f357f94SKefeng Wang interrupt-parent = <&mbigen_usb>; 1054*4f357f94SKefeng Wang interrupts = <641 4>; 1055*4f357f94SKefeng Wang dma-coherent; 1056*4f357f94SKefeng Wang status = "disabled"; 1057*4f357f94SKefeng Wang }; 1058*4f357f94SKefeng Wang }; 1059*4f357f94SKefeng Wang}; 1060