18f0216b0SAngus Ainslie (Purism)// SPDX-License-Identifier: GPL-2.0+ 28f0216b0SAngus Ainslie (Purism)/* 38f0216b0SAngus Ainslie (Purism) * Copyright 2018-2020 Purism SPC 48f0216b0SAngus Ainslie (Purism) */ 58f0216b0SAngus Ainslie (Purism) 68f0216b0SAngus Ainslie (Purism)/dts-v1/; 78f0216b0SAngus Ainslie (Purism) 88f0216b0SAngus Ainslie (Purism)#include "dt-bindings/input/input.h" 9d8fa4792SKrzysztof Kozlowski#include <dt-bindings/interrupt-controller/irq.h> 10c504745dSGuido Günther#include <dt-bindings/leds/common.h> 118f0216b0SAngus Ainslie (Purism)#include "dt-bindings/pwm/pwm.h" 128f0216b0SAngus Ainslie (Purism)#include "dt-bindings/usb/pd.h" 138f0216b0SAngus Ainslie (Purism)#include "imx8mq.dtsi" 148f0216b0SAngus Ainslie (Purism) 158f0216b0SAngus Ainslie (Purism)/ { 168f0216b0SAngus Ainslie (Purism) model = "Purism Librem 5"; 178f0216b0SAngus Ainslie (Purism) compatible = "purism,librem5", "fsl,imx8mq"; 18b70bf26aSArnaud Ferraris chassis-type = "handset"; 198f0216b0SAngus Ainslie (Purism) 208f0216b0SAngus Ainslie (Purism) backlight_dsi: backlight-dsi { 218f0216b0SAngus Ainslie (Purism) compatible = "led-backlight"; 228f0216b0SAngus Ainslie (Purism) leds = <&led_backlight>; 23956fdfe7SMartin Kepplinger brightness-levels = <255>; 24956fdfe7SMartin Kepplinger default-brightness-level = <190>; 258f0216b0SAngus Ainslie (Purism) }; 268f0216b0SAngus Ainslie (Purism) 278f0216b0SAngus Ainslie (Purism) pmic_osc: clock-pmic { 288f0216b0SAngus Ainslie (Purism) compatible = "fixed-clock"; 298f0216b0SAngus Ainslie (Purism) #clock-cells = <0>; 308f0216b0SAngus Ainslie (Purism) clock-frequency = <32768>; 318f0216b0SAngus Ainslie (Purism) clock-output-names = "pmic_osc"; 328f0216b0SAngus Ainslie (Purism) }; 338f0216b0SAngus Ainslie (Purism) 348f0216b0SAngus Ainslie (Purism) chosen { 358f0216b0SAngus Ainslie (Purism) stdout-path = &uart1; 368f0216b0SAngus Ainslie (Purism) }; 378f0216b0SAngus Ainslie (Purism) 388f0216b0SAngus Ainslie (Purism) gpio-keys { 398f0216b0SAngus Ainslie (Purism) compatible = "gpio-keys"; 408f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 418f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_keys>; 428f0216b0SAngus Ainslie (Purism) 43b803d15eSKrzysztof Kozlowski key-vol-down { 448f0216b0SAngus Ainslie (Purism) label = "VOL_DOWN"; 458f0216b0SAngus Ainslie (Purism) gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; 468f0216b0SAngus Ainslie (Purism) linux,code = <KEY_VOLUMEDOWN>; 47fea0fd09SSebastian Krzyszkowiak debounce-interval = <50>; 48a3b2fc4fSMartin Kepplinger wakeup-source; 498f0216b0SAngus Ainslie (Purism) }; 508f0216b0SAngus Ainslie (Purism) 51b803d15eSKrzysztof Kozlowski key-vol-up { 528f0216b0SAngus Ainslie (Purism) label = "VOL_UP"; 538f0216b0SAngus Ainslie (Purism) gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; 548f0216b0SAngus Ainslie (Purism) linux,code = <KEY_VOLUMEUP>; 55fea0fd09SSebastian Krzyszkowiak debounce-interval = <50>; 56a3b2fc4fSMartin Kepplinger wakeup-source; 578f0216b0SAngus Ainslie (Purism) }; 588f0216b0SAngus Ainslie (Purism) }; 598f0216b0SAngus Ainslie (Purism) 60c504745dSGuido Günther led-controller { 6132a75cb5SMartin Kepplinger compatible = "pwm-leds-multicolor"; 6232a75cb5SMartin Kepplinger 6332a75cb5SMartin Kepplinger multi-led { 6432a75cb5SMartin Kepplinger color = <LED_COLOR_ID_RGB>; 6532a75cb5SMartin Kepplinger function = LED_FUNCTION_STATUS; 6632a75cb5SMartin Kepplinger max-brightness = <248>; 67c504745dSGuido Günther 68c504745dSGuido Günther led-0 { 69c504745dSGuido Günther color = <LED_COLOR_ID_BLUE>; 70c504745dSGuido Günther pwms = <&pwm2 0 50000 0>; 71c504745dSGuido Günther }; 72c504745dSGuido Günther 73c504745dSGuido Günther led-1 { 74c504745dSGuido Günther color = <LED_COLOR_ID_GREEN>; 75c504745dSGuido Günther pwms = <&pwm4 0 50000 0>; 76c504745dSGuido Günther }; 77c504745dSGuido Günther 78c504745dSGuido Günther led-2 { 79c504745dSGuido Günther color = <LED_COLOR_ID_RED>; 80c504745dSGuido Günther pwms = <&pwm3 0 50000 0>; 81c504745dSGuido Günther }; 82c504745dSGuido Günther }; 8332a75cb5SMartin Kepplinger }; 84c504745dSGuido Günther 858f0216b0SAngus Ainslie (Purism) reg_aud_1v8: regulator-audio-1v8 { 868f0216b0SAngus Ainslie (Purism) compatible = "regulator-fixed"; 878f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 888f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_audiopwr>; 89969fe911SMartin Kepplinger regulator-name = "AUD_1V8"; 908f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <1800000>; 918f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <1800000>; 928f0216b0SAngus Ainslie (Purism) gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>; 938f0216b0SAngus Ainslie (Purism) enable-active-high; 94238f9188SMartin Kepplinger regulator-always-on; 958f0216b0SAngus Ainslie (Purism) }; 968f0216b0SAngus Ainslie (Purism) 975d24b901SSebastian Krzyszkowiak reg_mic_2v4: regulator-mic-2v4 { 985d24b901SSebastian Krzyszkowiak compatible = "regulator-fixed"; 995d24b901SSebastian Krzyszkowiak regulator-name = "MIC_2V4"; 1005d24b901SSebastian Krzyszkowiak regulator-min-microvolt = <2400000>; 1015d24b901SSebastian Krzyszkowiak regulator-max-microvolt = <2400000>; 1025d24b901SSebastian Krzyszkowiak vin-supply = <®_aud_1v8>; 1035d24b901SSebastian Krzyszkowiak }; 1045d24b901SSebastian Krzyszkowiak 1051019b783SMartin Kepplinger /* 1061019b783SMartin Kepplinger * the pinctrl for reg_csi_1v8 and reg_vcam_1v8 is added to the PMIC 1071019b783SMartin Kepplinger * since we can't have it twice in the 2 different regulator nodes. 1081019b783SMartin Kepplinger */ 1091019b783SMartin Kepplinger reg_csi_1v8: regulator-csi-1v8 { 1101019b783SMartin Kepplinger compatible = "regulator-fixed"; 1111019b783SMartin Kepplinger regulator-name = "CAMERA_VDDIO_1V8"; 1121019b783SMartin Kepplinger regulator-min-microvolt = <1800000>; 1131019b783SMartin Kepplinger regulator-max-microvolt = <1800000>; 1141019b783SMartin Kepplinger vin-supply = <®_vdd_3v3>; 1151019b783SMartin Kepplinger gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; 1161019b783SMartin Kepplinger enable-active-high; 1171019b783SMartin Kepplinger }; 1181019b783SMartin Kepplinger 1191019b783SMartin Kepplinger /* controlled by the CAMERA_POWER_KEY HKS */ 1201019b783SMartin Kepplinger reg_vcam_1v2: regulator-vcam-1v2 { 1211019b783SMartin Kepplinger compatible = "regulator-fixed"; 1221019b783SMartin Kepplinger regulator-name = "CAMERA_VDDD_1V2"; 1231019b783SMartin Kepplinger regulator-min-microvolt = <1200000>; 1241019b783SMartin Kepplinger regulator-max-microvolt = <1200000>; 1251019b783SMartin Kepplinger vin-supply = <®_vdd_1v8>; 1261019b783SMartin Kepplinger enable-active-high; 1271019b783SMartin Kepplinger }; 1281019b783SMartin Kepplinger 1291019b783SMartin Kepplinger reg_vcam_2v8: regulator-vcam-2v8 { 1301019b783SMartin Kepplinger compatible = "regulator-fixed"; 1311019b783SMartin Kepplinger regulator-name = "CAMERA_VDDA_2V8"; 1321019b783SMartin Kepplinger regulator-min-microvolt = <2800000>; 1331019b783SMartin Kepplinger regulator-max-microvolt = <2800000>; 1341019b783SMartin Kepplinger vin-supply = <®_vdd_3v3>; 1351019b783SMartin Kepplinger gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; 1361019b783SMartin Kepplinger enable-active-high; 1371019b783SMartin Kepplinger }; 1381019b783SMartin Kepplinger 1398f0216b0SAngus Ainslie (Purism) reg_gnss: regulator-gnss { 1408f0216b0SAngus Ainslie (Purism) compatible = "regulator-fixed"; 1418f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 1428f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_gnsspwr>; 1438f0216b0SAngus Ainslie (Purism) regulator-name = "GNSS"; 1448f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <3300000>; 1458f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <3300000>; 1468f0216b0SAngus Ainslie (Purism) gpio = <&gpio3 12 GPIO_ACTIVE_HIGH>; 1478f0216b0SAngus Ainslie (Purism) enable-active-high; 1488f0216b0SAngus Ainslie (Purism) }; 1498f0216b0SAngus Ainslie (Purism) 1508f0216b0SAngus Ainslie (Purism) reg_hub: regulator-hub { 1518f0216b0SAngus Ainslie (Purism) compatible = "regulator-fixed"; 1528f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 1538f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_hub_pwr>; 1548f0216b0SAngus Ainslie (Purism) regulator-name = "HUB"; 1558f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <3300000>; 1568f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <3300000>; 1578f0216b0SAngus Ainslie (Purism) gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; 1588f0216b0SAngus Ainslie (Purism) enable-active-high; 1598f0216b0SAngus Ainslie (Purism) }; 1608f0216b0SAngus Ainslie (Purism) 1617127e3b5SGuido Günther reg_lcd_1v8: regulator-lcd-1v8 { 1627127e3b5SGuido Günther compatible = "regulator-fixed"; 1637127e3b5SGuido Günther pinctrl-names = "default"; 1647127e3b5SGuido Günther pinctrl-0 = <&pinctrl_dsien>; 1657127e3b5SGuido Günther regulator-name = "LCD_1V8"; 1667127e3b5SGuido Günther regulator-min-microvolt = <1800000>; 1677127e3b5SGuido Günther regulator-max-microvolt = <1800000>; 1687127e3b5SGuido Günther vin-supply = <®_vdd_1v8>; 1697127e3b5SGuido Günther gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; 1707127e3b5SGuido Günther enable-active-high; 1717127e3b5SGuido Günther /* Otherwise i2c3 is not functional */ 1727127e3b5SGuido Günther regulator-always-on; 1737127e3b5SGuido Günther }; 1747127e3b5SGuido Günther 1758f0216b0SAngus Ainslie (Purism) reg_lcd_3v4: regulator-lcd-3v4 { 1768f0216b0SAngus Ainslie (Purism) compatible = "regulator-fixed"; 1778f0216b0SAngus Ainslie (Purism) regulator-name = "LCD_3V4"; 1788f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 1798f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_dsibiasen>; 1808f0216b0SAngus Ainslie (Purism) vin-supply = <®_vsys_3v4>; 1818f0216b0SAngus Ainslie (Purism) gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>; 1828f0216b0SAngus Ainslie (Purism) enable-active-high; 1838f0216b0SAngus Ainslie (Purism) }; 1848f0216b0SAngus Ainslie (Purism) 1858f0216b0SAngus Ainslie (Purism) reg_vdd_sen: regulator-vdd-sen { 1868f0216b0SAngus Ainslie (Purism) compatible = "regulator-fixed"; 1878f0216b0SAngus Ainslie (Purism) regulator-name = "VDD_SEN"; 1888f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <3300000>; 1898f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <3300000>; 1908f0216b0SAngus Ainslie (Purism) }; 1918f0216b0SAngus Ainslie (Purism) 19284b1f57dSMartin Kepplinger reg_vdd_1v8: regulator-vdd-1v8 { 19384b1f57dSMartin Kepplinger compatible = "regulator-fixed"; 19484b1f57dSMartin Kepplinger regulator-name = "VDD_1V8"; 19584b1f57dSMartin Kepplinger regulator-min-microvolt = <1800000>; 19684b1f57dSMartin Kepplinger regulator-max-microvolt = <1800000>; 19784b1f57dSMartin Kepplinger vin-supply = <&buck7_reg>; 19884b1f57dSMartin Kepplinger }; 19984b1f57dSMartin Kepplinger 2008f0216b0SAngus Ainslie (Purism) reg_vdd_3v3: regulator-vdd-3v3 { 2018f0216b0SAngus Ainslie (Purism) compatible = "regulator-fixed"; 2028f0216b0SAngus Ainslie (Purism) regulator-name = "VDD_3V3"; 2038f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <3300000>; 2048f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <3300000>; 2058f0216b0SAngus Ainslie (Purism) }; 2068f0216b0SAngus Ainslie (Purism) 2078f0216b0SAngus Ainslie (Purism) reg_vsys_3v4: regulator-vsys-3v4 { 2088f0216b0SAngus Ainslie (Purism) compatible = "regulator-fixed"; 2098f0216b0SAngus Ainslie (Purism) regulator-name = "VSYS_3V4"; 2108f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <3400000>; 2118f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <3400000>; 2128f0216b0SAngus Ainslie (Purism) regulator-always-on; 2138f0216b0SAngus Ainslie (Purism) }; 2148f0216b0SAngus Ainslie (Purism) 2158f0216b0SAngus Ainslie (Purism) reg_wifi_3v3: regulator-wifi-3v3 { 2168f0216b0SAngus Ainslie (Purism) compatible = "regulator-fixed"; 217924025e5SGuido Günther pinctrl-names = "default"; 218924025e5SGuido Günther pinctrl-0 = <&pinctrl_wifi_pwr>; 2198f0216b0SAngus Ainslie (Purism) regulator-name = "3V3_WIFI"; 2208f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <3300000>; 2218f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <3300000>; 222924025e5SGuido Günther gpio = <&gpio3 10 GPIO_ACTIVE_HIGH>; 223924025e5SGuido Günther enable-active-high; 224924025e5SGuido Günther vin-supply = <®_vdd_3v3>; 2258f0216b0SAngus Ainslie (Purism) }; 2268f0216b0SAngus Ainslie (Purism) 2278f0216b0SAngus Ainslie (Purism) sound { 2288f0216b0SAngus Ainslie (Purism) compatible = "simple-audio-card"; 2298f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 2308f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_hp>; 2318f0216b0SAngus Ainslie (Purism) simple-audio-card,name = "Librem 5"; 2328f0216b0SAngus Ainslie (Purism) simple-audio-card,format = "i2s"; 2338f0216b0SAngus Ainslie (Purism) simple-audio-card,widgets = 2348f0216b0SAngus Ainslie (Purism) "Headphone", "Headphones", 2358f0216b0SAngus Ainslie (Purism) "Microphone", "Headset Mic", 2368f0216b0SAngus Ainslie (Purism) "Microphone", "Digital Mic", 2378f0216b0SAngus Ainslie (Purism) "Speaker", "Speaker"; 2388f0216b0SAngus Ainslie (Purism) simple-audio-card,routing = 2398f0216b0SAngus Ainslie (Purism) "Headphones", "HPOUTL", 2408f0216b0SAngus Ainslie (Purism) "Headphones", "HPOUTR", 2418f0216b0SAngus Ainslie (Purism) "Speaker", "SPKOUTL", 2428f0216b0SAngus Ainslie (Purism) "Speaker", "SPKOUTR", 2438f0216b0SAngus Ainslie (Purism) "Headset Mic", "MICBIAS", 2448f0216b0SAngus Ainslie (Purism) "IN3R", "Headset Mic", 2458f0216b0SAngus Ainslie (Purism) "DMICDAT", "Digital Mic"; 2468f0216b0SAngus Ainslie (Purism) simple-audio-card,hp-det-gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>; 2478f0216b0SAngus Ainslie (Purism) 2488f0216b0SAngus Ainslie (Purism) simple-audio-card,cpu { 2498f0216b0SAngus Ainslie (Purism) sound-dai = <&sai2>; 2508f0216b0SAngus Ainslie (Purism) }; 2518f0216b0SAngus Ainslie (Purism) 2528f0216b0SAngus Ainslie (Purism) simple-audio-card,codec { 2538f0216b0SAngus Ainslie (Purism) sound-dai = <&codec>; 2548f0216b0SAngus Ainslie (Purism) clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>; 2558f0216b0SAngus Ainslie (Purism) frame-master; 2568f0216b0SAngus Ainslie (Purism) bitclock-master; 2578f0216b0SAngus Ainslie (Purism) }; 2588f0216b0SAngus Ainslie (Purism) }; 2598f0216b0SAngus Ainslie (Purism) 2608f0216b0SAngus Ainslie (Purism) sound-wwan { 2618f0216b0SAngus Ainslie (Purism) compatible = "simple-audio-card"; 2628f0216b0SAngus Ainslie (Purism) simple-audio-card,name = "Modem"; 2638f0216b0SAngus Ainslie (Purism) simple-audio-card,format = "i2s"; 2648f0216b0SAngus Ainslie (Purism) 2658f0216b0SAngus Ainslie (Purism) simple-audio-card,cpu { 2668f0216b0SAngus Ainslie (Purism) sound-dai = <&sai6>; 2678f0216b0SAngus Ainslie (Purism) frame-inversion; 2688f0216b0SAngus Ainslie (Purism) }; 2698f0216b0SAngus Ainslie (Purism) 2708f0216b0SAngus Ainslie (Purism) simple-audio-card,codec { 2718f0216b0SAngus Ainslie (Purism) sound-dai = <&bm818_codec>; 2728f0216b0SAngus Ainslie (Purism) frame-master; 2738f0216b0SAngus Ainslie (Purism) bitclock-master; 2748f0216b0SAngus Ainslie (Purism) }; 2758f0216b0SAngus Ainslie (Purism) }; 2768f0216b0SAngus Ainslie (Purism) 2772344af0dSAngus Ainslie usdhc2_pwrseq: pwrseq { 2782344af0dSAngus Ainslie pinctrl-names = "default"; 2792344af0dSAngus Ainslie pinctrl-0 = <&pinctrl_bt>, <&pinctrl_wifi_disable>; 2802344af0dSAngus Ainslie compatible = "mmc-pwrseq-simple"; 2812344af0dSAngus Ainslie reset-gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>, 2822344af0dSAngus Ainslie <&gpio4 29 GPIO_ACTIVE_HIGH>; 2832344af0dSAngus Ainslie }; 2842344af0dSAngus Ainslie 2858f0216b0SAngus Ainslie (Purism) bm818_codec: sound-wwan-codec { 2868f0216b0SAngus Ainslie (Purism) compatible = "broadmobi,bm818", "option,gtm601"; 2878f0216b0SAngus Ainslie (Purism) #sound-dai-cells = <0>; 2888f0216b0SAngus Ainslie (Purism) }; 2898f0216b0SAngus Ainslie (Purism) 2908f0216b0SAngus Ainslie (Purism) vibrator { 2918f0216b0SAngus Ainslie (Purism) compatible = "pwm-vibrator"; 2928f0216b0SAngus Ainslie (Purism) pwms = <&pwm1 0 1000000000 0>; 2938f0216b0SAngus Ainslie (Purism) pwm-names = "enable"; 2948f0216b0SAngus Ainslie (Purism) vcc-supply = <®_vdd_3v3>; 2958f0216b0SAngus Ainslie (Purism) }; 2968f0216b0SAngus Ainslie (Purism)}; 2978f0216b0SAngus Ainslie (Purism) 2988f0216b0SAngus Ainslie (Purism)&A53_0 { 2998f0216b0SAngus Ainslie (Purism) cpu-supply = <&buck2_reg>; 3008f0216b0SAngus Ainslie (Purism)}; 3018f0216b0SAngus Ainslie (Purism) 3028f0216b0SAngus Ainslie (Purism)&A53_1 { 3038f0216b0SAngus Ainslie (Purism) cpu-supply = <&buck2_reg>; 3048f0216b0SAngus Ainslie (Purism)}; 3058f0216b0SAngus Ainslie (Purism) 3068f0216b0SAngus Ainslie (Purism)&A53_2 { 3078f0216b0SAngus Ainslie (Purism) cpu-supply = <&buck2_reg>; 3088f0216b0SAngus Ainslie (Purism)}; 3098f0216b0SAngus Ainslie (Purism) 3108f0216b0SAngus Ainslie (Purism)&A53_3 { 3118f0216b0SAngus Ainslie (Purism) cpu-supply = <&buck2_reg>; 3128f0216b0SAngus Ainslie (Purism)}; 3138f0216b0SAngus Ainslie (Purism) 314fed76035SMartin Kepplinger&csi1 { 315fed76035SMartin Kepplinger status = "okay"; 316fed76035SMartin Kepplinger}; 317fed76035SMartin Kepplinger 3188f0216b0SAngus Ainslie (Purism)&ddrc { 3198f0216b0SAngus Ainslie (Purism) operating-points-v2 = <&ddrc_opp_table>; 3200bcc4bf0SLucas Stach status = "okay"; 3218f0216b0SAngus Ainslie (Purism) 32291db1670SKrzysztof Kozlowski ddrc_opp_table: opp-table { 3238f0216b0SAngus Ainslie (Purism) compatible = "operating-points-v2"; 3248f0216b0SAngus Ainslie (Purism) 3250c068a36SMarek Vasut opp-25000000 { 3268f0216b0SAngus Ainslie (Purism) opp-hz = /bits/ 64 <25000000>; 3278f0216b0SAngus Ainslie (Purism) }; 3288f0216b0SAngus Ainslie (Purism) 3290c068a36SMarek Vasut opp-100000000 { 3308f0216b0SAngus Ainslie (Purism) opp-hz = /bits/ 64 <100000000>; 3318f0216b0SAngus Ainslie (Purism) }; 3328f0216b0SAngus Ainslie (Purism) 33362669328SSebastian Krzyszkowiak opp-166000000 { 33462669328SSebastian Krzyszkowiak opp-hz = /bits/ 64 <166935483>; 33562669328SSebastian Krzyszkowiak }; 33662669328SSebastian Krzyszkowiak 3370c068a36SMarek Vasut opp-800000000 { 3388f0216b0SAngus Ainslie (Purism) opp-hz = /bits/ 64 <800000000>; 3398f0216b0SAngus Ainslie (Purism) }; 3408f0216b0SAngus Ainslie (Purism) }; 3418f0216b0SAngus Ainslie (Purism)}; 3428f0216b0SAngus Ainslie (Purism) 3438f0216b0SAngus Ainslie (Purism)&dphy { 3448f0216b0SAngus Ainslie (Purism) status = "okay"; 3458f0216b0SAngus Ainslie (Purism)}; 3468f0216b0SAngus Ainslie (Purism) 3478f0216b0SAngus Ainslie (Purism)&ecspi1 { 3488f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 3498f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_ecspi1>; 3508f0216b0SAngus Ainslie (Purism) cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; 3518f0216b0SAngus Ainslie (Purism) #address-cells = <1>; 3528f0216b0SAngus Ainslie (Purism) #size-cells = <0>; 3538f0216b0SAngus Ainslie (Purism) status = "okay"; 3548f0216b0SAngus Ainslie (Purism) 3558f0216b0SAngus Ainslie (Purism) nor_flash: flash@0 { 3568f0216b0SAngus Ainslie (Purism) compatible = "jedec,spi-nor"; 3578f0216b0SAngus Ainslie (Purism) reg = <0>; 3588f0216b0SAngus Ainslie (Purism) spi-max-frequency = <1000000>; 3593a0eac4aSAngus Ainslie #address-cells = <1>; 3603a0eac4aSAngus Ainslie #size-cells = <1>; 3613a0eac4aSAngus Ainslie 3623a0eac4aSAngus Ainslie partition@0 { 3633a0eac4aSAngus Ainslie label = "protected0"; 3643a0eac4aSAngus Ainslie reg = <0x0 0x30000>; 3653a0eac4aSAngus Ainslie read-only; 3663a0eac4aSAngus Ainslie }; 3673a0eac4aSAngus Ainslie 3683a0eac4aSAngus Ainslie partition@30000 { 369c3e9d454SAngus Ainslie label = "firmware"; 370c3e9d454SAngus Ainslie reg = <0x30000 0x1d0000>; 3713a0eac4aSAngus Ainslie read-only; 3723a0eac4aSAngus Ainslie }; 3738f0216b0SAngus Ainslie (Purism) }; 3748f0216b0SAngus Ainslie (Purism)}; 3758f0216b0SAngus Ainslie (Purism) 3768f0216b0SAngus Ainslie (Purism)&gpio1 { 3778f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 3788f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_pmic_5v>; 3798f0216b0SAngus Ainslie (Purism) 380dfedd2acSKrzysztof Kozlowski pmic-5v-hog { 3818f0216b0SAngus Ainslie (Purism) gpio-hog; 3827fffadcfSGuido Günther gpios = <1 GPIO_ACTIVE_HIGH>; 3838f0216b0SAngus Ainslie (Purism) input; 3847fffadcfSGuido Günther lane-mapping = "pmic-5v"; 3858f0216b0SAngus Ainslie (Purism) }; 3868f0216b0SAngus Ainslie (Purism)}; 3878f0216b0SAngus Ainslie (Purism) 3888f0216b0SAngus Ainslie (Purism)&iomuxc { 3890a838116SMartin Kepplinger pinctrl-names = "default"; 3900a838116SMartin Kepplinger pinctrl-0 = <&pinctrl_hog>; 3910a838116SMartin Kepplinger 3920a838116SMartin Kepplinger pinctrl_hog: hoggrp { 3930a838116SMartin Kepplinger fsl,pins = < 3940a838116SMartin Kepplinger /* CLKO2 for cameras on both CSI1 and CSI2 */ 3950a838116SMartin Kepplinger MX8MQ_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2 0x1f 3960a838116SMartin Kepplinger >; 3970a838116SMartin Kepplinger }; 3980a838116SMartin Kepplinger 3998f0216b0SAngus Ainslie (Purism) pinctrl_audiopwr: audiopwrgrp { 4008f0216b0SAngus Ainslie (Purism) fsl,pins = < 4018f0216b0SAngus Ainslie (Purism) /* AUDIO_POWER_EN_3V3 */ 4028f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x83 4038f0216b0SAngus Ainslie (Purism) >; 4048f0216b0SAngus Ainslie (Purism) }; 4058f0216b0SAngus Ainslie (Purism) 4068f0216b0SAngus Ainslie (Purism) pinctrl_bl: blgrp { 4078f0216b0SAngus Ainslie (Purism) fsl,pins = < 4088f0216b0SAngus Ainslie (Purism) /* BACKLINGE_EN */ 4098f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_NAND_DQS_GPIO3_IO14 0x83 4108f0216b0SAngus Ainslie (Purism) >; 4118f0216b0SAngus Ainslie (Purism) }; 4128f0216b0SAngus Ainslie (Purism) 4132344af0dSAngus Ainslie pinctrl_bt: btgrp { 4142344af0dSAngus Ainslie fsl,pins = < 4152344af0dSAngus Ainslie /* BT_REG_ON */ 4162344af0dSAngus Ainslie MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x83 4172344af0dSAngus Ainslie >; 4182344af0dSAngus Ainslie }; 4192344af0dSAngus Ainslie 4201019b783SMartin Kepplinger pinctrl_camera_pwr: camerapwrgrp { 4211019b783SMartin Kepplinger fsl,pins = < 4221019b783SMartin Kepplinger /* CAMERA_PWR_EN_3V3 */ 4231019b783SMartin Kepplinger MX8MQ_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x83 4241019b783SMartin Kepplinger >; 4251019b783SMartin Kepplinger }; 4261019b783SMartin Kepplinger 4271019b783SMartin Kepplinger pinctrl_csi1: csi1grp { 4281019b783SMartin Kepplinger fsl,pins = < 4291019b783SMartin Kepplinger /* CSI1_NRST */ 4301019b783SMartin Kepplinger MX8MQ_IOMUXC_ENET_RXC_GPIO1_IO25 0x83 4311019b783SMartin Kepplinger >; 4321019b783SMartin Kepplinger }; 4331019b783SMartin Kepplinger 4348f0216b0SAngus Ainslie (Purism) pinctrl_charger_in: chargeringrp { 4358f0216b0SAngus Ainslie (Purism) fsl,pins = < 4368f0216b0SAngus Ainslie (Purism) /* CHRG_INT */ 437f3dbb291SGuido Günther MX8MQ_IOMUXC_NAND_CE2_B_GPIO3_IO3 0x80 4388f0216b0SAngus Ainslie (Purism) >; 4398f0216b0SAngus Ainslie (Purism) }; 4408f0216b0SAngus Ainslie (Purism) 4418f0216b0SAngus Ainslie (Purism) pinctrl_dsibiasen: dsibiasengrp { 4428f0216b0SAngus Ainslie (Purism) fsl,pins = < 4438f0216b0SAngus Ainslie (Purism) /* DSI_BIAS_EN */ 4448f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_ENET_TD1_GPIO1_IO20 0x83 4458f0216b0SAngus Ainslie (Purism) >; 4468f0216b0SAngus Ainslie (Purism) }; 4478f0216b0SAngus Ainslie (Purism) 4488f0216b0SAngus Ainslie (Purism) pinctrl_dsien: dsiengrp { 4498f0216b0SAngus Ainslie (Purism) fsl,pins = < 4508f0216b0SAngus Ainslie (Purism) /* DSI_EN_3V3 */ 4518f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x83 4528f0216b0SAngus Ainslie (Purism) >; 4538f0216b0SAngus Ainslie (Purism) }; 4548f0216b0SAngus Ainslie (Purism) 455584ea5b1SMartin Kepplinger pinctrl_dsirst: dsirstgrp { 456584ea5b1SMartin Kepplinger fsl,pins = < 457584ea5b1SMartin Kepplinger /* DSI_RST */ 458584ea5b1SMartin Kepplinger MX8MQ_IOMUXC_ENET_RD3_GPIO1_IO29 0x83 459584ea5b1SMartin Kepplinger /* DSI_TE */ 460584ea5b1SMartin Kepplinger MX8MQ_IOMUXC_ENET_RD2_GPIO1_IO28 0x83 461584ea5b1SMartin Kepplinger /* TP_RST */ 462584ea5b1SMartin Kepplinger MX8MQ_IOMUXC_ENET_RX_CTL_GPIO1_IO24 0x83 463584ea5b1SMartin Kepplinger >; 464584ea5b1SMartin Kepplinger }; 465584ea5b1SMartin Kepplinger 4668f0216b0SAngus Ainslie (Purism) pinctrl_ecspi1: ecspigrp { 4678f0216b0SAngus Ainslie (Purism) fsl,pins = < 4688f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x83 4698f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x83 4708f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19 4718f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x83 4728f0216b0SAngus Ainslie (Purism) >; 4738f0216b0SAngus Ainslie (Purism) }; 4748f0216b0SAngus Ainslie (Purism) 4758f0216b0SAngus Ainslie (Purism) pinctrl_gauge: gaugegrp { 4768f0216b0SAngus Ainslie (Purism) fsl,pins = < 4778f0216b0SAngus Ainslie (Purism) /* BAT_LOW */ 4788f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20 0x80 4798f0216b0SAngus Ainslie (Purism) >; 4808f0216b0SAngus Ainslie (Purism) }; 4818f0216b0SAngus Ainslie (Purism) 4828f0216b0SAngus Ainslie (Purism) pinctrl_gnsspwr: gnsspwrgrp { 4838f0216b0SAngus Ainslie (Purism) fsl,pins = < 4848f0216b0SAngus Ainslie (Purism) /* GPS3V3_EN */ 4858f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12 0x83 4868f0216b0SAngus Ainslie (Purism) >; 4878f0216b0SAngus Ainslie (Purism) }; 4888f0216b0SAngus Ainslie (Purism) 4898f0216b0SAngus Ainslie (Purism) pinctrl_haptic: hapticgrp { 4908f0216b0SAngus Ainslie (Purism) fsl,pins = < 4918f0216b0SAngus Ainslie (Purism) /* MOTO */ 4928f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT 0x83 4938f0216b0SAngus Ainslie (Purism) >; 4948f0216b0SAngus Ainslie (Purism) }; 4958f0216b0SAngus Ainslie (Purism) 4968f0216b0SAngus Ainslie (Purism) pinctrl_hp: hpgrp { 4978f0216b0SAngus Ainslie (Purism) fsl,pins = < 4988f0216b0SAngus Ainslie (Purism) /* HEADPHONE_DET_1V8 */ 4998f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9 0x180 5008f0216b0SAngus Ainslie (Purism) >; 5018f0216b0SAngus Ainslie (Purism) }; 5028f0216b0SAngus Ainslie (Purism) 5038f0216b0SAngus Ainslie (Purism) pinctrl_hub_pwr: hubpwrgrp { 5048f0216b0SAngus Ainslie (Purism) fsl,pins = < 5058f0216b0SAngus Ainslie (Purism) /* HUB_PWR_3V3_EN */ 5068f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x83 5078f0216b0SAngus Ainslie (Purism) >; 5088f0216b0SAngus Ainslie (Purism) }; 5098f0216b0SAngus Ainslie (Purism) 5108f0216b0SAngus Ainslie (Purism) pinctrl_i2c1: i2c1grp { 5118f0216b0SAngus Ainslie (Purism) fsl,pins = < 5128f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x40000026 5138f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x40000026 5148f0216b0SAngus Ainslie (Purism) >; 5158f0216b0SAngus Ainslie (Purism) }; 5168f0216b0SAngus Ainslie (Purism) 5178f0216b0SAngus Ainslie (Purism) pinctrl_i2c2: i2c2grp { 5188f0216b0SAngus Ainslie (Purism) fsl,pins = < 5198f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x40000026 5208f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x40000026 5218f0216b0SAngus Ainslie (Purism) >; 5228f0216b0SAngus Ainslie (Purism) }; 5238f0216b0SAngus Ainslie (Purism) 5248f0216b0SAngus Ainslie (Purism) pinctrl_i2c3: i2c3grp { 5258f0216b0SAngus Ainslie (Purism) fsl,pins = < 5268f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x40000026 5278f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x40000026 5288f0216b0SAngus Ainslie (Purism) >; 5298f0216b0SAngus Ainslie (Purism) }; 5308f0216b0SAngus Ainslie (Purism) 5318f0216b0SAngus Ainslie (Purism) pinctrl_i2c4: i2c4grp { 5328f0216b0SAngus Ainslie (Purism) fsl,pins = < 5338f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL 0x40000026 5348f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA 0x40000026 5358f0216b0SAngus Ainslie (Purism) >; 5368f0216b0SAngus Ainslie (Purism) }; 5378f0216b0SAngus Ainslie (Purism) 5388f0216b0SAngus Ainslie (Purism) pinctrl_keys: keysgrp { 5398f0216b0SAngus Ainslie (Purism) fsl,pins = < 5408f0216b0SAngus Ainslie (Purism) /* VOL- */ 5418f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_ENET_MDIO_GPIO1_IO17 0x01C0 5428f0216b0SAngus Ainslie (Purism) /* VOL+ */ 5438f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_ENET_MDC_GPIO1_IO16 0x01C0 5448f0216b0SAngus Ainslie (Purism) >; 5458f0216b0SAngus Ainslie (Purism) }; 5468f0216b0SAngus Ainslie (Purism) 5478f0216b0SAngus Ainslie (Purism) pinctrl_led_b: ledbgrp { 5488f0216b0SAngus Ainslie (Purism) fsl,pins = < 5498f0216b0SAngus Ainslie (Purism) /* LED_B */ 5508f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_GPIO1_IO13_PWM2_OUT 0x06 5518f0216b0SAngus Ainslie (Purism) >; 5528f0216b0SAngus Ainslie (Purism) }; 5538f0216b0SAngus Ainslie (Purism) 5548f0216b0SAngus Ainslie (Purism) pinctrl_led_g: ledggrp { 5558f0216b0SAngus Ainslie (Purism) fsl,pins = < 5568f0216b0SAngus Ainslie (Purism) /* LED_G */ 5578f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SAI3_MCLK_PWM4_OUT 0x06 5588f0216b0SAngus Ainslie (Purism) >; 5598f0216b0SAngus Ainslie (Purism) }; 5608f0216b0SAngus Ainslie (Purism) 5618f0216b0SAngus Ainslie (Purism) pinctrl_led_r: ledrgrp { 5628f0216b0SAngus Ainslie (Purism) fsl,pins = < 5638f0216b0SAngus Ainslie (Purism) /* LED_R */ 5648f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SPDIF_TX_PWM3_OUT 0x06 5658f0216b0SAngus Ainslie (Purism) >; 5668f0216b0SAngus Ainslie (Purism) }; 5678f0216b0SAngus Ainslie (Purism) 5688f0216b0SAngus Ainslie (Purism) pinctrl_mag: maggrp { 5698f0216b0SAngus Ainslie (Purism) fsl,pins = < 5708f0216b0SAngus Ainslie (Purism) /* INT_MAG */ 5718f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x80 5728f0216b0SAngus Ainslie (Purism) >; 5738f0216b0SAngus Ainslie (Purism) }; 5748f0216b0SAngus Ainslie (Purism) 5758f0216b0SAngus Ainslie (Purism) pinctrl_pmic: pmicgrp { 5768f0216b0SAngus Ainslie (Purism) fsl,pins = < 5778f0216b0SAngus Ainslie (Purism) /* PMIC_NINT */ 5788f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x80 5798f0216b0SAngus Ainslie (Purism) >; 5808f0216b0SAngus Ainslie (Purism) }; 5818f0216b0SAngus Ainslie (Purism) 5828f0216b0SAngus Ainslie (Purism) pinctrl_pmic_5v: pmic5vgrp { 5838f0216b0SAngus Ainslie (Purism) fsl,pins = < 5848f0216b0SAngus Ainslie (Purism) /* PMIC_5V */ 5858f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x80 5868f0216b0SAngus Ainslie (Purism) >; 5878f0216b0SAngus Ainslie (Purism) }; 5888f0216b0SAngus Ainslie (Purism) 5898f0216b0SAngus Ainslie (Purism) pinctrl_prox: proxgrp { 5908f0216b0SAngus Ainslie (Purism) fsl,pins = < 5918f0216b0SAngus Ainslie (Purism) /* INT_LIGHT */ 5928f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7 0x80 5938f0216b0SAngus Ainslie (Purism) >; 5948f0216b0SAngus Ainslie (Purism) }; 5958f0216b0SAngus Ainslie (Purism) 5968f0216b0SAngus Ainslie (Purism) pinctrl_rtc: rtcgrp { 5978f0216b0SAngus Ainslie (Purism) fsl,pins = < 5988f0216b0SAngus Ainslie (Purism) /* RTC_INT */ 5998f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x80 6008f0216b0SAngus Ainslie (Purism) >; 6018f0216b0SAngus Ainslie (Purism) }; 6028f0216b0SAngus Ainslie (Purism) 6038f0216b0SAngus Ainslie (Purism) pinctrl_sai2: sai2grp { 6048f0216b0SAngus Ainslie (Purism) fsl,pins = < 6058f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6 6068f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6 6078f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK 0xd6 6088f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6 6098f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6 6108f0216b0SAngus Ainslie (Purism) >; 6118f0216b0SAngus Ainslie (Purism) }; 6128f0216b0SAngus Ainslie (Purism) 6138f0216b0SAngus Ainslie (Purism) pinctrl_sai6: sai6grp { 6148f0216b0SAngus Ainslie (Purism) fsl,pins = < 6158f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0 0xd6 6168f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC 0xd6 6178f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK 0xd6 6188f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0 0xd6 6198f0216b0SAngus Ainslie (Purism) >; 6208f0216b0SAngus Ainslie (Purism) }; 6218f0216b0SAngus Ainslie (Purism) 6228f0216b0SAngus Ainslie (Purism) pinctrl_tcpc: tcpcgrp { 6238f0216b0SAngus Ainslie (Purism) fsl,pins = < 6248f0216b0SAngus Ainslie (Purism) /* TCPC_INT */ 6258f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x01C0 6268f0216b0SAngus Ainslie (Purism) >; 6278f0216b0SAngus Ainslie (Purism) }; 6288f0216b0SAngus Ainslie (Purism) 629c003b15bSMartin Kepplinger pinctrl_touch: touchgrp { 630c003b15bSMartin Kepplinger fsl,pins = < 631c003b15bSMartin Kepplinger /* TP_INT */ 632c003b15bSMartin Kepplinger MX8MQ_IOMUXC_ENET_RD1_GPIO1_IO27 0x80 633c003b15bSMartin Kepplinger >; 634c003b15bSMartin Kepplinger }; 635c003b15bSMartin Kepplinger 6368f0216b0SAngus Ainslie (Purism) pinctrl_typec: typecgrp { 6378f0216b0SAngus Ainslie (Purism) fsl,pins = < 6388f0216b0SAngus Ainslie (Purism) /* TYPEC_MUX_EN */ 6398f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x83 6408f0216b0SAngus Ainslie (Purism) >; 6418f0216b0SAngus Ainslie (Purism) }; 6428f0216b0SAngus Ainslie (Purism) 6438f0216b0SAngus Ainslie (Purism) pinctrl_uart1: uart1grp { 6448f0216b0SAngus Ainslie (Purism) fsl,pins = < 6458f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49 6468f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49 6478f0216b0SAngus Ainslie (Purism) >; 6488f0216b0SAngus Ainslie (Purism) }; 6498f0216b0SAngus Ainslie (Purism) 6508f0216b0SAngus Ainslie (Purism) pinctrl_uart2: uart2grp { 6518f0216b0SAngus Ainslie (Purism) fsl,pins = < 6528f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x49 6538f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x49 6548f0216b0SAngus Ainslie (Purism) >; 6558f0216b0SAngus Ainslie (Purism) }; 6568f0216b0SAngus Ainslie (Purism) 6578f0216b0SAngus Ainslie (Purism) pinctrl_uart3: uart3grp { 6588f0216b0SAngus Ainslie (Purism) fsl,pins = < 6598f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49 6608f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49 6618f0216b0SAngus Ainslie (Purism) >; 6628f0216b0SAngus Ainslie (Purism) }; 6638f0216b0SAngus Ainslie (Purism) 6648f0216b0SAngus Ainslie (Purism) pinctrl_uart4: uart4grp { 6658f0216b0SAngus Ainslie (Purism) fsl,pins = < 6668f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x49 6678f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x49 6688f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x49 6698f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x49 6708f0216b0SAngus Ainslie (Purism) >; 6718f0216b0SAngus Ainslie (Purism) }; 6728f0216b0SAngus Ainslie (Purism) 6738f0216b0SAngus Ainslie (Purism) pinctrl_usdhc1: usdhc1grp { 6748f0216b0SAngus Ainslie (Purism) fsl,pins = < 6758f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83 6768f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3 6778f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3 6788f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3 6798f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3 6808f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3 6818f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3 6828f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3 6838f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3 6848f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3 6858f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x83 6868f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 6878f0216b0SAngus Ainslie (Purism) >; 6888f0216b0SAngus Ainslie (Purism) }; 6898f0216b0SAngus Ainslie (Purism) 69072783d65SPeng Fan pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { 6918f0216b0SAngus Ainslie (Purism) fsl,pins = < 6928f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d 6938f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd 6948f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xcd 6958f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xcd 6968f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xcd 6978f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xcd 6988f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xcd 6998f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xcd 7008f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xcd 7018f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xcd 7028f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x8d 7038f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 7048f0216b0SAngus Ainslie (Purism) >; 7058f0216b0SAngus Ainslie (Purism) }; 7068f0216b0SAngus Ainslie (Purism) 70772783d65SPeng Fan pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { 7088f0216b0SAngus Ainslie (Purism) fsl,pins = < 7098f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f 7108f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf 7118f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xdf 7128f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xdf 7138f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xdf 7148f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xdf 7158f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xdf 7168f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xdf 7178f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xdf 7188f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xdf 7198f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x9f 7208f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 7218f0216b0SAngus Ainslie (Purism) >; 7228f0216b0SAngus Ainslie (Purism) }; 7238f0216b0SAngus Ainslie (Purism) 7248f0216b0SAngus Ainslie (Purism) pinctrl_usdhc2: usdhc2grp { 7258f0216b0SAngus Ainslie (Purism) fsl,pins = < 7268f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80 7278f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83 7288f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3 7298f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3 7308f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3 7318f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3 7328f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3 7338f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1 7348f0216b0SAngus Ainslie (Purism) >; 7358f0216b0SAngus Ainslie (Purism) }; 7368f0216b0SAngus Ainslie (Purism) 73772783d65SPeng Fan pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 7388f0216b0SAngus Ainslie (Purism) fsl,pins = < 7398f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80 7408f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x8d 7418f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcd 7428f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcd 7438f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcd 7448f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcd 7458f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcd 7468f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1 7478f0216b0SAngus Ainslie (Purism) >; 7488f0216b0SAngus Ainslie (Purism) }; 7498f0216b0SAngus Ainslie (Purism) 75072783d65SPeng Fan pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 7518f0216b0SAngus Ainslie (Purism) fsl,pins = < 7528f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80 7538f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x9f 7548f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcf 7558f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcf 7568f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcf 7578f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcf 7588f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcf 7598f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1 7608f0216b0SAngus Ainslie (Purism) >; 7618f0216b0SAngus Ainslie (Purism) }; 7628f0216b0SAngus Ainslie (Purism) 7632344af0dSAngus Ainslie pinctrl_wifi_disable: wifidisablegrp { 7642344af0dSAngus Ainslie fsl,pins = < 7652344af0dSAngus Ainslie /* WIFI_REG_ON */ 7662344af0dSAngus Ainslie MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29 0x83 7672344af0dSAngus Ainslie >; 7682344af0dSAngus Ainslie }; 7692344af0dSAngus Ainslie 770924025e5SGuido Günther pinctrl_wifi_pwr: wifipwrgrp { 771924025e5SGuido Günther fsl,pins = < 772924025e5SGuido Günther /* WIFI3V3_EN */ 773924025e5SGuido Günther MX8MQ_IOMUXC_NAND_DATA04_GPIO3_IO10 0x83 774924025e5SGuido Günther >; 775924025e5SGuido Günther }; 776924025e5SGuido Günther 7778f0216b0SAngus Ainslie (Purism) pinctrl_wdog: wdoggrp { 7788f0216b0SAngus Ainslie (Purism) fsl,pins = < 7798f0216b0SAngus Ainslie (Purism) /* nWDOG */ 7808f0216b0SAngus Ainslie (Purism) MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x1f 7818f0216b0SAngus Ainslie (Purism) >; 7828f0216b0SAngus Ainslie (Purism) }; 7838f0216b0SAngus Ainslie (Purism)}; 7848f0216b0SAngus Ainslie (Purism) 7858f0216b0SAngus Ainslie (Purism)&i2c1 { 786ea06362fSSebastian Krzyszkowiak clock-frequency = <384000>; 7878f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 7888f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_i2c1>; 7898f0216b0SAngus Ainslie (Purism) status = "okay"; 7908f0216b0SAngus Ainslie (Purism) 7918f0216b0SAngus Ainslie (Purism) typec_pd: usb-pd@3f { 7928f0216b0SAngus Ainslie (Purism) compatible = "ti,tps6598x"; 7938f0216b0SAngus Ainslie (Purism) reg = <0x3f>; 7948f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 7958f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_typec>, <&pinctrl_tcpc>; 7968f0216b0SAngus Ainslie (Purism) interrupt-parent = <&gpio1>; 7978f0216b0SAngus Ainslie (Purism) interrupts = <10 IRQ_TYPE_LEVEL_LOW>; 798dd429a46SKrzysztof Kozlowski interrupt-names = "irq"; 79974e04a9fSSebastian Krzyszkowiak extcon = <&usb3_phy0>; 80074e04a9fSSebastian Krzyszkowiak wakeup-source; 8018f0216b0SAngus Ainslie (Purism) 8028f0216b0SAngus Ainslie (Purism) connector { 8036ba73ecfSAngus Ainslie compatible = "usb-c-connector"; 8046ba73ecfSAngus Ainslie label = "USB-C"; 8056ba73ecfSAngus Ainslie data-role = "dual"; 8066ba73ecfSAngus Ainslie 8078f0216b0SAngus Ainslie (Purism) ports { 8088f0216b0SAngus Ainslie (Purism) #address-cells = <1>; 8098f0216b0SAngus Ainslie (Purism) #size-cells = <0>; 8108f0216b0SAngus Ainslie (Purism) 8118f0216b0SAngus Ainslie (Purism) port@0 { 8128f0216b0SAngus Ainslie (Purism) reg = <0>; 8138f0216b0SAngus Ainslie (Purism) 8148f0216b0SAngus Ainslie (Purism) usb_con_hs: endpoint { 8158f0216b0SAngus Ainslie (Purism) remote-endpoint = <&typec_hs>; 8168f0216b0SAngus Ainslie (Purism) }; 8178f0216b0SAngus Ainslie (Purism) }; 8188f0216b0SAngus Ainslie (Purism) 8198f0216b0SAngus Ainslie (Purism) port@1 { 8208f0216b0SAngus Ainslie (Purism) reg = <1>; 8218f0216b0SAngus Ainslie (Purism) 8228f0216b0SAngus Ainslie (Purism) usb_con_ss: endpoint { 8238f0216b0SAngus Ainslie (Purism) remote-endpoint = <&typec_ss>; 8248f0216b0SAngus Ainslie (Purism) }; 8258f0216b0SAngus Ainslie (Purism) }; 8268f0216b0SAngus Ainslie (Purism) }; 8278f0216b0SAngus Ainslie (Purism) }; 8288f0216b0SAngus Ainslie (Purism) }; 8298f0216b0SAngus Ainslie (Purism) 8308f0216b0SAngus Ainslie (Purism) pmic: pmic@4b { 8318f0216b0SAngus Ainslie (Purism) compatible = "rohm,bd71837"; 8328f0216b0SAngus Ainslie (Purism) reg = <0x4b>; 8338f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 8341019b783SMartin Kepplinger pinctrl-0 = <&pinctrl_pmic>, <&pinctrl_camera_pwr>; 8358f0216b0SAngus Ainslie (Purism) clocks = <&pmic_osc>; 8362858e62eSPeng Fan #clock-cells = <0>; 8378f0216b0SAngus Ainslie (Purism) clock-names = "osc"; 8388f0216b0SAngus Ainslie (Purism) clock-output-names = "pmic_clk"; 8398f0216b0SAngus Ainslie (Purism) interrupt-parent = <&gpio1>; 840d8fa4792SKrzysztof Kozlowski interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 8418f0216b0SAngus Ainslie (Purism) rohm,reset-snvs-powered; 8428f0216b0SAngus Ainslie (Purism) 8438f0216b0SAngus Ainslie (Purism) regulators { 8448f0216b0SAngus Ainslie (Purism) buck1_reg: BUCK1 { 8450188e994SKrzysztof Kozlowski regulator-name = "buck1"; 8468f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <700000>; 8478f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <1300000>; 848a8bb83c8SMartin Kepplinger regulator-boot-on; 8498f0216b0SAngus Ainslie (Purism) regulator-ramp-delay = <1250>; 850c24a9b69SSebastian Krzyszkowiak rohm,dvs-run-voltage = <880000>; 851c24a9b69SSebastian Krzyszkowiak rohm,dvs-idle-voltage = <820000>; 85294b91e3cSSebastian Krzyszkowiak rohm,dvs-suspend-voltage = <810000>; 8538f0216b0SAngus Ainslie (Purism) regulator-always-on; 8548f0216b0SAngus Ainslie (Purism) }; 8558f0216b0SAngus Ainslie (Purism) 8568f0216b0SAngus Ainslie (Purism) buck2_reg: BUCK2 { 8570188e994SKrzysztof Kozlowski regulator-name = "buck2"; 8588f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <700000>; 8598f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <1300000>; 860a8bb83c8SMartin Kepplinger regulator-boot-on; 8618f0216b0SAngus Ainslie (Purism) regulator-ramp-delay = <1250>; 862c24a9b69SSebastian Krzyszkowiak rohm,dvs-run-voltage = <950000>; 863c24a9b69SSebastian Krzyszkowiak rohm,dvs-idle-voltage = <850000>; 8648f0216b0SAngus Ainslie (Purism) regulator-always-on; 8658f0216b0SAngus Ainslie (Purism) }; 8668f0216b0SAngus Ainslie (Purism) 8678f0216b0SAngus Ainslie (Purism) buck3_reg: BUCK3 { 8680188e994SKrzysztof Kozlowski regulator-name = "buck3"; 8698f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <700000>; 8708f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <1300000>; 871a8bb83c8SMartin Kepplinger regulator-boot-on; 872c24a9b69SSebastian Krzyszkowiak rohm,dvs-run-voltage = <850000>; 8738f0216b0SAngus Ainslie (Purism) }; 8748f0216b0SAngus Ainslie (Purism) 8758f0216b0SAngus Ainslie (Purism) buck4_reg: BUCK4 { 8760188e994SKrzysztof Kozlowski regulator-name = "buck4"; 8778f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <700000>; 8788f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <1300000>; 879c24a9b69SSebastian Krzyszkowiak rohm,dvs-run-voltage = <930000>; 8808f0216b0SAngus Ainslie (Purism) }; 8818f0216b0SAngus Ainslie (Purism) 8828f0216b0SAngus Ainslie (Purism) buck5_reg: BUCK5 { 8830188e994SKrzysztof Kozlowski regulator-name = "buck5"; 8848f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <700000>; 8858f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <1350000>; 886a8bb83c8SMartin Kepplinger regulator-boot-on; 8878f0216b0SAngus Ainslie (Purism) regulator-always-on; 8888f0216b0SAngus Ainslie (Purism) }; 8898f0216b0SAngus Ainslie (Purism) 8908f0216b0SAngus Ainslie (Purism) buck6_reg: BUCK6 { 8910188e994SKrzysztof Kozlowski regulator-name = "buck6"; 8928f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <3000000>; 8938f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <3300000>; 894a8bb83c8SMartin Kepplinger regulator-boot-on; 8958f0216b0SAngus Ainslie (Purism) regulator-always-on; 8968f0216b0SAngus Ainslie (Purism) }; 8978f0216b0SAngus Ainslie (Purism) 8988f0216b0SAngus Ainslie (Purism) buck7_reg: BUCK7 { 8990188e994SKrzysztof Kozlowski regulator-name = "buck7"; 9008f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <1605000>; 9018f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <1995000>; 902a8bb83c8SMartin Kepplinger regulator-boot-on; 9038f0216b0SAngus Ainslie (Purism) regulator-always-on; 9048f0216b0SAngus Ainslie (Purism) }; 9058f0216b0SAngus Ainslie (Purism) 9068f0216b0SAngus Ainslie (Purism) buck8_reg: BUCK8 { 9070188e994SKrzysztof Kozlowski regulator-name = "buck8"; 9088f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <800000>; 9098f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <1400000>; 910a8bb83c8SMartin Kepplinger regulator-boot-on; 9118f0216b0SAngus Ainslie (Purism) regulator-always-on; 9128f0216b0SAngus Ainslie (Purism) }; 9138f0216b0SAngus Ainslie (Purism) 9148f0216b0SAngus Ainslie (Purism) ldo1_reg: LDO1 { 9150188e994SKrzysztof Kozlowski regulator-name = "ldo1"; 9168f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <3000000>; 9178f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <3300000>; 918a8bb83c8SMartin Kepplinger regulator-boot-on; 9198f0216b0SAngus Ainslie (Purism) /* leave on for snvs power button */ 9208f0216b0SAngus Ainslie (Purism) regulator-always-on; 9218f0216b0SAngus Ainslie (Purism) }; 9228f0216b0SAngus Ainslie (Purism) 9238f0216b0SAngus Ainslie (Purism) ldo2_reg: LDO2 { 9240188e994SKrzysztof Kozlowski regulator-name = "ldo2"; 9258f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <900000>; 9268f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <900000>; 927a8bb83c8SMartin Kepplinger regulator-boot-on; 9288f0216b0SAngus Ainslie (Purism) /* leave on for snvs power button */ 9298f0216b0SAngus Ainslie (Purism) regulator-always-on; 9308f0216b0SAngus Ainslie (Purism) }; 9318f0216b0SAngus Ainslie (Purism) 9328f0216b0SAngus Ainslie (Purism) ldo3_reg: LDO3 { 9330188e994SKrzysztof Kozlowski regulator-name = "ldo3"; 9348f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <1800000>; 9358f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <3300000>; 936a8bb83c8SMartin Kepplinger regulator-boot-on; 9378f0216b0SAngus Ainslie (Purism) regulator-always-on; 9388f0216b0SAngus Ainslie (Purism) }; 9398f0216b0SAngus Ainslie (Purism) 9408f0216b0SAngus Ainslie (Purism) ldo4_reg: LDO4 { 9410188e994SKrzysztof Kozlowski regulator-name = "ldo4"; 9428f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <900000>; 9438f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <1800000>; 944a8bb83c8SMartin Kepplinger regulator-boot-on; 9458f0216b0SAngus Ainslie (Purism) regulator-always-on; 9468f0216b0SAngus Ainslie (Purism) }; 9478f0216b0SAngus Ainslie (Purism) 9488f0216b0SAngus Ainslie (Purism) ldo5_reg: LDO5 { 9498f0216b0SAngus Ainslie (Purism) /* VDD_PHY_0V9 - MIPI and HDMI domains */ 9500188e994SKrzysztof Kozlowski regulator-name = "ldo5"; 9518f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <1800000>; 9528f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <3300000>; 9538f0216b0SAngus Ainslie (Purism) regulator-always-on; 9548f0216b0SAngus Ainslie (Purism) }; 9558f0216b0SAngus Ainslie (Purism) 9568f0216b0SAngus Ainslie (Purism) ldo6_reg: LDO6 { 9578f0216b0SAngus Ainslie (Purism) /* VDD_PHY_0V9 - MIPI, HDMI and USB domains */ 9580188e994SKrzysztof Kozlowski regulator-name = "ldo6"; 9598f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <900000>; 9608f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <1800000>; 961a8bb83c8SMartin Kepplinger regulator-boot-on; 9628f0216b0SAngus Ainslie (Purism) regulator-always-on; 9638f0216b0SAngus Ainslie (Purism) }; 9648f0216b0SAngus Ainslie (Purism) 9658f0216b0SAngus Ainslie (Purism) ldo7_reg: LDO7 { 9668f0216b0SAngus Ainslie (Purism) /* VDD_PHY_3V3 - USB domain */ 9670188e994SKrzysztof Kozlowski regulator-name = "ldo7"; 9688f0216b0SAngus Ainslie (Purism) regulator-min-microvolt = <1800000>; 9698f0216b0SAngus Ainslie (Purism) regulator-max-microvolt = <3300000>; 970a8bb83c8SMartin Kepplinger regulator-boot-on; 9718f0216b0SAngus Ainslie (Purism) regulator-always-on; 9728f0216b0SAngus Ainslie (Purism) }; 9738f0216b0SAngus Ainslie (Purism) }; 9748f0216b0SAngus Ainslie (Purism) }; 9758f0216b0SAngus Ainslie (Purism) 9768f0216b0SAngus Ainslie (Purism) rtc@68 { 9778f0216b0SAngus Ainslie (Purism) compatible = "microcrystal,rv4162"; 9788f0216b0SAngus Ainslie (Purism) reg = <0x68>; 9798f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 9808f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_rtc>; 9818f0216b0SAngus Ainslie (Purism) interrupt-parent = <&gpio1>; 9828f0216b0SAngus Ainslie (Purism) interrupts = <9 IRQ_TYPE_LEVEL_LOW>; 9838f0216b0SAngus Ainslie (Purism) }; 9848f0216b0SAngus Ainslie (Purism)}; 9858f0216b0SAngus Ainslie (Purism) 9868f0216b0SAngus Ainslie (Purism)&i2c2 { 987ea06362fSSebastian Krzyszkowiak clock-frequency = <384000>; 9888f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 9898f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_i2c2>; 9908f0216b0SAngus Ainslie (Purism) status = "okay"; 9918f0216b0SAngus Ainslie (Purism) 992a27f81d3SAngus Ainslie magnetometer: magnetometer@1e { 9938f0216b0SAngus Ainslie (Purism) compatible = "st,lsm9ds1-magn"; 9948f0216b0SAngus Ainslie (Purism) reg = <0x1e>; 9958f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 9968f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_mag>; 9978f0216b0SAngus Ainslie (Purism) interrupt-parent = <&gpio3>; 9988f0216b0SAngus Ainslie (Purism) interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; 9998f0216b0SAngus Ainslie (Purism) vdd-supply = <®_vdd_sen>; 10008f0216b0SAngus Ainslie (Purism) vddio-supply = <®_vdd_1v8>; 10018f0216b0SAngus Ainslie (Purism) }; 10028f0216b0SAngus Ainslie (Purism) 10038f0216b0SAngus Ainslie (Purism) regulator@3e { 10048f0216b0SAngus Ainslie (Purism) compatible = "tps65132"; 10058f0216b0SAngus Ainslie (Purism) reg = <0x3e>; 10068f0216b0SAngus Ainslie (Purism) 1007584ea5b1SMartin Kepplinger reg_lcd_avdd: outp { 10088f0216b0SAngus Ainslie (Purism) regulator-name = "LCD_AVDD"; 10098f0216b0SAngus Ainslie (Purism) vin-supply = <®_lcd_3v4>; 10108f0216b0SAngus Ainslie (Purism) }; 10118f0216b0SAngus Ainslie (Purism) 1012584ea5b1SMartin Kepplinger reg_lcd_avee: outn { 10138f0216b0SAngus Ainslie (Purism) regulator-name = "LCD_AVEE"; 10148f0216b0SAngus Ainslie (Purism) vin-supply = <®_lcd_3v4>; 10158f0216b0SAngus Ainslie (Purism) }; 10168f0216b0SAngus Ainslie (Purism) }; 10178f0216b0SAngus Ainslie (Purism) 10188f0216b0SAngus Ainslie (Purism) proximity: prox@60 { 10198f0216b0SAngus Ainslie (Purism) compatible = "vishay,vcnl4040"; 10208f0216b0SAngus Ainslie (Purism) reg = <0x60>; 10218f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 10228f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_prox>; 10238f0216b0SAngus Ainslie (Purism) interrupt-parent = <&gpio3>; 10248f0216b0SAngus Ainslie (Purism) interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 10258f0216b0SAngus Ainslie (Purism) }; 10268f0216b0SAngus Ainslie (Purism) 10278f0216b0SAngus Ainslie (Purism) accel_gyro: accel-gyro@6a { 10288f0216b0SAngus Ainslie (Purism) compatible = "st,lsm9ds1-imu"; 10298f0216b0SAngus Ainslie (Purism) reg = <0x6a>; 10308f0216b0SAngus Ainslie (Purism) vdd-supply = <®_vdd_sen>; 10318f0216b0SAngus Ainslie (Purism) vddio-supply = <®_vdd_1v8>; 10328f0216b0SAngus Ainslie (Purism) }; 10338f0216b0SAngus Ainslie (Purism)}; 10348f0216b0SAngus Ainslie (Purism) 10358f0216b0SAngus Ainslie (Purism)&i2c3 { 1036ea06362fSSebastian Krzyszkowiak clock-frequency = <384000>; 10378f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 10388f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_i2c3>; 10398f0216b0SAngus Ainslie (Purism) status = "okay"; 10408f0216b0SAngus Ainslie (Purism) 10418f0216b0SAngus Ainslie (Purism) codec: audio-codec@1a { 10428f0216b0SAngus Ainslie (Purism) compatible = "wlf,wm8962"; 10438f0216b0SAngus Ainslie (Purism) reg = <0x1a>; 10448f0216b0SAngus Ainslie (Purism) clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>; 10458f0216b0SAngus Ainslie (Purism) assigned-clocks = <&clk IMX8MQ_CLK_SAI2>; 10468f0216b0SAngus Ainslie (Purism) assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>; 10478f0216b0SAngus Ainslie (Purism) assigned-clock-rates = <24576000>; 10488f0216b0SAngus Ainslie (Purism) #sound-dai-cells = <0>; 10498f0216b0SAngus Ainslie (Purism) mic-cfg = <0x200>; 10508f0216b0SAngus Ainslie (Purism) DCVDD-supply = <®_aud_1v8>; 10518f0216b0SAngus Ainslie (Purism) DBVDD-supply = <®_aud_1v8>; 10528f0216b0SAngus Ainslie (Purism) AVDD-supply = <®_aud_1v8>; 10538f0216b0SAngus Ainslie (Purism) CPVDD-supply = <®_aud_1v8>; 10545d24b901SSebastian Krzyszkowiak MICVDD-supply = <®_mic_2v4>; 10558f0216b0SAngus Ainslie (Purism) PLLVDD-supply = <®_aud_1v8>; 10568f0216b0SAngus Ainslie (Purism) SPKVDD1-supply = <®_vsys_3v4>; 10578f0216b0SAngus Ainslie (Purism) SPKVDD2-supply = <®_vsys_3v4>; 10588f0216b0SAngus Ainslie (Purism) gpio-cfg = < 10598f0216b0SAngus Ainslie (Purism) 0x0000 /* n/c */ 10608f0216b0SAngus Ainslie (Purism) 0x0001 /* gpio2, 1: default */ 10618f0216b0SAngus Ainslie (Purism) 0x0013 /* gpio3, 2: dmicclk */ 10628f0216b0SAngus Ainslie (Purism) 0x0000 /* n/c, 3: default */ 10638f0216b0SAngus Ainslie (Purism) 0x8014 /* gpio5, 4: dmic_dat */ 10648f0216b0SAngus Ainslie (Purism) 0x0000 /* gpio6, 5: default */ 10658f0216b0SAngus Ainslie (Purism) >; 10668f0216b0SAngus Ainslie (Purism) }; 10678f0216b0SAngus Ainslie (Purism) 1068fed76035SMartin Kepplinger camera_front: camera@20 { 1069fed76035SMartin Kepplinger compatible = "hynix,hi846"; 1070fed76035SMartin Kepplinger reg = <0x20>; 1071fed76035SMartin Kepplinger pinctrl-names = "default"; 1072fed76035SMartin Kepplinger pinctrl-0 = <&pinctrl_csi1>; 1073fed76035SMartin Kepplinger clocks = <&clk IMX8MQ_CLK_CLKO2>; 1074fed76035SMartin Kepplinger assigned-clocks = <&clk IMX8MQ_CLK_CLKO2>; 1075fed76035SMartin Kepplinger assigned-clock-rates = <25000000>; 1076fed76035SMartin Kepplinger reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; 1077fed76035SMartin Kepplinger vdda-supply = <®_vcam_2v8>; 1078fed76035SMartin Kepplinger vddd-supply = <®_vcam_1v2>; 1079fed76035SMartin Kepplinger vddio-supply = <®_csi_1v8>; 1080fed76035SMartin Kepplinger rotation = <90>; 1081fed76035SMartin Kepplinger orientation = <0>; 1082fed76035SMartin Kepplinger 1083fed76035SMartin Kepplinger port { 1084fed76035SMartin Kepplinger camera1_ep: endpoint { 1085fed76035SMartin Kepplinger data-lanes = <1 2>; 1086fed76035SMartin Kepplinger link-frequencies = /bits/ 64 1087fed76035SMartin Kepplinger <80000000 200000000 300000000>; 1088fed76035SMartin Kepplinger remote-endpoint = <&mipi1_sensor_ep>; 1089fed76035SMartin Kepplinger }; 1090fed76035SMartin Kepplinger }; 1091fed76035SMartin Kepplinger }; 1092fed76035SMartin Kepplinger 10938f0216b0SAngus Ainslie (Purism) backlight@36 { 10948f0216b0SAngus Ainslie (Purism) compatible = "ti,lm36922"; 10958f0216b0SAngus Ainslie (Purism) reg = <0x36>; 10968f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 10978f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_bl>; 10988f0216b0SAngus Ainslie (Purism) #address-cells = <1>; 10998f0216b0SAngus Ainslie (Purism) #size-cells = <0>; 11008f0216b0SAngus Ainslie (Purism) enable-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; 11018f0216b0SAngus Ainslie (Purism) vled-supply = <®_vsys_3v4>; 11028f0216b0SAngus Ainslie (Purism) ti,ovp-microvolt = <25000000>; 11038f0216b0SAngus Ainslie (Purism) 11048f0216b0SAngus Ainslie (Purism) led_backlight: led@0 { 11058f0216b0SAngus Ainslie (Purism) reg = <0>; 11068f0216b0SAngus Ainslie (Purism) label = ":backlight"; 11078f0216b0SAngus Ainslie (Purism) linux,default-trigger = "backlight"; 11088f0216b0SAngus Ainslie (Purism) led-max-microamp = <20000>; 11098f0216b0SAngus Ainslie (Purism) }; 11108f0216b0SAngus Ainslie (Purism) }; 11118f0216b0SAngus Ainslie (Purism) 11128f0216b0SAngus Ainslie (Purism) touchscreen@38 { 11138f0216b0SAngus Ainslie (Purism) compatible = "edt,edt-ft5506"; 11148f0216b0SAngus Ainslie (Purism) reg = <0x38>; 1115c003b15bSMartin Kepplinger pinctrl-names = "default"; 1116c003b15bSMartin Kepplinger pinctrl-0 = <&pinctrl_touch>; 11178f0216b0SAngus Ainslie (Purism) interrupt-parent = <&gpio1>; 11188f0216b0SAngus Ainslie (Purism) interrupts = <27 IRQ_TYPE_EDGE_FALLING>; 11198f0216b0SAngus Ainslie (Purism) touchscreen-size-x = <720>; 11208f0216b0SAngus Ainslie (Purism) touchscreen-size-y = <1440>; 11217127e3b5SGuido Günther vcc-supply = <®_lcd_1v8>; 11228f0216b0SAngus Ainslie (Purism) }; 11238f0216b0SAngus Ainslie (Purism)}; 11248f0216b0SAngus Ainslie (Purism) 11258f0216b0SAngus Ainslie (Purism)&i2c4 { 1126ea06362fSSebastian Krzyszkowiak clock-frequency = <384000>; 11278f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 11288f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_i2c4>; 11298f0216b0SAngus Ainslie (Purism) status = "okay"; 11308f0216b0SAngus Ainslie (Purism) 1131f00df2bdSMartin Kepplinger vcm@c { 1132f00df2bdSMartin Kepplinger compatible = "dongwoon,dw9714"; 1133f00df2bdSMartin Kepplinger reg = <0x0c>; 1134f00df2bdSMartin Kepplinger vcc-supply = <®_csi_1v8>; 1135f00df2bdSMartin Kepplinger }; 1136f00df2bdSMartin Kepplinger 11378f0216b0SAngus Ainslie (Purism) bat: fuel-gauge@36 { 11388f0216b0SAngus Ainslie (Purism) compatible = "maxim,max17055"; 11398f0216b0SAngus Ainslie (Purism) reg = <0x36>; 11408f0216b0SAngus Ainslie (Purism) interrupt-parent = <&gpio3>; 11418f0216b0SAngus Ainslie (Purism) interrupts = <20 IRQ_TYPE_LEVEL_LOW>; 11428f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 11438f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_gauge>; 11446effe295SSebastian Krzyszkowiak power-supplies = <&bq25895>; 11458f0216b0SAngus Ainslie (Purism) maxim,over-heat-temp = <700>; 11468f0216b0SAngus Ainslie (Purism) maxim,over-volt = <4500>; 11478f0216b0SAngus Ainslie (Purism) maxim,rsns-microohm = <5000>; 11488f0216b0SAngus Ainslie (Purism) }; 11498f0216b0SAngus Ainslie (Purism) 11508f0216b0SAngus Ainslie (Purism) bq25895: charger@6a { 11518f0216b0SAngus Ainslie (Purism) compatible = "ti,bq25895", "ti,bq25890"; 11528f0216b0SAngus Ainslie (Purism) reg = <0x6a>; 11538f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 11548f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_charger_in>; 11558f0216b0SAngus Ainslie (Purism) interrupt-parent = <&gpio3>; 11568f0216b0SAngus Ainslie (Purism) interrupts = <3 IRQ_TYPE_EDGE_FALLING>; 11578f0216b0SAngus Ainslie (Purism) phys = <&usb3_phy0>; 115841d208c4SSebastian Krzyszkowiak ti,battery-regulation-voltage = <4208000>; /* uV */ 115941d208c4SSebastian Krzyszkowiak ti,termination-current = <128000>; /* uA */ 116041d208c4SSebastian Krzyszkowiak ti,precharge-current = <128000>; /* uA */ 11618f0216b0SAngus Ainslie (Purism) ti,minimum-sys-voltage = <3700000>; /* uV */ 11628f0216b0SAngus Ainslie (Purism) ti,boost-voltage = <5000000>; /* uV */ 11632bf475ceSGuido Günther ti,boost-max-current = <1500000>; /* uA */ 11648f0216b0SAngus Ainslie (Purism) ti,use-vinmin-threshold = <1>; /* enable VINDPM */ 11658f0216b0SAngus Ainslie (Purism) ti,vinmin-threshold = <3900000>; /* uV */ 11668f0216b0SAngus Ainslie (Purism) monitored-battery = <&bat>; 1167d5edcf2cSGuido Günther power-supplies = <&typec_pd>; 11688f0216b0SAngus Ainslie (Purism) }; 11698f0216b0SAngus Ainslie (Purism)}; 11708f0216b0SAngus Ainslie (Purism) 1171584ea5b1SMartin Kepplinger&lcdif { 1172584ea5b1SMartin Kepplinger status = "okay"; 1173584ea5b1SMartin Kepplinger}; 1174584ea5b1SMartin Kepplinger 1175fed76035SMartin Kepplinger&mipi_csi1 { 117692f87bcbSMartin Kepplinger assigned-clock-rates = <266000000>, <200000000>, <66000000>; 1177fed76035SMartin Kepplinger status = "okay"; 1178fed76035SMartin Kepplinger 1179fed76035SMartin Kepplinger ports { 11805ea62d06SMartin Kepplinger port@0 { 11815ea62d06SMartin Kepplinger reg = <0>; 1182fed76035SMartin Kepplinger 1183fed76035SMartin Kepplinger mipi1_sensor_ep: endpoint { 1184fed76035SMartin Kepplinger remote-endpoint = <&camera1_ep>; 1185fed76035SMartin Kepplinger data-lanes = <1 2>; 1186fed76035SMartin Kepplinger }; 1187fed76035SMartin Kepplinger }; 1188fed76035SMartin Kepplinger }; 1189fed76035SMartin Kepplinger}; 1190fed76035SMartin Kepplinger 1191584ea5b1SMartin Kepplinger&mipi_dsi { 1192584ea5b1SMartin Kepplinger #address-cells = <1>; 1193584ea5b1SMartin Kepplinger #size-cells = <0>; 1194584ea5b1SMartin Kepplinger status = "okay"; 1195584ea5b1SMartin Kepplinger 1196584ea5b1SMartin Kepplinger lcd_panel: panel@0 { 1197584ea5b1SMartin Kepplinger compatible = "mantix,mlaf057we51-x"; 1198584ea5b1SMartin Kepplinger reg = <0>; 1199584ea5b1SMartin Kepplinger pinctrl-names = "default"; 1200584ea5b1SMartin Kepplinger pinctrl-0 = <&pinctrl_dsirst>; 1201584ea5b1SMartin Kepplinger avdd-supply = <®_lcd_avdd>; 1202584ea5b1SMartin Kepplinger avee-supply = <®_lcd_avee>; 1203584ea5b1SMartin Kepplinger vddi-supply = <®_lcd_1v8>; 1204584ea5b1SMartin Kepplinger backlight = <&backlight_dsi>; 1205584ea5b1SMartin Kepplinger reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; 1206ca4fd34eSMartin Kepplinger mantix,tp-rstn-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; 1207584ea5b1SMartin Kepplinger 1208584ea5b1SMartin Kepplinger port { 1209584ea5b1SMartin Kepplinger panel_in: endpoint { 1210584ea5b1SMartin Kepplinger remote-endpoint = <&mipi_dsi_out>; 1211584ea5b1SMartin Kepplinger }; 1212584ea5b1SMartin Kepplinger }; 1213584ea5b1SMartin Kepplinger }; 1214584ea5b1SMartin Kepplinger 1215584ea5b1SMartin Kepplinger ports { 1216584ea5b1SMartin Kepplinger port@1 { 1217584ea5b1SMartin Kepplinger reg = <1>; 1218584ea5b1SMartin Kepplinger 1219584ea5b1SMartin Kepplinger mipi_dsi_out: endpoint { 1220584ea5b1SMartin Kepplinger remote-endpoint = <&panel_in>; 1221584ea5b1SMartin Kepplinger }; 1222584ea5b1SMartin Kepplinger }; 1223584ea5b1SMartin Kepplinger }; 1224584ea5b1SMartin Kepplinger}; 1225584ea5b1SMartin Kepplinger 12268f0216b0SAngus Ainslie (Purism)&pgc_gpu { 12278f0216b0SAngus Ainslie (Purism) power-supply = <&buck3_reg>; 12288f0216b0SAngus Ainslie (Purism)}; 12298f0216b0SAngus Ainslie (Purism) 12308f0216b0SAngus Ainslie (Purism)&pgc_mipi { 12318f0216b0SAngus Ainslie (Purism) power-supply = <&ldo5_reg>; 12328f0216b0SAngus Ainslie (Purism)}; 12338f0216b0SAngus Ainslie (Purism) 12348f0216b0SAngus Ainslie (Purism)&pgc_vpu { 12358f0216b0SAngus Ainslie (Purism) power-supply = <&buck4_reg>; 12368f0216b0SAngus Ainslie (Purism)}; 12378f0216b0SAngus Ainslie (Purism) 12388f0216b0SAngus Ainslie (Purism)&pwm1 { 12398f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 12408f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_haptic>; 12418f0216b0SAngus Ainslie (Purism) status = "okay"; 12428f0216b0SAngus Ainslie (Purism)}; 12438f0216b0SAngus Ainslie (Purism) 12448f0216b0SAngus Ainslie (Purism)&pwm2 { 12458f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 12468f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_led_b>; 12478f0216b0SAngus Ainslie (Purism) status = "okay"; 12488f0216b0SAngus Ainslie (Purism)}; 12498f0216b0SAngus Ainslie (Purism) 12508f0216b0SAngus Ainslie (Purism)&pwm3 { 12518f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 12521f8359d4SSebastian Krzyszkowiak pinctrl-0 = <&pinctrl_led_r>; 12538f0216b0SAngus Ainslie (Purism) status = "okay"; 12548f0216b0SAngus Ainslie (Purism)}; 12558f0216b0SAngus Ainslie (Purism) 12568f0216b0SAngus Ainslie (Purism)&pwm4 { 12578f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 12581f8359d4SSebastian Krzyszkowiak pinctrl-0 = <&pinctrl_led_g>; 12598f0216b0SAngus Ainslie (Purism) status = "okay"; 12608f0216b0SAngus Ainslie (Purism)}; 12618f0216b0SAngus Ainslie (Purism) 12628f0216b0SAngus Ainslie (Purism)&sai2 { 12638f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 12648f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_sai2>; 12658f0216b0SAngus Ainslie (Purism) assigned-clocks = <&clk IMX8MQ_CLK_SAI2>; 12668f0216b0SAngus Ainslie (Purism) assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>; 12678f0216b0SAngus Ainslie (Purism) assigned-clock-rates = <24576000>; 12688f0216b0SAngus Ainslie (Purism) status = "okay"; 12698f0216b0SAngus Ainslie (Purism)}; 12708f0216b0SAngus Ainslie (Purism) 12718f0216b0SAngus Ainslie (Purism)&sai6 { 12728f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 12738f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_sai6>; 12748f0216b0SAngus Ainslie (Purism) assigned-clocks = <&clk IMX8MQ_CLK_SAI6>; 12758f0216b0SAngus Ainslie (Purism) assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>; 12768f0216b0SAngus Ainslie (Purism) assigned-clock-rates = <24576000>; 12778f0216b0SAngus Ainslie (Purism) fsl,sai-synchronous-rx; 12788f0216b0SAngus Ainslie (Purism) status = "okay"; 12798f0216b0SAngus Ainslie (Purism)}; 12808f0216b0SAngus Ainslie (Purism) 12818f0216b0SAngus Ainslie (Purism)&snvs_pwrkey { 12828f0216b0SAngus Ainslie (Purism) status = "okay"; 12838f0216b0SAngus Ainslie (Purism)}; 12848f0216b0SAngus Ainslie (Purism) 12858f0216b0SAngus Ainslie (Purism)&snvs_rtc { 12868f0216b0SAngus Ainslie (Purism) status = "disabled"; 12878f0216b0SAngus Ainslie (Purism)}; 12888f0216b0SAngus Ainslie (Purism) 12898f0216b0SAngus Ainslie (Purism)&uart1 { /* console */ 12908f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 12918f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_uart1>; 12928f0216b0SAngus Ainslie (Purism) status = "okay"; 12938f0216b0SAngus Ainslie (Purism)}; 12948f0216b0SAngus Ainslie (Purism) 12958f0216b0SAngus Ainslie (Purism)&uart2 { /* TPS - GPS - DEBUG */ 12968f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 12978f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_uart2>; 12988f0216b0SAngus Ainslie (Purism) status = "okay"; 12998f0216b0SAngus Ainslie (Purism) 13008f0216b0SAngus Ainslie (Purism) gnss { 13018f0216b0SAngus Ainslie (Purism) compatible = "globaltop,pa6h"; 13028f0216b0SAngus Ainslie (Purism) vcc-supply = <®_gnss>; 13038f0216b0SAngus Ainslie (Purism) current-speed = <9600>; 13048f0216b0SAngus Ainslie (Purism) }; 13058f0216b0SAngus Ainslie (Purism)}; 13068f0216b0SAngus Ainslie (Purism) 13078f0216b0SAngus Ainslie (Purism)&uart3 { /* SMC */ 13088f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 13098f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_uart3>; 13108f0216b0SAngus Ainslie (Purism) status = "okay"; 13118f0216b0SAngus Ainslie (Purism)}; 13128f0216b0SAngus Ainslie (Purism) 13138f0216b0SAngus Ainslie (Purism)&uart4 { /* BT */ 13148f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 13158f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_uart4>; 13168f0216b0SAngus Ainslie (Purism) uart-has-rtscts; 13178f0216b0SAngus Ainslie (Purism) status = "okay"; 13188f0216b0SAngus Ainslie (Purism)}; 13198f0216b0SAngus Ainslie (Purism) 13208f0216b0SAngus Ainslie (Purism)&usb3_phy0 { 13218f0216b0SAngus Ainslie (Purism) status = "okay"; 13228f0216b0SAngus Ainslie (Purism)}; 13238f0216b0SAngus Ainslie (Purism) 13248f0216b0SAngus Ainslie (Purism)&usb3_phy1 { 13258f0216b0SAngus Ainslie (Purism) vbus-supply = <®_hub>; 13268f0216b0SAngus Ainslie (Purism) status = "okay"; 13278f0216b0SAngus Ainslie (Purism)}; 13288f0216b0SAngus Ainslie (Purism) 13298f0216b0SAngus Ainslie (Purism)&usb_dwc3_0 { 13308f0216b0SAngus Ainslie (Purism) #address-cells = <1>; 13318f0216b0SAngus Ainslie (Purism) #size-cells = <0>; 13328f0216b0SAngus Ainslie (Purism) dr_mode = "otg"; 13332d43092eSAngus Ainslie usb-role-switch; 13348f0216b0SAngus Ainslie (Purism) status = "okay"; 13358f0216b0SAngus Ainslie (Purism) 13368f0216b0SAngus Ainslie (Purism) port@0 { 13378f0216b0SAngus Ainslie (Purism) reg = <0>; 13388f0216b0SAngus Ainslie (Purism) 13398f0216b0SAngus Ainslie (Purism) typec_hs: endpoint { 13408f0216b0SAngus Ainslie (Purism) remote-endpoint = <&usb_con_hs>; 13418f0216b0SAngus Ainslie (Purism) }; 13428f0216b0SAngus Ainslie (Purism) }; 13438f0216b0SAngus Ainslie (Purism) 13448f0216b0SAngus Ainslie (Purism) port@1 { 13458f0216b0SAngus Ainslie (Purism) reg = <1>; 13468f0216b0SAngus Ainslie (Purism) 13478f0216b0SAngus Ainslie (Purism) typec_ss: endpoint { 13488f0216b0SAngus Ainslie (Purism) remote-endpoint = <&usb_con_ss>; 13498f0216b0SAngus Ainslie (Purism) }; 13508f0216b0SAngus Ainslie (Purism) }; 13518f0216b0SAngus Ainslie (Purism)}; 13528f0216b0SAngus Ainslie (Purism) 13538f0216b0SAngus Ainslie (Purism)&usb_dwc3_1 { 13548f0216b0SAngus Ainslie (Purism) dr_mode = "host"; 13558f0216b0SAngus Ainslie (Purism) status = "okay"; 13568f0216b0SAngus Ainslie (Purism) #address-cells = <1>; 13578f0216b0SAngus Ainslie (Purism) #size-cells = <0>; 13588f0216b0SAngus Ainslie (Purism) 13598f0216b0SAngus Ainslie (Purism) /* Microchip USB2642 */ 13608f0216b0SAngus Ainslie (Purism) hub@1 { 13618f0216b0SAngus Ainslie (Purism) compatible = "usb424,2640"; 13628f0216b0SAngus Ainslie (Purism) reg = <1>; 13638f0216b0SAngus Ainslie (Purism) #address-cells = <1>; 13648f0216b0SAngus Ainslie (Purism) #size-cells = <0>; 13658f0216b0SAngus Ainslie (Purism) 13668f0216b0SAngus Ainslie (Purism) mass-storage@1 { 13678f0216b0SAngus Ainslie (Purism) compatible = "usb424,4041"; 13688f0216b0SAngus Ainslie (Purism) reg = <1>; 13698f0216b0SAngus Ainslie (Purism) }; 13708f0216b0SAngus Ainslie (Purism) }; 13718f0216b0SAngus Ainslie (Purism)}; 13728f0216b0SAngus Ainslie (Purism) 13738f0216b0SAngus Ainslie (Purism)&usdhc1 { 13746a67d8fbSMartin Kepplinger assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>; 13756a67d8fbSMartin Kepplinger assigned-clock-rates = <400000000>; 13768f0216b0SAngus Ainslie (Purism) pinctrl-names = "default", "state_100mhz", "state_200mhz"; 13778f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_usdhc1>; 13788f0216b0SAngus Ainslie (Purism) pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 13798f0216b0SAngus Ainslie (Purism) pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 13808f0216b0SAngus Ainslie (Purism) bus-width = <8>; 13818f0216b0SAngus Ainslie (Purism) vmmc-supply = <®_vdd_3v3>; 1382b239dd7fSFabio Estevam vqmmc-supply = <®_vdd_1v8>; 13838f0216b0SAngus Ainslie (Purism) non-removable; 13848f0216b0SAngus Ainslie (Purism) status = "okay"; 13858f0216b0SAngus Ainslie (Purism)}; 13868f0216b0SAngus Ainslie (Purism) 13878f0216b0SAngus Ainslie (Purism)&usdhc2 { 13886a67d8fbSMartin Kepplinger assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>; 13896a67d8fbSMartin Kepplinger assigned-clock-rates = <200000000>; 13908f0216b0SAngus Ainslie (Purism) pinctrl-names = "default", "state_100mhz", "state_200mhz"; 13918f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_usdhc2>; 13928f0216b0SAngus Ainslie (Purism) pinctrl-1 = <&pinctrl_usdhc2_100mhz>; 13938f0216b0SAngus Ainslie (Purism) pinctrl-2 = <&pinctrl_usdhc2_200mhz>; 13948f0216b0SAngus Ainslie (Purism) bus-width = <4>; 13958f0216b0SAngus Ainslie (Purism) vmmc-supply = <®_wifi_3v3>; 13962344af0dSAngus Ainslie mmc-pwrseq = <&usdhc2_pwrseq>; 1397*5296d8f4SSebastian Krzyszkowiak post-power-on-delay-ms = <20>; 13988f0216b0SAngus Ainslie (Purism) cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; 1399536612ecSSebastian Krzyszkowiak max-frequency = <100000000>; 14008f0216b0SAngus Ainslie (Purism) disable-wp; 14018f0216b0SAngus Ainslie (Purism) cap-sdio-irq; 14028f0216b0SAngus Ainslie (Purism) keep-power-in-suspend; 14038f0216b0SAngus Ainslie (Purism) wakeup-source; 14048f0216b0SAngus Ainslie (Purism) status = "okay"; 14058f0216b0SAngus Ainslie (Purism)}; 14068f0216b0SAngus Ainslie (Purism) 14078f0216b0SAngus Ainslie (Purism)&wdog1 { 14088f0216b0SAngus Ainslie (Purism) pinctrl-names = "default"; 14098f0216b0SAngus Ainslie (Purism) pinctrl-0 = <&pinctrl_wdog>; 14108f0216b0SAngus Ainslie (Purism) fsl,ext-reset-output; 14118f0216b0SAngus Ainslie (Purism) status = "okay"; 14128f0216b0SAngus Ainslie (Purism)}; 1413c24a9b69SSebastian Krzyszkowiak 1414c24a9b69SSebastian Krzyszkowiak&a53_opp_table { 1415c24a9b69SSebastian Krzyszkowiak opp-1000000000 { 1416c24a9b69SSebastian Krzyszkowiak opp-microvolt = <850000>; 1417c24a9b69SSebastian Krzyszkowiak }; 1418c24a9b69SSebastian Krzyszkowiak 1419c24a9b69SSebastian Krzyszkowiak opp-1500000000 { 1420c24a9b69SSebastian Krzyszkowiak opp-microvolt = <950000>; 1421c24a9b69SSebastian Krzyszkowiak }; 1422c24a9b69SSebastian Krzyszkowiak}; 1423