xref: /openbmc/linux/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi (revision afb424b99e0f556bf1324c73570028cb56d5cadb)
16f30b27cSTim Harvey// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
26f30b27cSTim Harvey/*
36f30b27cSTim Harvey * Copyright 2020 Gateworks Corporation
46f30b27cSTim Harvey */
56f30b27cSTim Harvey
66f30b27cSTim Harvey#include <dt-bindings/gpio/gpio.h>
76f30b27cSTim Harvey#include <dt-bindings/leds/common.h>
8*afb424b9STim Harvey#include <dt-bindings/phy/phy-imx8-pcie.h>
96f30b27cSTim Harvey
106f30b27cSTim Harvey/ {
116f30b27cSTim Harvey	aliases {
126f30b27cSTim Harvey		usb0 = &usbotg1;
136f30b27cSTim Harvey		usb1 = &usbotg2;
146f30b27cSTim Harvey	};
156f30b27cSTim Harvey
166f30b27cSTim Harvey	led-controller {
176f30b27cSTim Harvey		compatible = "gpio-leds";
186f30b27cSTim Harvey		pinctrl-names = "default";
196f30b27cSTim Harvey		pinctrl-0 = <&pinctrl_gpio_leds>;
206f30b27cSTim Harvey
216f30b27cSTim Harvey		led-0 {
226f30b27cSTim Harvey			function = LED_FUNCTION_STATUS;
236f30b27cSTim Harvey			color = <LED_COLOR_ID_GREEN>;
246f30b27cSTim Harvey			gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
256f30b27cSTim Harvey			default-state = "on";
266f30b27cSTim Harvey			linux,default-trigger = "heartbeat";
276f30b27cSTim Harvey		};
286f30b27cSTim Harvey
296f30b27cSTim Harvey		led-1 {
306f30b27cSTim Harvey			function = LED_FUNCTION_STATUS;
316f30b27cSTim Harvey			color = <LED_COLOR_ID_RED>;
326f30b27cSTim Harvey			gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
336f30b27cSTim Harvey			default-state = "off";
346f30b27cSTim Harvey		};
356f30b27cSTim Harvey	};
366f30b27cSTim Harvey
37*afb424b9STim Harvey	pcie0_refclk: pcie0-refclk {
38*afb424b9STim Harvey		compatible = "fixed-clock";
39*afb424b9STim Harvey		#clock-cells = <0>;
40*afb424b9STim Harvey		clock-frequency = <100000000>;
41*afb424b9STim Harvey	};
42*afb424b9STim Harvey
436f30b27cSTim Harvey	pps {
446f30b27cSTim Harvey		compatible = "pps-gpio";
456f30b27cSTim Harvey		pinctrl-names = "default";
466f30b27cSTim Harvey		pinctrl-0 = <&pinctrl_pps>;
476f30b27cSTim Harvey		gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
486f30b27cSTim Harvey		status = "okay";
496f30b27cSTim Harvey	};
506f30b27cSTim Harvey
516f30b27cSTim Harvey	reg_usb_otg1_vbus: regulator-usb-otg1 {
526f30b27cSTim Harvey		pinctrl-names = "default";
536f30b27cSTim Harvey		pinctrl-0 = <&pinctrl_reg_usb1_en>;
546f30b27cSTim Harvey		compatible = "regulator-fixed";
556f30b27cSTim Harvey		regulator-name = "usb_otg1_vbus";
56bd306fdbSTim Harvey		gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
576f30b27cSTim Harvey		enable-active-high;
586f30b27cSTim Harvey		regulator-min-microvolt = <5000000>;
596f30b27cSTim Harvey		regulator-max-microvolt = <5000000>;
606f30b27cSTim Harvey	};
616f30b27cSTim Harvey};
626f30b27cSTim Harvey
636f30b27cSTim Harvey/* off-board header */
646f30b27cSTim Harvey&ecspi2 {
656f30b27cSTim Harvey	pinctrl-names = "default";
666f30b27cSTim Harvey	pinctrl-0 = <&pinctrl_spi2>;
67c6fe862aSFabio Estevam	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
686f30b27cSTim Harvey	status = "okay";
696f30b27cSTim Harvey};
706f30b27cSTim Harvey
716f30b27cSTim Harvey&i2c2 {
726f30b27cSTim Harvey	clock-frequency = <400000>;
736f30b27cSTim Harvey	pinctrl-names = "default";
746f30b27cSTim Harvey	pinctrl-0 = <&pinctrl_i2c2>;
756f30b27cSTim Harvey	status = "okay";
766f30b27cSTim Harvey
776f30b27cSTim Harvey	accelerometer@19 {
786f30b27cSTim Harvey		pinctrl-names = "default";
796f30b27cSTim Harvey		pinctrl-0 = <&pinctrl_accel>;
806f30b27cSTim Harvey		compatible = "st,lis2de12";
816f30b27cSTim Harvey		reg = <0x19>;
826f30b27cSTim Harvey		st,drdy-int-pin = <1>;
836f30b27cSTim Harvey		interrupt-parent = <&gpio4>;
846f30b27cSTim Harvey		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
856f30b27cSTim Harvey		interrupt-names = "INT1";
866f30b27cSTim Harvey	};
876f30b27cSTim Harvey};
886f30b27cSTim Harvey
896f30b27cSTim Harvey/* off-board header */
906f30b27cSTim Harvey&i2c3 {
916f30b27cSTim Harvey	clock-frequency = <400000>;
926f30b27cSTim Harvey	pinctrl-names = "default";
936f30b27cSTim Harvey	pinctrl-0 = <&pinctrl_i2c3>;
946f30b27cSTim Harvey	status = "okay";
956f30b27cSTim Harvey};
966f30b27cSTim Harvey
97*afb424b9STim Harvey&pcie_phy {
98*afb424b9STim Harvey	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
99*afb424b9STim Harvey	fsl,clkreq-unsupported;
100*afb424b9STim Harvey	clocks = <&pcie0_refclk>;
101*afb424b9STim Harvey	status = "okay";
102*afb424b9STim Harvey};
103*afb424b9STim Harvey
104*afb424b9STim Harvey&pcie0 {
105*afb424b9STim Harvey	pinctrl-names = "default";
106*afb424b9STim Harvey	pinctrl-0 = <&pinctrl_pcie0>;
107*afb424b9STim Harvey	reset-gpio = <&gpio4 6 GPIO_ACTIVE_LOW>;
108*afb424b9STim Harvey	clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>,
109*afb424b9STim Harvey		 <&pcie0_refclk>;
110*afb424b9STim Harvey	clock-names = "pcie", "pcie_aux", "pcie_bus";
111*afb424b9STim Harvey	assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
112*afb424b9STim Harvey			  <&clk IMX8MM_CLK_PCIE1_CTRL>;
113*afb424b9STim Harvey	assigned-clock-rates = <10000000>, <250000000>;
114*afb424b9STim Harvey	assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
115*afb424b9STim Harvey				 <&clk IMX8MM_SYS_PLL2_250M>;
116*afb424b9STim Harvey	status = "okay";
117*afb424b9STim Harvey};
118*afb424b9STim Harvey
1196f30b27cSTim Harvey/* GPS */
1206f30b27cSTim Harvey&uart1 {
1216f30b27cSTim Harvey	pinctrl-names = "default";
1226f30b27cSTim Harvey	pinctrl-0 = <&pinctrl_uart1>;
1236f30b27cSTim Harvey	status = "okay";
1246f30b27cSTim Harvey};
1256f30b27cSTim Harvey
1266f30b27cSTim Harvey/* off-board header */
1276f30b27cSTim Harvey&uart3 {
1286f30b27cSTim Harvey	pinctrl-names = "default";
1296f30b27cSTim Harvey	pinctrl-0 = <&pinctrl_uart3>;
1306f30b27cSTim Harvey	status = "okay";
1316f30b27cSTim Harvey};
1326f30b27cSTim Harvey
1336f30b27cSTim Harvey&usbotg1 {
1346f30b27cSTim Harvey	dr_mode = "otg";
1356f30b27cSTim Harvey	vbus-supply = <&reg_usb_otg1_vbus>;
1366f30b27cSTim Harvey	status = "okay";
1376f30b27cSTim Harvey};
1386f30b27cSTim Harvey
1396f30b27cSTim Harvey&usbotg2 {
1406f30b27cSTim Harvey	dr_mode = "host";
1416f30b27cSTim Harvey	status = "okay";
1426f30b27cSTim Harvey};
1436f30b27cSTim Harvey
1446f30b27cSTim Harvey&iomuxc {
1456f30b27cSTim Harvey	pinctrl-names = "default";
1466f30b27cSTim Harvey	pinctrl-0 = <&pinctrl_hog>;
1476f30b27cSTim Harvey
1486f30b27cSTim Harvey	pinctrl_hog: hoggrp {
1496f30b27cSTim Harvey		fsl,pins = <
1506f30b27cSTim Harvey			MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3		0x40000041 /* PLUG_TEST */
1516f30b27cSTim Harvey			MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6	0x40000041 /* PCI_USBSEL */
1526f30b27cSTim Harvey			MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7	0x40000041 /* PCIE_WDIS# */
1536f30b27cSTim Harvey			MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7	0x40000041 /* DIO0 */
1546f30b27cSTim Harvey			MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9	0x40000041 /* DIO1 */
1556f30b27cSTim Harvey			MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3	0x40000041 /* DIO2 */
1566f30b27cSTim Harvey			MX8MM_IOMUXC_SAI1_RXD2_GPIO4_IO4	0x40000041 /* DIO2 */
1576f30b27cSTim Harvey		>;
1586f30b27cSTim Harvey	};
1596f30b27cSTim Harvey
1606f30b27cSTim Harvey	pinctrl_accel: accelgrp {
1616f30b27cSTim Harvey		fsl,pins = <
1626f30b27cSTim Harvey			MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5	0x159
1636f30b27cSTim Harvey		>;
1646f30b27cSTim Harvey	};
1656f30b27cSTim Harvey
1666f30b27cSTim Harvey	pinctrl_gpio_leds: gpioledgrp {
1676f30b27cSTim Harvey		fsl,pins = <
1686f30b27cSTim Harvey			MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5	0x19
1696f30b27cSTim Harvey			MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4		0x19
1706f30b27cSTim Harvey		>;
1716f30b27cSTim Harvey	};
1726f30b27cSTim Harvey
1736f30b27cSTim Harvey	pinctrl_i2c3: i2c3grp {
1746f30b27cSTim Harvey		fsl,pins = <
1756f30b27cSTim Harvey			MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL		0x400001c3
1766f30b27cSTim Harvey			MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA		0x400001c3
1776f30b27cSTim Harvey		>;
1786f30b27cSTim Harvey	};
1796f30b27cSTim Harvey
180*afb424b9STim Harvey	pinctrl_pcie0: pcie0grp {
181*afb424b9STim Harvey		fsl,pins = <
182*afb424b9STim Harvey			MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6	0x41
183*afb424b9STim Harvey		>;
184*afb424b9STim Harvey	};
185*afb424b9STim Harvey
1866f30b27cSTim Harvey	pinctrl_pps: ppsgrp {
1876f30b27cSTim Harvey		fsl,pins = <
1886f30b27cSTim Harvey			MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15	0x41
1896f30b27cSTim Harvey		>;
1906f30b27cSTim Harvey	};
1916f30b27cSTim Harvey
1926f30b27cSTim Harvey	pinctrl_reg_usb1_en: regusb1grp {
1936f30b27cSTim Harvey		fsl,pins = <
194bd306fdbSTim Harvey			MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10	0x41
195bd306fdbSTim Harvey			MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12	0x141
1966f30b27cSTim Harvey			MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC	0x41
1976f30b27cSTim Harvey		>;
1986f30b27cSTim Harvey	};
1996f30b27cSTim Harvey
2006f30b27cSTim Harvey	pinctrl_spi2: spi2grp {
2016f30b27cSTim Harvey		fsl,pins = <
2026f30b27cSTim Harvey			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK	0xd6
2036f30b27cSTim Harvey			MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI	0xd6
2046f30b27cSTim Harvey			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK	0xd6
2056f30b27cSTim Harvey			MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13	0xd6
2066f30b27cSTim Harvey		>;
2076f30b27cSTim Harvey	};
2086f30b27cSTim Harvey
2096f30b27cSTim Harvey	pinctrl_uart1: uart1grp {
2106f30b27cSTim Harvey		fsl,pins = <
2116f30b27cSTim Harvey			MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX	0x140
2126f30b27cSTim Harvey			MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX	0x140
2136f30b27cSTim Harvey		>;
2146f30b27cSTim Harvey	};
2156f30b27cSTim Harvey
2166f30b27cSTim Harvey	pinctrl_uart3: uart3grp {
2176f30b27cSTim Harvey		fsl,pins = <
2186f30b27cSTim Harvey			MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX	0x140
2196f30b27cSTim Harvey			MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX	0x140
2206f30b27cSTim Harvey		>;
2216f30b27cSTim Harvey	};
2226f30b27cSTim Harvey};
223