1*c47d7b73SSascha Hauer// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*c47d7b73SSascha Hauer/* 3*c47d7b73SSascha Hauer * Copyright 2018 Bang & Olufsen 4*c47d7b73SSascha Hauer * Copyright 2022 Pengutronix 5*c47d7b73SSascha Hauer */ 6*c47d7b73SSascha Hauer 7*c47d7b73SSascha Hauer/dts-v1/; 8*c47d7b73SSascha Hauer 9*c47d7b73SSascha Hauer#include "imx8mm-innocomm-wb15.dtsi" 10*c47d7b73SSascha Hauer 11*c47d7b73SSascha Hauer/ { 12*c47d7b73SSascha Hauer model = "InnoComm WB15-EVK"; 13*c47d7b73SSascha Hauer compatible = "innocomm,wb15-evk", "fsl,imx8mm"; 14*c47d7b73SSascha Hauer 15*c47d7b73SSascha Hauer chosen { 16*c47d7b73SSascha Hauer stdout-path = &uart2; 17*c47d7b73SSascha Hauer }; 18*c47d7b73SSascha Hauer 19*c47d7b73SSascha Hauer leds { 20*c47d7b73SSascha Hauer compatible = "gpio-leds"; 21*c47d7b73SSascha Hauer pinctrl-names = "default"; 22*c47d7b73SSascha Hauer pinctrl-0 = <&pinctrl_gpio_leds>; 23*c47d7b73SSascha Hauer 24*c47d7b73SSascha Hauer led-0 { 25*c47d7b73SSascha Hauer label = "debug"; 26*c47d7b73SSascha Hauer gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>; 27*c47d7b73SSascha Hauer default-state = "off"; 28*c47d7b73SSascha Hauer }; 29*c47d7b73SSascha Hauer }; 30*c47d7b73SSascha Hauer 31*c47d7b73SSascha Hauer reg_vsd_3v3: regulator-vsd-3v3 { 32*c47d7b73SSascha Hauer compatible = "regulator-fixed"; 33*c47d7b73SSascha Hauer pinctrl-names = "default"; 34*c47d7b73SSascha Hauer pinctrl-0 = <&pinctrl_reg_vsd_3v3>; 35*c47d7b73SSascha Hauer regulator-name = "VSD_3V3"; 36*c47d7b73SSascha Hauer regulator-min-microvolt = <3300000>; 37*c47d7b73SSascha Hauer regulator-max-microvolt = <3300000>; 38*c47d7b73SSascha Hauer gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; 39*c47d7b73SSascha Hauer enable-active-high; 40*c47d7b73SSascha Hauer }; 41*c47d7b73SSascha Hauer 42*c47d7b73SSascha Hauer reg_ethphy: regulator-eth-phy { 43*c47d7b73SSascha Hauer compatible = "regulator-fixed"; 44*c47d7b73SSascha Hauer pinctrl-names = "default"; 45*c47d7b73SSascha Hauer pinctrl-0 = <&pinctrl_fec_phy_reg>; 46*c47d7b73SSascha Hauer regulator-name = "PHY_3V3"; 47*c47d7b73SSascha Hauer regulator-min-microvolt = <3300000>; 48*c47d7b73SSascha Hauer regulator-max-microvolt = <3300000>; 49*c47d7b73SSascha Hauer gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>; 50*c47d7b73SSascha Hauer enable-active-high; 51*c47d7b73SSascha Hauer }; 52*c47d7b73SSascha Hauer}; 53*c47d7b73SSascha Hauer 54*c47d7b73SSascha Hauer&fec1 { 55*c47d7b73SSascha Hauer pinctrl-names = "default"; 56*c47d7b73SSascha Hauer pinctrl-0 = <&pinctrl_fec>; 57*c47d7b73SSascha Hauer phy-mode = "rgmii-id"; 58*c47d7b73SSascha Hauer phy-handle = <ðphy0>; 59*c47d7b73SSascha Hauer fsl,magic-packet; 60*c47d7b73SSascha Hauer status = "okay"; 61*c47d7b73SSascha Hauer 62*c47d7b73SSascha Hauer mdio { 63*c47d7b73SSascha Hauer #address-cells = <1>; 64*c47d7b73SSascha Hauer #size-cells = <0>; 65*c47d7b73SSascha Hauer 66*c47d7b73SSascha Hauer ethphy0: ethernet-phy@1 { 67*c47d7b73SSascha Hauer compatible = "ethernet-phy-ieee802.3-c22"; 68*c47d7b73SSascha Hauer reg = <0x1>; 69*c47d7b73SSascha Hauer pinctrl-names = "default"; 70*c47d7b73SSascha Hauer pinctrl-0 = <&pinctrl_fec_phy>; 71*c47d7b73SSascha Hauer reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; 72*c47d7b73SSascha Hauer phy-supply = <®_ethphy>; 73*c47d7b73SSascha Hauer }; 74*c47d7b73SSascha Hauer }; 75*c47d7b73SSascha Hauer}; 76*c47d7b73SSascha Hauer 77*c47d7b73SSascha Hauer&uart2 { 78*c47d7b73SSascha Hauer status = "okay"; 79*c47d7b73SSascha Hauer}; 80*c47d7b73SSascha Hauer 81*c47d7b73SSascha Hauer&usbotg1 { 82*c47d7b73SSascha Hauer dr_mode = "otg"; 83*c47d7b73SSascha Hauer samsung,picophy-pre-emp-curr-control = <3>; 84*c47d7b73SSascha Hauer samsung,picophy-dc-vol-level-adjust = <7>; 85*c47d7b73SSascha Hauer disable-over-current; 86*c47d7b73SSascha Hauer status = "okay"; 87*c47d7b73SSascha Hauer}; 88*c47d7b73SSascha Hauer 89*c47d7b73SSascha Hauer&usbotg2 { 90*c47d7b73SSascha Hauer dr_mode = "host"; 91*c47d7b73SSascha Hauer samsung,picophy-pre-emp-curr-control = <3>; 92*c47d7b73SSascha Hauer samsung,picophy-dc-vol-level-adjust = <7>; 93*c47d7b73SSascha Hauer disable-over-current; 94*c47d7b73SSascha Hauer status = "okay"; 95*c47d7b73SSascha Hauer}; 96*c47d7b73SSascha Hauer 97*c47d7b73SSascha Hauer&usdhc2 { 98*c47d7b73SSascha Hauer cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; 99*c47d7b73SSascha Hauer vmmc-supply = <®_vsd_3v3>; 100*c47d7b73SSascha Hauer status = "okay"; 101*c47d7b73SSascha Hauer}; 102*c47d7b73SSascha Hauer 103*c47d7b73SSascha Hauer&iomuxc { 104*c47d7b73SSascha Hauer pinctrl_fec: fec-grp { 105*c47d7b73SSascha Hauer fsl,pins = < 106*c47d7b73SSascha Hauer MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x03 107*c47d7b73SSascha Hauer MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x03 108*c47d7b73SSascha Hauer MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f 109*c47d7b73SSascha Hauer MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f 110*c47d7b73SSascha Hauer MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f 111*c47d7b73SSascha Hauer MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f 112*c47d7b73SSascha Hauer MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 113*c47d7b73SSascha Hauer MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 114*c47d7b73SSascha Hauer MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 115*c47d7b73SSascha Hauer MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 116*c47d7b73SSascha Hauer MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f 117*c47d7b73SSascha Hauer MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 118*c47d7b73SSascha Hauer MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 119*c47d7b73SSascha Hauer MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f 120*c47d7b73SSascha Hauer >; 121*c47d7b73SSascha Hauer }; 122*c47d7b73SSascha Hauer 123*c47d7b73SSascha Hauer pinctrl_fec_phy: fec-phy-grp { 124*c47d7b73SSascha Hauer fsl,pins = < 125*c47d7b73SSascha Hauer MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19 126*c47d7b73SSascha Hauer >; 127*c47d7b73SSascha Hauer }; 128*c47d7b73SSascha Hauer 129*c47d7b73SSascha Hauer pinctrl_fec_phy_reg: fec-phy-reg-grp { 130*c47d7b73SSascha Hauer fsl,pins = < 131*c47d7b73SSascha Hauer MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x16 132*c47d7b73SSascha Hauer >; 133*c47d7b73SSascha Hauer }; 134*c47d7b73SSascha Hauer 135*c47d7b73SSascha Hauer pinctrl_gpio_leds: led-grp { 136*c47d7b73SSascha Hauer fsl,pins = < 137*c47d7b73SSascha Hauer MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3 0xd6 138*c47d7b73SSascha Hauer >; 139*c47d7b73SSascha Hauer }; 140*c47d7b73SSascha Hauer 141*c47d7b73SSascha Hauer pinctrl_reg_vsd_3v3: reg-vsd-3v3-grp { 142*c47d7b73SSascha Hauer fsl,pins = < 143*c47d7b73SSascha Hauer MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 144*c47d7b73SSascha Hauer >; 145*c47d7b73SSascha Hauer }; 146*c47d7b73SSascha Hauer}; 147