xref: /openbmc/linux/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi (revision e402b08634b398e9feb94902c7adcf05bb8ba47d)
1aa71d064SJacky Bai// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2aa71d064SJacky Bai/*
3aa71d064SJacky Bai * Copyright 2020 NXP
4aa71d064SJacky Bai */
5aa71d064SJacky Bai
6aa71d064SJacky Bai/dts-v1/;
7aa71d064SJacky Bai
8b4d36c10SRichard Zhu#include <dt-bindings/phy/phy-imx8-pcie.h>
9aa71d064SJacky Bai#include <dt-bindings/usb/pd.h>
10aa71d064SJacky Bai#include "imx8mm.dtsi"
11aa71d064SJacky Bai
12aa71d064SJacky Bai/ {
13aa71d064SJacky Bai	chosen {
14aa71d064SJacky Bai		stdout-path = &uart2;
15aa71d064SJacky Bai	};
16aa71d064SJacky Bai
17aa71d064SJacky Bai	memory@40000000 {
18aa71d064SJacky Bai		device_type = "memory";
19aa71d064SJacky Bai		reg = <0x0 0x40000000 0 0x80000000>;
20aa71d064SJacky Bai	};
21aa71d064SJacky Bai
22a27335b3SFabio Estevam	hdmi-connector {
23a27335b3SFabio Estevam		compatible = "hdmi-connector";
24a27335b3SFabio Estevam		label = "hdmi";
25a27335b3SFabio Estevam		type = "a";
26a27335b3SFabio Estevam
27a27335b3SFabio Estevam		port {
28a27335b3SFabio Estevam			hdmi_connector_in: endpoint {
29*efa97aedSLiu Ying				remote-endpoint = <&adv7535_out>;
30a27335b3SFabio Estevam			};
31a27335b3SFabio Estevam		};
32a27335b3SFabio Estevam	};
33a27335b3SFabio Estevam
34aa71d064SJacky Bai	leds {
35aa71d064SJacky Bai		compatible = "gpio-leds";
36aa71d064SJacky Bai		pinctrl-names = "default";
37aa71d064SJacky Bai		pinctrl-0 = <&pinctrl_gpio_led>;
38aa71d064SJacky Bai
39aa71d064SJacky Bai		status {
40aa71d064SJacky Bai			label = "status";
41aa71d064SJacky Bai			gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
42aa71d064SJacky Bai			default-state = "on";
43aa71d064SJacky Bai		};
44aa71d064SJacky Bai	};
45aa71d064SJacky Bai
46b4d36c10SRichard Zhu	pcie0_refclk: pcie0-refclk {
47b4d36c10SRichard Zhu		compatible = "fixed-clock";
48b4d36c10SRichard Zhu		#clock-cells = <0>;
49b4d36c10SRichard Zhu		clock-frequency = <100000000>;
50b4d36c10SRichard Zhu	};
51b4d36c10SRichard Zhu
52b4d36c10SRichard Zhu	reg_pcie0: regulator-pcie {
53b4d36c10SRichard Zhu		compatible = "regulator-fixed";
54b4d36c10SRichard Zhu		pinctrl-names = "default";
55b4d36c10SRichard Zhu		pinctrl-0 = <&pinctrl_pcie0_reg>;
56b4d36c10SRichard Zhu		regulator-name = "MPCIE_3V3";
57b4d36c10SRichard Zhu		regulator-min-microvolt = <3300000>;
58b4d36c10SRichard Zhu		regulator-max-microvolt = <3300000>;
59b4d36c10SRichard Zhu		gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
60b4d36c10SRichard Zhu		enable-active-high;
61b4d36c10SRichard Zhu	};
62b4d36c10SRichard Zhu
63aa71d064SJacky Bai	reg_usdhc2_vmmc: regulator-usdhc2 {
64aa71d064SJacky Bai		compatible = "regulator-fixed";
65aa71d064SJacky Bai		pinctrl-names = "default";
66aa71d064SJacky Bai		pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
67aa71d064SJacky Bai		regulator-name = "VSD_3V3";
68aa71d064SJacky Bai		regulator-min-microvolt = <3300000>;
69aa71d064SJacky Bai		regulator-max-microvolt = <3300000>;
70aa71d064SJacky Bai		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
712a6b56aaSHaibo Chen		off-on-delay-us = <20000>;
72aa71d064SJacky Bai		enable-active-high;
73aa71d064SJacky Bai	};
74aa71d064SJacky Bai
75*efa97aedSLiu Ying	reg_vddext_3v3: regulator-vddext-3v3 {
76*efa97aedSLiu Ying		compatible = "regulator-fixed";
77*efa97aedSLiu Ying		regulator-name = "VDDEXT_3V3";
78*efa97aedSLiu Ying		regulator-min-microvolt = <3300000>;
79*efa97aedSLiu Ying		regulator-max-microvolt = <3300000>;
80*efa97aedSLiu Ying	};
81*efa97aedSLiu Ying
82b5f955c0STommaso Merciai	backlight: backlight {
83b5f955c0STommaso Merciai		compatible = "pwm-backlight";
84957aef02SMarkus Niebel		pwms = <&pwm1 0 5000000 0>;
85b5f955c0STommaso Merciai		brightness-levels = <0 255>;
86b5f955c0STommaso Merciai		num-interpolated-steps = <255>;
87b5f955c0STommaso Merciai		default-brightness-level = <250>;
88b5f955c0STommaso Merciai	};
89b5f955c0STommaso Merciai
9056e08dc3SJoakim Zhang	ir-receiver {
9156e08dc3SJoakim Zhang		compatible = "gpio-ir-receiver";
9256e08dc3SJoakim Zhang		gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
9356e08dc3SJoakim Zhang		pinctrl-names = "default";
9456e08dc3SJoakim Zhang		pinctrl-0 = <&pinctrl_ir>;
9556e08dc3SJoakim Zhang		linux,autosuspend-period = <125>;
9656e08dc3SJoakim Zhang	};
9756e08dc3SJoakim Zhang
98f8e03537SShengjiu Wang	audio_codec_bt_sco: audio-codec-bt-sco {
99f8e03537SShengjiu Wang		compatible = "linux,bt-sco";
100f8e03537SShengjiu Wang		#sound-dai-cells = <1>;
101f8e03537SShengjiu Wang	};
102f8e03537SShengjiu Wang
103aa71d064SJacky Bai	wm8524: audio-codec {
104aa71d064SJacky Bai		#sound-dai-cells = <0>;
105aa71d064SJacky Bai		compatible = "wlf,wm8524";
106aa71d064SJacky Bai		pinctrl-names = "default";
107aa71d064SJacky Bai		pinctrl-0 = <&pinctrl_gpio_wlf>;
108aa71d064SJacky Bai		wlf,mute-gpios = <&gpio5 21 GPIO_ACTIVE_LOW>;
109aa71d064SJacky Bai	};
110aa71d064SJacky Bai
111f8e03537SShengjiu Wang	sound-bt-sco {
112f8e03537SShengjiu Wang		compatible = "simple-audio-card";
113f8e03537SShengjiu Wang		simple-audio-card,name = "bt-sco-audio";
114f8e03537SShengjiu Wang		simple-audio-card,format = "dsp_a";
115f8e03537SShengjiu Wang		simple-audio-card,bitclock-inversion;
116f8e03537SShengjiu Wang		simple-audio-card,frame-master = <&btcpu>;
117f8e03537SShengjiu Wang		simple-audio-card,bitclock-master = <&btcpu>;
118f8e03537SShengjiu Wang
119f8e03537SShengjiu Wang		btcpu: simple-audio-card,cpu {
120f8e03537SShengjiu Wang			sound-dai = <&sai2>;
121f8e03537SShengjiu Wang			dai-tdm-slot-num = <2>;
122f8e03537SShengjiu Wang			dai-tdm-slot-width = <16>;
123f8e03537SShengjiu Wang		};
124f8e03537SShengjiu Wang
125f8e03537SShengjiu Wang		simple-audio-card,codec {
126f8e03537SShengjiu Wang			sound-dai = <&audio_codec_bt_sco 1>;
127f8e03537SShengjiu Wang		};
128f8e03537SShengjiu Wang	};
129f8e03537SShengjiu Wang
130aa71d064SJacky Bai	sound-wm8524 {
131aa71d064SJacky Bai		compatible = "simple-audio-card";
132aa71d064SJacky Bai		simple-audio-card,name = "wm8524-audio";
133aa71d064SJacky Bai		simple-audio-card,format = "i2s";
134aa71d064SJacky Bai		simple-audio-card,frame-master = <&cpudai>;
135aa71d064SJacky Bai		simple-audio-card,bitclock-master = <&cpudai>;
136aa71d064SJacky Bai		simple-audio-card,widgets =
137aa71d064SJacky Bai			"Line", "Left Line Out Jack",
138aa71d064SJacky Bai			"Line", "Right Line Out Jack";
139aa71d064SJacky Bai		simple-audio-card,routing =
140aa71d064SJacky Bai			"Left Line Out Jack", "LINEVOUTL",
141aa71d064SJacky Bai			"Right Line Out Jack", "LINEVOUTR";
142aa71d064SJacky Bai
143aa71d064SJacky Bai		cpudai: simple-audio-card,cpu {
144aa71d064SJacky Bai			sound-dai = <&sai3>;
145aa71d064SJacky Bai			dai-tdm-slot-num = <2>;
146aa71d064SJacky Bai			dai-tdm-slot-width = <32>;
147aa71d064SJacky Bai		};
148aa71d064SJacky Bai
149aa71d064SJacky Bai		simple-audio-card,codec {
150aa71d064SJacky Bai			sound-dai = <&wm8524>;
151aa71d064SJacky Bai			clocks = <&clk IMX8MM_CLK_SAI3_ROOT>;
152aa71d064SJacky Bai		};
153aa71d064SJacky Bai	};
154aa71d064SJacky Bai};
155aa71d064SJacky Bai
156aa71d064SJacky Bai&A53_0 {
157aa71d064SJacky Bai	cpu-supply = <&buck2_reg>;
158aa71d064SJacky Bai};
159aa71d064SJacky Bai
160aa71d064SJacky Bai&A53_1 {
161aa71d064SJacky Bai	cpu-supply = <&buck2_reg>;
162aa71d064SJacky Bai};
163aa71d064SJacky Bai
164aa71d064SJacky Bai&A53_2 {
165aa71d064SJacky Bai	cpu-supply = <&buck2_reg>;
166aa71d064SJacky Bai};
167aa71d064SJacky Bai
168aa71d064SJacky Bai&A53_3 {
169aa71d064SJacky Bai	cpu-supply = <&buck2_reg>;
170aa71d064SJacky Bai};
171aa71d064SJacky Bai
172aa71d064SJacky Bai&fec1 {
173aa71d064SJacky Bai	pinctrl-names = "default";
174aa71d064SJacky Bai	pinctrl-0 = <&pinctrl_fec1>;
175aa71d064SJacky Bai	phy-mode = "rgmii-id";
176aa71d064SJacky Bai	phy-handle = <&ethphy0>;
177aa71d064SJacky Bai	fsl,magic-packet;
178aa71d064SJacky Bai	status = "okay";
179aa71d064SJacky Bai
180aa71d064SJacky Bai	mdio {
181aa71d064SJacky Bai		#address-cells = <1>;
182aa71d064SJacky Bai		#size-cells = <0>;
183aa71d064SJacky Bai
184aa71d064SJacky Bai		ethphy0: ethernet-phy@0 {
185aa71d064SJacky Bai			compatible = "ethernet-phy-ieee802.3-c22";
186aa71d064SJacky Bai			reg = <0>;
187aa71d064SJacky Bai			reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
188aa71d064SJacky Bai			reset-assert-us = <10000>;
18920b6559eSJoakim Zhang			qca,disable-smarteee;
19009e5ccddSJoakim Zhang			vddio-supply = <&vddio>;
19109e5ccddSJoakim Zhang
19209e5ccddSJoakim Zhang			vddio: vddio-regulator {
19309e5ccddSJoakim Zhang				regulator-min-microvolt = <1800000>;
19409e5ccddSJoakim Zhang				regulator-max-microvolt = <1800000>;
19509e5ccddSJoakim Zhang			};
196aa71d064SJacky Bai		};
197aa71d064SJacky Bai	};
198aa71d064SJacky Bai};
199aa71d064SJacky Bai
200aa71d064SJacky Bai&i2c1 {
201aa71d064SJacky Bai	clock-frequency = <400000>;
202aa71d064SJacky Bai	pinctrl-names = "default";
203aa71d064SJacky Bai	pinctrl-0 = <&pinctrl_i2c1>;
204aa71d064SJacky Bai	status = "okay";
205aa71d064SJacky Bai
206aa71d064SJacky Bai	pmic@4b {
207aa71d064SJacky Bai		compatible = "rohm,bd71847";
208aa71d064SJacky Bai		reg = <0x4b>;
209ce6fc31fSKrzysztof Kozlowski		pinctrl-names = "default";
210aa71d064SJacky Bai		pinctrl-0 = <&pinctrl_pmic>;
211aa71d064SJacky Bai		interrupt-parent = <&gpio1>;
2125f67317bSKrzysztof Kozlowski		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
213aa71d064SJacky Bai		rohm,reset-snvs-powered;
214aa71d064SJacky Bai
215a6a355edSKrzysztof Kozlowski		#clock-cells = <0>;
21685af7ffdSPeng Fan		clocks = <&osc_32k>;
217a6a355edSKrzysztof Kozlowski		clock-output-names = "clk-32k-out";
218a6a355edSKrzysztof Kozlowski
219aa71d064SJacky Bai		regulators {
220aa71d064SJacky Bai			buck1_reg: BUCK1 {
221aa71d064SJacky Bai				regulator-name = "buck1";
222aa71d064SJacky Bai				regulator-min-microvolt = <700000>;
223aa71d064SJacky Bai				regulator-max-microvolt = <1300000>;
224aa71d064SJacky Bai				regulator-boot-on;
225aa71d064SJacky Bai				regulator-always-on;
226aa71d064SJacky Bai				regulator-ramp-delay = <1250>;
227aa71d064SJacky Bai			};
228aa71d064SJacky Bai
229aa71d064SJacky Bai			buck2_reg: BUCK2 {
230aa71d064SJacky Bai				regulator-name = "buck2";
231aa71d064SJacky Bai				regulator-min-microvolt = <700000>;
232aa71d064SJacky Bai				regulator-max-microvolt = <1300000>;
233aa71d064SJacky Bai				regulator-boot-on;
234aa71d064SJacky Bai				regulator-always-on;
235aa71d064SJacky Bai				regulator-ramp-delay = <1250>;
236aa71d064SJacky Bai				rohm,dvs-run-voltage = <1000000>;
237aa71d064SJacky Bai				rohm,dvs-idle-voltage = <900000>;
238aa71d064SJacky Bai			};
239aa71d064SJacky Bai
240aa71d064SJacky Bai			buck3_reg: BUCK3 {
241aa71d064SJacky Bai				// BUCK5 in datasheet
242aa71d064SJacky Bai				regulator-name = "buck3";
243aa71d064SJacky Bai				regulator-min-microvolt = <700000>;
244aa71d064SJacky Bai				regulator-max-microvolt = <1350000>;
245aa71d064SJacky Bai				regulator-boot-on;
246aa71d064SJacky Bai				regulator-always-on;
247aa71d064SJacky Bai			};
248aa71d064SJacky Bai
249aa71d064SJacky Bai			buck4_reg: BUCK4 {
250aa71d064SJacky Bai				// BUCK6 in datasheet
251aa71d064SJacky Bai				regulator-name = "buck4";
252aa71d064SJacky Bai				regulator-min-microvolt = <3000000>;
253aa71d064SJacky Bai				regulator-max-microvolt = <3300000>;
254aa71d064SJacky Bai				regulator-boot-on;
255aa71d064SJacky Bai				regulator-always-on;
256aa71d064SJacky Bai			};
257aa71d064SJacky Bai
258aa71d064SJacky Bai			buck5_reg: BUCK5 {
259aa71d064SJacky Bai				// BUCK7 in datasheet
260aa71d064SJacky Bai				regulator-name = "buck5";
261aa71d064SJacky Bai				regulator-min-microvolt = <1605000>;
262aa71d064SJacky Bai				regulator-max-microvolt = <1995000>;
263aa71d064SJacky Bai				regulator-boot-on;
264aa71d064SJacky Bai				regulator-always-on;
265aa71d064SJacky Bai			};
266aa71d064SJacky Bai
267aa71d064SJacky Bai			buck6_reg: BUCK6 {
268aa71d064SJacky Bai				// BUCK8 in datasheet
269aa71d064SJacky Bai				regulator-name = "buck6";
270aa71d064SJacky Bai				regulator-min-microvolt = <800000>;
271aa71d064SJacky Bai				regulator-max-microvolt = <1400000>;
272aa71d064SJacky Bai				regulator-boot-on;
273aa71d064SJacky Bai				regulator-always-on;
274aa71d064SJacky Bai			};
275aa71d064SJacky Bai
276aa71d064SJacky Bai			ldo1_reg: LDO1 {
277aa71d064SJacky Bai				regulator-name = "ldo1";
278aa71d064SJacky Bai				regulator-min-microvolt = <1600000>;
279aa71d064SJacky Bai				regulator-max-microvolt = <3300000>;
280aa71d064SJacky Bai				regulator-boot-on;
281aa71d064SJacky Bai				regulator-always-on;
282aa71d064SJacky Bai			};
283aa71d064SJacky Bai
284aa71d064SJacky Bai			ldo2_reg: LDO2 {
285aa71d064SJacky Bai				regulator-name = "ldo2";
286aa71d064SJacky Bai				regulator-min-microvolt = <800000>;
287aa71d064SJacky Bai				regulator-max-microvolt = <900000>;
288aa71d064SJacky Bai				regulator-boot-on;
289aa71d064SJacky Bai				regulator-always-on;
290aa71d064SJacky Bai			};
291aa71d064SJacky Bai
292aa71d064SJacky Bai			ldo3_reg: LDO3 {
293aa71d064SJacky Bai				regulator-name = "ldo3";
294aa71d064SJacky Bai				regulator-min-microvolt = <1800000>;
295aa71d064SJacky Bai				regulator-max-microvolt = <3300000>;
296aa71d064SJacky Bai				regulator-boot-on;
297aa71d064SJacky Bai				regulator-always-on;
298aa71d064SJacky Bai			};
299aa71d064SJacky Bai
300aa71d064SJacky Bai			ldo4_reg: LDO4 {
301aa71d064SJacky Bai				regulator-name = "ldo4";
302aa71d064SJacky Bai				regulator-min-microvolt = <900000>;
303aa71d064SJacky Bai				regulator-max-microvolt = <1800000>;
304aa71d064SJacky Bai				regulator-boot-on;
305aa71d064SJacky Bai				regulator-always-on;
306aa71d064SJacky Bai			};
307aa71d064SJacky Bai
308aa71d064SJacky Bai			ldo6_reg: LDO6 {
309aa71d064SJacky Bai				regulator-name = "ldo6";
310aa71d064SJacky Bai				regulator-min-microvolt = <900000>;
311aa71d064SJacky Bai				regulator-max-microvolt = <1800000>;
312aa71d064SJacky Bai				regulator-boot-on;
313aa71d064SJacky Bai				regulator-always-on;
314aa71d064SJacky Bai			};
315aa71d064SJacky Bai		};
316aa71d064SJacky Bai	};
317aa71d064SJacky Bai};
318aa71d064SJacky Bai
319aa71d064SJacky Bai&i2c2 {
320aa71d064SJacky Bai	clock-frequency = <400000>;
321aa71d064SJacky Bai	pinctrl-names = "default";
322aa71d064SJacky Bai	pinctrl-0 = <&pinctrl_i2c2>;
323aa71d064SJacky Bai	status = "okay";
324aa71d064SJacky Bai
325a27335b3SFabio Estevam	hdmi@3d {
326a27335b3SFabio Estevam		compatible = "adi,adv7535";
327*efa97aedSLiu Ying		reg = <0x3d>;
328*efa97aedSLiu Ying		interrupt-parent = <&gpio1>;
329*efa97aedSLiu Ying		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
330a27335b3SFabio Estevam		adi,dsi-lanes = <4>;
331*efa97aedSLiu Ying		avdd-supply = <&buck5_reg>;
332*efa97aedSLiu Ying		dvdd-supply = <&buck5_reg>;
333*efa97aedSLiu Ying		pvdd-supply = <&buck5_reg>;
334*efa97aedSLiu Ying		a2vdd-supply = <&buck5_reg>;
335*efa97aedSLiu Ying		v3p3-supply = <&reg_vddext_3v3>;
336*efa97aedSLiu Ying		v1p2-supply = <&buck5_reg>;
337a27335b3SFabio Estevam
338a27335b3SFabio Estevam		ports {
339a27335b3SFabio Estevam			#address-cells = <1>;
340a27335b3SFabio Estevam			#size-cells = <0>;
341a27335b3SFabio Estevam
342a27335b3SFabio Estevam			port@0 {
343a27335b3SFabio Estevam				reg = <0>;
344a27335b3SFabio Estevam
345*efa97aedSLiu Ying				adv7535_in: endpoint {
346a27335b3SFabio Estevam					remote-endpoint = <&dsi_out>;
347a27335b3SFabio Estevam				};
348a27335b3SFabio Estevam			};
349a27335b3SFabio Estevam
350a27335b3SFabio Estevam			port@1 {
351a27335b3SFabio Estevam				reg = <1>;
352a27335b3SFabio Estevam
353*efa97aedSLiu Ying				adv7535_out: endpoint {
354a27335b3SFabio Estevam					remote-endpoint = <&hdmi_connector_in>;
355a27335b3SFabio Estevam				};
356a27335b3SFabio Estevam			};
357a27335b3SFabio Estevam
358a27335b3SFabio Estevam		};
359a27335b3SFabio Estevam	};
360a27335b3SFabio Estevam
361aa71d064SJacky Bai	ptn5110: tcpc@50 {
362aa71d064SJacky Bai		compatible = "nxp,ptn5110";
363aa71d064SJacky Bai		pinctrl-names = "default";
364aa71d064SJacky Bai		pinctrl-0 = <&pinctrl_typec1>;
365aa71d064SJacky Bai		reg = <0x50>;
366aa71d064SJacky Bai		interrupt-parent = <&gpio2>;
367aa71d064SJacky Bai		interrupts = <11 8>;
368aa71d064SJacky Bai		status = "okay";
369aa71d064SJacky Bai
370aa71d064SJacky Bai		port {
371aa71d064SJacky Bai			typec1_dr_sw: endpoint {
372aa71d064SJacky Bai				remote-endpoint = <&usb1_drd_sw>;
373aa71d064SJacky Bai			};
374aa71d064SJacky Bai		};
375aa71d064SJacky Bai
376aa71d064SJacky Bai		typec1_con: connector {
377aa71d064SJacky Bai			compatible = "usb-c-connector";
378aa71d064SJacky Bai			label = "USB-C";
379aa71d064SJacky Bai			power-role = "dual";
380aa71d064SJacky Bai			data-role = "dual";
381aa71d064SJacky Bai			try-power-role = "sink";
382aa71d064SJacky Bai			source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
383aa71d064SJacky Bai			sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
384aa71d064SJacky Bai				     PDO_VAR(5000, 20000, 3000)>;
385aa71d064SJacky Bai			op-sink-microwatt = <15000000>;
386aa71d064SJacky Bai			self-powered;
387aa71d064SJacky Bai		};
388aa71d064SJacky Bai	};
389aa71d064SJacky Bai};
390aa71d064SJacky Bai
39199e5d6d2SFabio Estevam
39299e5d6d2SFabio Estevam&csi {
39399e5d6d2SFabio Estevam	status = "okay";
39499e5d6d2SFabio Estevam};
39599e5d6d2SFabio Estevam
396aa71d064SJacky Bai&i2c3 {
397aa71d064SJacky Bai	clock-frequency = <400000>;
398aa71d064SJacky Bai	pinctrl-names = "default";
399aa71d064SJacky Bai	pinctrl-0 = <&pinctrl_i2c3>;
400aa71d064SJacky Bai	status = "okay";
401aa71d064SJacky Bai
402aa71d064SJacky Bai	pca6416: gpio@20 {
40304b9df75SMarco Felsch		compatible = "nxp,pca6416";
404aa71d064SJacky Bai		reg = <0x20>;
405aa71d064SJacky Bai		gpio-controller;
406aa71d064SJacky Bai		#gpio-cells = <2>;
407c6c93f78SAdrian Alonso		vcc-supply = <&buck4_reg>;
408aa71d064SJacky Bai	};
40999e5d6d2SFabio Estevam
41099e5d6d2SFabio Estevam	camera@3c {
41199e5d6d2SFabio Estevam		compatible = "ovti,ov5640";
41299e5d6d2SFabio Estevam		reg = <0x3c>;
41399e5d6d2SFabio Estevam		pinctrl-names = "default";
41499e5d6d2SFabio Estevam		pinctrl-0 = <&pinctrl_camera>;
41599e5d6d2SFabio Estevam		clocks = <&clk IMX8MM_CLK_CLKO1>;
41699e5d6d2SFabio Estevam		clock-names = "xclk";
41799e5d6d2SFabio Estevam		assigned-clocks = <&clk IMX8MM_CLK_CLKO1>;
41899e5d6d2SFabio Estevam		assigned-clock-parents = <&clk IMX8MM_CLK_24M>;
41999e5d6d2SFabio Estevam		assigned-clock-rates = <24000000>;
42099e5d6d2SFabio Estevam		powerdown-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
42199e5d6d2SFabio Estevam		reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
42299e5d6d2SFabio Estevam
42399e5d6d2SFabio Estevam		port {
42499e5d6d2SFabio Estevam			ov5640_to_mipi_csi2: endpoint {
42599e5d6d2SFabio Estevam				remote-endpoint = <&imx8mm_mipi_csi_in>;
42699e5d6d2SFabio Estevam				clock-lanes = <0>;
42799e5d6d2SFabio Estevam				data-lanes = <1 2>;
42899e5d6d2SFabio Estevam			};
42999e5d6d2SFabio Estevam		};
43099e5d6d2SFabio Estevam	};
431aa71d064SJacky Bai};
432aa71d064SJacky Bai
433a27335b3SFabio Estevam&lcdif {
434a27335b3SFabio Estevam	status = "okay";
435a27335b3SFabio Estevam};
436a27335b3SFabio Estevam
43799e5d6d2SFabio Estevam&mipi_csi {
43899e5d6d2SFabio Estevam	status = "okay";
43999e5d6d2SFabio Estevam
44099e5d6d2SFabio Estevam	ports {
44199e5d6d2SFabio Estevam		port@0 {
44299e5d6d2SFabio Estevam			imx8mm_mipi_csi_in: endpoint {
44399e5d6d2SFabio Estevam				remote-endpoint = <&ov5640_to_mipi_csi2>;
44499e5d6d2SFabio Estevam				data-lanes = <1 2>;
44599e5d6d2SFabio Estevam			};
44699e5d6d2SFabio Estevam		};
44799e5d6d2SFabio Estevam	};
44899e5d6d2SFabio Estevam};
44999e5d6d2SFabio Estevam
450a27335b3SFabio Estevam&mipi_dsi {
451a27335b3SFabio Estevam	samsung,esc-clock-frequency = <10000000>;
452a27335b3SFabio Estevam	status = "okay";
453a27335b3SFabio Estevam
454a27335b3SFabio Estevam	ports {
455a27335b3SFabio Estevam		port@1 {
456a27335b3SFabio Estevam			reg = <1>;
457a27335b3SFabio Estevam
458a27335b3SFabio Estevam			dsi_out: endpoint {
459*efa97aedSLiu Ying				remote-endpoint = <&adv7535_in>;
460a27335b3SFabio Estevam				data-lanes = <1 2 3 4>;
461a27335b3SFabio Estevam			};
462a27335b3SFabio Estevam		};
463a27335b3SFabio Estevam	};
464a27335b3SFabio Estevam};
465a27335b3SFabio Estevam
466b4d36c10SRichard Zhu&pcie_phy {
467b4d36c10SRichard Zhu	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
468b4d36c10SRichard Zhu	fsl,tx-deemph-gen1 = <0x2d>;
469b4d36c10SRichard Zhu	fsl,tx-deemph-gen2 = <0xf>;
470b4d36c10SRichard Zhu	clocks = <&pcie0_refclk>;
471b4d36c10SRichard Zhu	status = "okay";
472b4d36c10SRichard Zhu};
473b4d36c10SRichard Zhu
474b4d36c10SRichard Zhu&pcie0 {
475b4d36c10SRichard Zhu	pinctrl-names = "default";
476b4d36c10SRichard Zhu	pinctrl-0 = <&pinctrl_pcie0>;
477b4d36c10SRichard Zhu	reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
4783c033fb1SMarek Vasut	clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,
4793c033fb1SMarek Vasut		 <&clk IMX8MM_CLK_PCIE1_AUX>;
480b4d36c10SRichard Zhu	assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
481b4d36c10SRichard Zhu			  <&clk IMX8MM_CLK_PCIE1_CTRL>;
482b4d36c10SRichard Zhu	assigned-clock-rates = <10000000>, <250000000>;
483b4d36c10SRichard Zhu	assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
484b4d36c10SRichard Zhu				 <&clk IMX8MM_SYS_PLL2_250M>;
485b4d36c10SRichard Zhu	vpcie-supply = <&reg_pcie0>;
486b4d36c10SRichard Zhu	status = "okay";
487b4d36c10SRichard Zhu};
488b4d36c10SRichard Zhu
489f8e03537SShengjiu Wang&sai2 {
490f8e03537SShengjiu Wang	#sound-dai-cells = <0>;
491f8e03537SShengjiu Wang	pinctrl-names = "default";
492f8e03537SShengjiu Wang	pinctrl-0 = <&pinctrl_sai2>;
493f8e03537SShengjiu Wang	assigned-clocks = <&clk IMX8MM_CLK_SAI2>;
494f8e03537SShengjiu Wang	assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
495f8e03537SShengjiu Wang	assigned-clock-rates = <24576000>;
496f8e03537SShengjiu Wang	status = "okay";
497f8e03537SShengjiu Wang};
498f8e03537SShengjiu Wang
499aa71d064SJacky Bai&sai3 {
500aa71d064SJacky Bai	pinctrl-names = "default";
501aa71d064SJacky Bai	pinctrl-0 = <&pinctrl_sai3>;
502aa71d064SJacky Bai	assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
503aa71d064SJacky Bai	assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
504aa71d064SJacky Bai	assigned-clock-rates = <24576000>;
505aa71d064SJacky Bai	status = "okay";
506aa71d064SJacky Bai};
507aa71d064SJacky Bai
508aa71d064SJacky Bai&snvs_pwrkey {
509aa71d064SJacky Bai	status = "okay";
510aa71d064SJacky Bai};
511aa71d064SJacky Bai
512aa71d064SJacky Bai&uart2 { /* console */
513aa71d064SJacky Bai	pinctrl-names = "default";
514aa71d064SJacky Bai	pinctrl-0 = <&pinctrl_uart2>;
515aa71d064SJacky Bai	status = "okay";
516aa71d064SJacky Bai};
517aa71d064SJacky Bai
5183cad403fSLi Jun&usbphynop1 {
5193cad403fSLi Jun	wakeup-source;
5203cad403fSLi Jun};
5213cad403fSLi Jun
522aa71d064SJacky Bai&usbotg1 {
523aa71d064SJacky Bai	dr_mode = "otg";
524aa71d064SJacky Bai	hnp-disable;
525aa71d064SJacky Bai	srp-disable;
526aa71d064SJacky Bai	adp-disable;
527aa71d064SJacky Bai	usb-role-switch;
5284616c395SLi Jun	disable-over-current;
529aa71d064SJacky Bai	samsung,picophy-pre-emp-curr-control = <3>;
530aa71d064SJacky Bai	samsung,picophy-dc-vol-level-adjust = <7>;
531aa71d064SJacky Bai	status = "okay";
532aa71d064SJacky Bai
533aa71d064SJacky Bai	port {
534aa71d064SJacky Bai		usb1_drd_sw: endpoint {
535aa71d064SJacky Bai			remote-endpoint = <&typec1_dr_sw>;
536aa71d064SJacky Bai		};
537aa71d064SJacky Bai	};
538aa71d064SJacky Bai};
539aa71d064SJacky Bai
540aa71d064SJacky Bai&usdhc2 {
541aa71d064SJacky Bai	assigned-clocks = <&clk IMX8MM_CLK_USDHC2>;
542aa71d064SJacky Bai	assigned-clock-rates = <200000000>;
543aa71d064SJacky Bai	pinctrl-names = "default", "state_100mhz", "state_200mhz";
544aa71d064SJacky Bai	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
545aa71d064SJacky Bai	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
546aa71d064SJacky Bai	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
547aa71d064SJacky Bai	cd-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
548aa71d064SJacky Bai	bus-width = <4>;
549aa71d064SJacky Bai	vmmc-supply = <&reg_usdhc2_vmmc>;
550aa71d064SJacky Bai	status = "okay";
551aa71d064SJacky Bai};
552aa71d064SJacky Bai
553aa71d064SJacky Bai&wdog1 {
554aa71d064SJacky Bai	pinctrl-names = "default";
555aa71d064SJacky Bai	pinctrl-0 = <&pinctrl_wdog>;
556aa71d064SJacky Bai	fsl,ext-reset-output;
557aa71d064SJacky Bai	status = "okay";
558aa71d064SJacky Bai};
559aa71d064SJacky Bai
560b5f955c0STommaso Merciai&pwm1 {
561b5f955c0STommaso Merciai	pinctrl-names = "default";
562b5f955c0STommaso Merciai	pinctrl-0 = <&pinctrl_backlight>;
563b5f955c0STommaso Merciai	status = "okay";
564b5f955c0STommaso Merciai};
565b5f955c0STommaso Merciai
566aa71d064SJacky Bai&iomuxc {
567aa71d064SJacky Bai	pinctrl_fec1: fec1grp {
568aa71d064SJacky Bai		fsl,pins = <
569aa71d064SJacky Bai			MX8MM_IOMUXC_ENET_MDC_ENET1_MDC			0x3
570aa71d064SJacky Bai			MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO		0x3
571aa71d064SJacky Bai			MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3		0x1f
572aa71d064SJacky Bai			MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2		0x1f
573aa71d064SJacky Bai			MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1		0x1f
574aa71d064SJacky Bai			MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0		0x1f
575aa71d064SJacky Bai			MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3		0x91
576aa71d064SJacky Bai			MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2		0x91
577aa71d064SJacky Bai			MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1		0x91
578aa71d064SJacky Bai			MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0		0x91
579aa71d064SJacky Bai			MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC		0x1f
580aa71d064SJacky Bai			MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC		0x91
581aa71d064SJacky Bai			MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL	0x91
582aa71d064SJacky Bai			MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL	0x1f
583aa71d064SJacky Bai			MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22		0x19
584aa71d064SJacky Bai		>;
585aa71d064SJacky Bai	};
586aa71d064SJacky Bai
587aa71d064SJacky Bai	pinctrl_gpio_led: gpioledgrp {
588aa71d064SJacky Bai		fsl,pins = <
589aa71d064SJacky Bai			MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16	0x19
590aa71d064SJacky Bai		>;
591aa71d064SJacky Bai	};
592aa71d064SJacky Bai
59356e08dc3SJoakim Zhang	pinctrl_ir: irgrp {
59456e08dc3SJoakim Zhang		fsl,pins = <
59556e08dc3SJoakim Zhang			MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13              0x4f
59656e08dc3SJoakim Zhang		>;
59756e08dc3SJoakim Zhang	};
59856e08dc3SJoakim Zhang
599aa71d064SJacky Bai	pinctrl_gpio_wlf: gpiowlfgrp {
600aa71d064SJacky Bai		fsl,pins = <
601aa71d064SJacky Bai			MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21	0xd6
602aa71d064SJacky Bai		>;
603aa71d064SJacky Bai	};
604aa71d064SJacky Bai
605aa71d064SJacky Bai	pinctrl_i2c1: i2c1grp {
606aa71d064SJacky Bai		fsl,pins = <
607aa71d064SJacky Bai			MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL			0x400001c3
608aa71d064SJacky Bai			MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA			0x400001c3
609aa71d064SJacky Bai		>;
610aa71d064SJacky Bai	};
611aa71d064SJacky Bai
612aa71d064SJacky Bai	pinctrl_i2c2: i2c2grp {
613aa71d064SJacky Bai		fsl,pins = <
614aa71d064SJacky Bai			MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL			0x400001c3
615aa71d064SJacky Bai			MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA			0x400001c3
616aa71d064SJacky Bai		>;
617aa71d064SJacky Bai	};
618aa71d064SJacky Bai
619aa71d064SJacky Bai	pinctrl_i2c3: i2c3grp {
620aa71d064SJacky Bai		fsl,pins = <
621aa71d064SJacky Bai			MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL			0x400001c3
622aa71d064SJacky Bai			MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA			0x400001c3
623aa71d064SJacky Bai		>;
624aa71d064SJacky Bai	};
625aa71d064SJacky Bai
626b4d36c10SRichard Zhu	pinctrl_pcie0: pcie0grp {
627b4d36c10SRichard Zhu		fsl,pins = <
628b4d36c10SRichard Zhu			MX8MM_IOMUXC_I2C4_SCL_PCIE1_CLKREQ_B    0x61
629b4d36c10SRichard Zhu			MX8MM_IOMUXC_SAI2_RXFS_GPIO4_IO21       0x41
630b4d36c10SRichard Zhu		>;
631b4d36c10SRichard Zhu	};
632b4d36c10SRichard Zhu
633b4d36c10SRichard Zhu	pinctrl_pcie0_reg: pcie0reggrp {
634b4d36c10SRichard Zhu		fsl,pins = <
635b4d36c10SRichard Zhu			MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5       0x41
636b4d36c10SRichard Zhu		>;
637b4d36c10SRichard Zhu	};
638b4d36c10SRichard Zhu
639fc54664eSKrzysztof Kozlowski	pinctrl_pmic: pmicirqgrp {
640aa71d064SJacky Bai		fsl,pins = <
6415f67317bSKrzysztof Kozlowski			MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3		0x141
642aa71d064SJacky Bai		>;
643aa71d064SJacky Bai	};
644aa71d064SJacky Bai
645fc54664eSKrzysztof Kozlowski	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
646aa71d064SJacky Bai		fsl,pins = <
647aa71d064SJacky Bai			MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19	0x41
648aa71d064SJacky Bai		>;
649aa71d064SJacky Bai	};
650aa71d064SJacky Bai
651f8e03537SShengjiu Wang	pinctrl_sai2: sai2grp {
652f8e03537SShengjiu Wang		fsl,pins = <
653f8e03537SShengjiu Wang			MX8MM_IOMUXC_SAI2_TXC_SAI2_TX_BCLK      0xd6
654f8e03537SShengjiu Wang			MX8MM_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC     0xd6
655f8e03537SShengjiu Wang			MX8MM_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0    0xd6
656f8e03537SShengjiu Wang			MX8MM_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0    0xd6
657f8e03537SShengjiu Wang		>;
658f8e03537SShengjiu Wang	};
659f8e03537SShengjiu Wang
660aa71d064SJacky Bai	pinctrl_sai3: sai3grp {
661aa71d064SJacky Bai		fsl,pins = <
662aa71d064SJacky Bai			MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC     0xd6
663aa71d064SJacky Bai			MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK      0xd6
664aa71d064SJacky Bai			MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK        0xd6
665aa71d064SJacky Bai			MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0     0xd6
666aa71d064SJacky Bai		>;
667aa71d064SJacky Bai	};
668aa71d064SJacky Bai
669aa71d064SJacky Bai	pinctrl_typec1: typec1grp {
670aa71d064SJacky Bai		fsl,pins = <
671aa71d064SJacky Bai			MX8MM_IOMUXC_SD1_STROBE_GPIO2_IO11	0x159
672aa71d064SJacky Bai		>;
673aa71d064SJacky Bai	};
674aa71d064SJacky Bai
675aa71d064SJacky Bai	pinctrl_uart2: uart2grp {
676aa71d064SJacky Bai		fsl,pins = <
677aa71d064SJacky Bai			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX	0x140
678aa71d064SJacky Bai			MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX	0x140
679aa71d064SJacky Bai		>;
680aa71d064SJacky Bai	};
681aa71d064SJacky Bai
682fc54664eSKrzysztof Kozlowski	pinctrl_usdhc2_gpio: usdhc2grpgpiogrp {
683aa71d064SJacky Bai		fsl,pins = <
684aa71d064SJacky Bai			MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15	0x1c4
685aa71d064SJacky Bai		>;
686aa71d064SJacky Bai	};
687aa71d064SJacky Bai
688aa71d064SJacky Bai	pinctrl_usdhc2: usdhc2grp {
689aa71d064SJacky Bai		fsl,pins = <
690aa71d064SJacky Bai			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x190
691aa71d064SJacky Bai			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x1d0
692aa71d064SJacky Bai			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d0
693aa71d064SJacky Bai			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d0
694aa71d064SJacky Bai			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d0
695aa71d064SJacky Bai			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d0
696aa71d064SJacky Bai			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT	0x1d0
697aa71d064SJacky Bai		>;
698aa71d064SJacky Bai	};
699aa71d064SJacky Bai
700fc54664eSKrzysztof Kozlowski	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
701aa71d064SJacky Bai		fsl,pins = <
702aa71d064SJacky Bai			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x194
703aa71d064SJacky Bai			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x1d4
704aa71d064SJacky Bai			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d4
705aa71d064SJacky Bai			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d4
706aa71d064SJacky Bai			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d4
707aa71d064SJacky Bai			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d4
708aa71d064SJacky Bai			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT	0x1d0
709aa71d064SJacky Bai		>;
710aa71d064SJacky Bai	};
711aa71d064SJacky Bai
712fc54664eSKrzysztof Kozlowski	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
713aa71d064SJacky Bai		fsl,pins = <
714aa71d064SJacky Bai			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x196
715aa71d064SJacky Bai			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x1d6
716aa71d064SJacky Bai			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d6
717aa71d064SJacky Bai			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d6
718aa71d064SJacky Bai			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d6
719aa71d064SJacky Bai			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d6
720aa71d064SJacky Bai			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT	0x1d0
721aa71d064SJacky Bai		>;
722aa71d064SJacky Bai	};
723aa71d064SJacky Bai
724aa71d064SJacky Bai	pinctrl_wdog: wdoggrp {
725aa71d064SJacky Bai		fsl,pins = <
726b7818209SAnson Huang			MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B	0x166
727aa71d064SJacky Bai		>;
728aa71d064SJacky Bai	};
729b5f955c0STommaso Merciai
730b5f955c0STommaso Merciai	pinctrl_backlight: backlightgrp {
731b5f955c0STommaso Merciai		fsl,pins = <
732b5f955c0STommaso Merciai			MX8MM_IOMUXC_GPIO1_IO01_PWM1_OUT	0x06
733b5f955c0STommaso Merciai		>;
734b5f955c0STommaso Merciai	};
73599e5d6d2SFabio Estevam
73699e5d6d2SFabio Estevam	pinctrl_camera: cameragrp {
73799e5d6d2SFabio Estevam		fsl,pins = <
73899e5d6d2SFabio Estevam			MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6		0x19
73999e5d6d2SFabio Estevam			MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7		0x19
74099e5d6d2SFabio Estevam			MX8MM_IOMUXC_GPIO1_IO14_CCMSRCGPCMIX_CLKO1	0x59
74199e5d6d2SFabio Estevam		>;
74299e5d6d2SFabio Estevam	};
743aa71d064SJacky Bai};
744