xref: /openbmc/linux/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts (revision bf02f2ffe59c991f28519be2a37769d3e7c8f6a9)
1ec05e9ccSShaohui Xie/*
2ec05e9ccSShaohui Xie * Device Tree Include file for Freescale Layerscape-1043A family SoC.
3ec05e9ccSShaohui Xie *
48637f58bSLi Yang * Copyright 2014-2015 Freescale Semiconductor, Inc.
5ec05e9ccSShaohui Xie *
6ec05e9ccSShaohui Xie * Mingkai Hu <Mingkai.hu@freescale.com>
7ec05e9ccSShaohui Xie *
8ec05e9ccSShaohui Xie * This file is dual-licensed: you can use it either under the terms
9ec05e9ccSShaohui Xie * of the GPLv2 or the X11 license, at your option. Note that this dual
10ec05e9ccSShaohui Xie * licensing only applies to this file, and not this project as a
11ec05e9ccSShaohui Xie * whole.
12ec05e9ccSShaohui Xie *
13ec05e9ccSShaohui Xie *  a) This library is free software; you can redistribute it and/or
14ec05e9ccSShaohui Xie *     modify it under the terms of the GNU General Public License as
15ec05e9ccSShaohui Xie *     published by the Free Software Foundation; either version 2 of the
16ec05e9ccSShaohui Xie *     License, or (at your option) any later version.
17ec05e9ccSShaohui Xie *
18ec05e9ccSShaohui Xie *     This library is distributed in the hope that it will be useful,
19ec05e9ccSShaohui Xie *     but WITHOUT ANY WARRANTY; without even the implied warranty of
20ec05e9ccSShaohui Xie *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21ec05e9ccSShaohui Xie *     GNU General Public License for more details.
22ec05e9ccSShaohui Xie *
23ec05e9ccSShaohui Xie * Or, alternatively,
24ec05e9ccSShaohui Xie *
25ec05e9ccSShaohui Xie *  b) Permission is hereby granted, free of charge, to any person
26ec05e9ccSShaohui Xie *     obtaining a copy of this software and associated documentation
27ec05e9ccSShaohui Xie *     files (the "Software"), to deal in the Software without
28ec05e9ccSShaohui Xie *     restriction, including without limitation the rights to use,
29ec05e9ccSShaohui Xie *     copy, modify, merge, publish, distribute, sublicense, and/or
30ec05e9ccSShaohui Xie *     sell copies of the Software, and to permit persons to whom the
31ec05e9ccSShaohui Xie *     Software is furnished to do so, subject to the following
32ec05e9ccSShaohui Xie *     conditions:
33ec05e9ccSShaohui Xie *
34ec05e9ccSShaohui Xie *     The above copyright notice and this permission notice shall be
35ec05e9ccSShaohui Xie *     included in all copies or substantial portions of the Software.
36ec05e9ccSShaohui Xie *
37ec05e9ccSShaohui Xie *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
38ec05e9ccSShaohui Xie *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
39ec05e9ccSShaohui Xie *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40ec05e9ccSShaohui Xie *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41ec05e9ccSShaohui Xie *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
42ec05e9ccSShaohui Xie *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
43ec05e9ccSShaohui Xie *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44ec05e9ccSShaohui Xie *     OTHER DEALINGS IN THE SOFTWARE.
45ec05e9ccSShaohui Xie */
46ec05e9ccSShaohui Xie
47ec05e9ccSShaohui Xie/dts-v1/;
4818486552SHongtao Jia#include "fsl-ls1043a.dtsi"
49ec05e9ccSShaohui Xie
50ec05e9ccSShaohui Xie/ {
51ec05e9ccSShaohui Xie	model = "LS1043A QDS Board";
52ec05e9ccSShaohui Xie	compatible = "fsl,ls1043a-qds", "fsl,ls1043a";
53ec05e9ccSShaohui Xie
54ec05e9ccSShaohui Xie	aliases {
55ec05e9ccSShaohui Xie		gpio0 = &gpio1;
56ec05e9ccSShaohui Xie		gpio1 = &gpio2;
57ec05e9ccSShaohui Xie		gpio2 = &gpio3;
58ec05e9ccSShaohui Xie		gpio3 = &gpio4;
5944605b65SStuart Yoder		serial0 = &duart0;
6044605b65SStuart Yoder		serial1 = &duart1;
6144605b65SStuart Yoder		serial2 = &duart2;
6244605b65SStuart Yoder		serial3 = &duart3;
63ec05e9ccSShaohui Xie	};
64d5c8b122SStuart Yoder
65d5c8b122SStuart Yoder	chosen {
66d5c8b122SStuart Yoder		stdout-path = "serial0:115200n8";
67d5c8b122SStuart Yoder	};
68ec05e9ccSShaohui Xie};
69ec05e9ccSShaohui Xie
70ec05e9ccSShaohui Xie&duart0 {
71ec05e9ccSShaohui Xie	status = "okay";
72ec05e9ccSShaohui Xie};
73ec05e9ccSShaohui Xie
74ec05e9ccSShaohui Xie&duart1 {
75ec05e9ccSShaohui Xie	status = "okay";
76ec05e9ccSShaohui Xie};
77ec05e9ccSShaohui Xie
78ec05e9ccSShaohui Xie&ifc {
79ec05e9ccSShaohui Xie	#address-cells = <2>;
80ec05e9ccSShaohui Xie	#size-cells = <1>;
81ec05e9ccSShaohui Xie	/* NOR, NAND Flashes and FPGA on board */
82ec05e9ccSShaohui Xie	ranges = <0x0 0x0 0x0 0x60000000 0x08000000
83ec05e9ccSShaohui Xie		  0x1 0x0 0x0 0x7e800000 0x00010000
84ec05e9ccSShaohui Xie		  0x2 0x0 0x0 0x7fb00000 0x00000100>;
85ec05e9ccSShaohui Xie	status = "okay";
86ec05e9ccSShaohui Xie
87ec05e9ccSShaohui Xie	nor@0,0 {
88ec05e9ccSShaohui Xie		compatible = "cfi-flash";
89ec05e9ccSShaohui Xie		reg = <0x0 0x0 0x8000000>;
90ec05e9ccSShaohui Xie		bank-width = <2>;
91ec05e9ccSShaohui Xie		device-width = <1>;
92ec05e9ccSShaohui Xie	};
93ec05e9ccSShaohui Xie
94ec05e9ccSShaohui Xie	nand@1,0 {
95ec05e9ccSShaohui Xie		compatible = "fsl,ifc-nand";
96ec05e9ccSShaohui Xie		reg = <0x1 0x0 0x10000>;
97ec05e9ccSShaohui Xie	};
98ec05e9ccSShaohui Xie
99ec05e9ccSShaohui Xie	fpga: board-control@2,0 {
100ec05e9ccSShaohui Xie		compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis";
101ec05e9ccSShaohui Xie		reg = <0x2 0x0 0x0000100>;
102ec05e9ccSShaohui Xie	};
103ec05e9ccSShaohui Xie};
104ec05e9ccSShaohui Xie
105ec05e9ccSShaohui Xie&i2c0 {
106ec05e9ccSShaohui Xie	status = "okay";
107ec05e9ccSShaohui Xie
108ec05e9ccSShaohui Xie	pca9547@77 {
109ec05e9ccSShaohui Xie		compatible = "nxp,pca9547";
110ec05e9ccSShaohui Xie		reg = <0x77>;
111ec05e9ccSShaohui Xie		#address-cells = <1>;
112ec05e9ccSShaohui Xie		#size-cells = <0>;
113ec05e9ccSShaohui Xie
114ec05e9ccSShaohui Xie		i2c@0 {
115ec05e9ccSShaohui Xie			#address-cells = <1>;
116ec05e9ccSShaohui Xie			#size-cells = <0>;
117ec05e9ccSShaohui Xie			reg = <0x0>;
118ec05e9ccSShaohui Xie
119ec05e9ccSShaohui Xie			rtc@68 {
120ec05e9ccSShaohui Xie				compatible = "dallas,ds3232";
121ec05e9ccSShaohui Xie				reg = <0x68>;
122ec05e9ccSShaohui Xie				/* IRQ10_B */
123ec05e9ccSShaohui Xie				interrupts = <0 150 0x4>;
124ec05e9ccSShaohui Xie			};
125ec05e9ccSShaohui Xie		};
126ec05e9ccSShaohui Xie
127ec05e9ccSShaohui Xie		i2c@2 {
128ec05e9ccSShaohui Xie			#address-cells = <1>;
129ec05e9ccSShaohui Xie			#size-cells = <0>;
130ec05e9ccSShaohui Xie			reg = <0x2>;
131ec05e9ccSShaohui Xie
132ec05e9ccSShaohui Xie			ina220@40 {
133ec05e9ccSShaohui Xie				compatible = "ti,ina220";
134ec05e9ccSShaohui Xie				reg = <0x40>;
135ec05e9ccSShaohui Xie				shunt-resistor = <1000>;
136ec05e9ccSShaohui Xie			};
137ec05e9ccSShaohui Xie
138ec05e9ccSShaohui Xie			ina220@41 {
139ec05e9ccSShaohui Xie				compatible = "ti,ina220";
140ec05e9ccSShaohui Xie				reg = <0x41>;
141ec05e9ccSShaohui Xie				shunt-resistor = <1000>;
142ec05e9ccSShaohui Xie			};
143ec05e9ccSShaohui Xie		};
144ec05e9ccSShaohui Xie
145ec05e9ccSShaohui Xie		i2c@3 {
146ec05e9ccSShaohui Xie			#address-cells = <1>;
147ec05e9ccSShaohui Xie			#size-cells = <0>;
148ec05e9ccSShaohui Xie			reg = <0x3>;
149ec05e9ccSShaohui Xie
150ec05e9ccSShaohui Xie			eeprom@56 {
151ec05e9ccSShaohui Xie				compatible = "atmel,24c512";
152ec05e9ccSShaohui Xie				reg = <0x56>;
153ec05e9ccSShaohui Xie			};
154ec05e9ccSShaohui Xie
155ec05e9ccSShaohui Xie			eeprom@57 {
156ec05e9ccSShaohui Xie				compatible = "atmel,24c512";
157ec05e9ccSShaohui Xie				reg = <0x57>;
158ec05e9ccSShaohui Xie			};
159ec05e9ccSShaohui Xie
160ec05e9ccSShaohui Xie			temp-sensor@4c {
161ec05e9ccSShaohui Xie				compatible = "adi,adt7461a";
162ec05e9ccSShaohui Xie				reg = <0x4c>;
163ec05e9ccSShaohui Xie			};
164ec05e9ccSShaohui Xie		};
165ec05e9ccSShaohui Xie	};
166ec05e9ccSShaohui Xie};
167ec05e9ccSShaohui Xie
168ec05e9ccSShaohui Xie&lpuart0 {
169ec05e9ccSShaohui Xie	status = "okay";
170ec05e9ccSShaohui Xie};
171e26e054bSYuan Yao
172e26e054bSYuan Yao&qspi {
173e26e054bSYuan Yao	bus-num = <0>;
174e26e054bSYuan Yao	status = "okay";
175e26e054bSYuan Yao
176e26e054bSYuan Yao	qflash0: s25fl128s@0 {
177e26e054bSYuan Yao		compatible = "spansion,m25p80";
178e26e054bSYuan Yao		#address-cells = <1>;
179e26e054bSYuan Yao		#size-cells = <1>;
180e26e054bSYuan Yao		spi-max-frequency = <20000000>;
181e26e054bSYuan Yao		reg = <0>;
182e26e054bSYuan Yao	};
183e26e054bSYuan Yao};
184*bf02f2ffSMadalin Bucur
185*bf02f2ffSMadalin Bucur#include "fsl-ls1043-post.dtsi"
186