1*7a2aeb91SLi Yang// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2ec05e9ccSShaohui Xie/* 3ec05e9ccSShaohui Xie * Device Tree Include file for Freescale Layerscape-1043A family SoC. 4ec05e9ccSShaohui Xie * 58637f58bSLi Yang * Copyright 2014-2015 Freescale Semiconductor, Inc. 6ec05e9ccSShaohui Xie * 7ec05e9ccSShaohui Xie * Mingkai Hu <Mingkai.hu@freescale.com> 8ec05e9ccSShaohui Xie */ 9ec05e9ccSShaohui Xie 10ec05e9ccSShaohui Xie/dts-v1/; 1118486552SHongtao Jia#include "fsl-ls1043a.dtsi" 12ec05e9ccSShaohui Xie 13ec05e9ccSShaohui Xie/ { 14ec05e9ccSShaohui Xie model = "LS1043A QDS Board"; 15ec05e9ccSShaohui Xie compatible = "fsl,ls1043a-qds", "fsl,ls1043a"; 16ec05e9ccSShaohui Xie 17ec05e9ccSShaohui Xie aliases { 18ec05e9ccSShaohui Xie gpio0 = &gpio1; 19ec05e9ccSShaohui Xie gpio1 = &gpio2; 20ec05e9ccSShaohui Xie gpio2 = &gpio3; 21ec05e9ccSShaohui Xie gpio3 = &gpio4; 2244605b65SStuart Yoder serial0 = &duart0; 2344605b65SStuart Yoder serial1 = &duart1; 2444605b65SStuart Yoder serial2 = &duart2; 2544605b65SStuart Yoder serial3 = &duart3; 26ec05e9ccSShaohui Xie }; 27d5c8b122SStuart Yoder 28d5c8b122SStuart Yoder chosen { 29d5c8b122SStuart Yoder stdout-path = "serial0:115200n8"; 30d5c8b122SStuart Yoder }; 31ec05e9ccSShaohui Xie}; 32ec05e9ccSShaohui Xie 33ec05e9ccSShaohui Xie&duart0 { 34ec05e9ccSShaohui Xie status = "okay"; 35ec05e9ccSShaohui Xie}; 36ec05e9ccSShaohui Xie 37ec05e9ccSShaohui Xie&duart1 { 38ec05e9ccSShaohui Xie status = "okay"; 39ec05e9ccSShaohui Xie}; 40ec05e9ccSShaohui Xie 41ec05e9ccSShaohui Xie&ifc { 42ec05e9ccSShaohui Xie #address-cells = <2>; 43ec05e9ccSShaohui Xie #size-cells = <1>; 44ec05e9ccSShaohui Xie /* NOR, NAND Flashes and FPGA on board */ 45ec05e9ccSShaohui Xie ranges = <0x0 0x0 0x0 0x60000000 0x08000000 46ec05e9ccSShaohui Xie 0x1 0x0 0x0 0x7e800000 0x00010000 47ec05e9ccSShaohui Xie 0x2 0x0 0x0 0x7fb00000 0x00000100>; 48ec05e9ccSShaohui Xie status = "okay"; 49ec05e9ccSShaohui Xie 50ec05e9ccSShaohui Xie nor@0,0 { 51ec05e9ccSShaohui Xie compatible = "cfi-flash"; 52ec05e9ccSShaohui Xie reg = <0x0 0x0 0x8000000>; 53ec05e9ccSShaohui Xie bank-width = <2>; 54ec05e9ccSShaohui Xie device-width = <1>; 55ec05e9ccSShaohui Xie }; 56ec05e9ccSShaohui Xie 57ec05e9ccSShaohui Xie nand@1,0 { 58ec05e9ccSShaohui Xie compatible = "fsl,ifc-nand"; 59ec05e9ccSShaohui Xie reg = <0x1 0x0 0x10000>; 60ec05e9ccSShaohui Xie }; 61ec05e9ccSShaohui Xie 62ec05e9ccSShaohui Xie fpga: board-control@2,0 { 63ec05e9ccSShaohui Xie compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis"; 64ec05e9ccSShaohui Xie reg = <0x2 0x0 0x0000100>; 65ec05e9ccSShaohui Xie }; 66ec05e9ccSShaohui Xie}; 67ec05e9ccSShaohui Xie 68ec05e9ccSShaohui Xie&i2c0 { 69ec05e9ccSShaohui Xie status = "okay"; 70ec05e9ccSShaohui Xie 71ec05e9ccSShaohui Xie pca9547@77 { 72ec05e9ccSShaohui Xie compatible = "nxp,pca9547"; 73ec05e9ccSShaohui Xie reg = <0x77>; 74ec05e9ccSShaohui Xie #address-cells = <1>; 75ec05e9ccSShaohui Xie #size-cells = <0>; 76ec05e9ccSShaohui Xie 77ec05e9ccSShaohui Xie i2c@0 { 78ec05e9ccSShaohui Xie #address-cells = <1>; 79ec05e9ccSShaohui Xie #size-cells = <0>; 80ec05e9ccSShaohui Xie reg = <0x0>; 81ec05e9ccSShaohui Xie 82ec05e9ccSShaohui Xie rtc@68 { 83ec05e9ccSShaohui Xie compatible = "dallas,ds3232"; 84ec05e9ccSShaohui Xie reg = <0x68>; 85ec05e9ccSShaohui Xie /* IRQ10_B */ 86ec05e9ccSShaohui Xie interrupts = <0 150 0x4>; 87ec05e9ccSShaohui Xie }; 88ec05e9ccSShaohui Xie }; 89ec05e9ccSShaohui Xie 90ec05e9ccSShaohui Xie i2c@2 { 91ec05e9ccSShaohui Xie #address-cells = <1>; 92ec05e9ccSShaohui Xie #size-cells = <0>; 93ec05e9ccSShaohui Xie reg = <0x2>; 94ec05e9ccSShaohui Xie 95ec05e9ccSShaohui Xie ina220@40 { 96ec05e9ccSShaohui Xie compatible = "ti,ina220"; 97ec05e9ccSShaohui Xie reg = <0x40>; 98ec05e9ccSShaohui Xie shunt-resistor = <1000>; 99ec05e9ccSShaohui Xie }; 100ec05e9ccSShaohui Xie 101ec05e9ccSShaohui Xie ina220@41 { 102ec05e9ccSShaohui Xie compatible = "ti,ina220"; 103ec05e9ccSShaohui Xie reg = <0x41>; 104ec05e9ccSShaohui Xie shunt-resistor = <1000>; 105ec05e9ccSShaohui Xie }; 106ec05e9ccSShaohui Xie }; 107ec05e9ccSShaohui Xie 108ec05e9ccSShaohui Xie i2c@3 { 109ec05e9ccSShaohui Xie #address-cells = <1>; 110ec05e9ccSShaohui Xie #size-cells = <0>; 111ec05e9ccSShaohui Xie reg = <0x3>; 112ec05e9ccSShaohui Xie 113ec05e9ccSShaohui Xie eeprom@56 { 114ec05e9ccSShaohui Xie compatible = "atmel,24c512"; 115ec05e9ccSShaohui Xie reg = <0x56>; 116ec05e9ccSShaohui Xie }; 117ec05e9ccSShaohui Xie 118ec05e9ccSShaohui Xie eeprom@57 { 119ec05e9ccSShaohui Xie compatible = "atmel,24c512"; 120ec05e9ccSShaohui Xie reg = <0x57>; 121ec05e9ccSShaohui Xie }; 122ec05e9ccSShaohui Xie 123ec05e9ccSShaohui Xie temp-sensor@4c { 124ec05e9ccSShaohui Xie compatible = "adi,adt7461a"; 125ec05e9ccSShaohui Xie reg = <0x4c>; 126ec05e9ccSShaohui Xie }; 127ec05e9ccSShaohui Xie }; 128ec05e9ccSShaohui Xie }; 129ec05e9ccSShaohui Xie}; 130ec05e9ccSShaohui Xie 131ec05e9ccSShaohui Xie&lpuart0 { 132ec05e9ccSShaohui Xie status = "okay"; 133ec05e9ccSShaohui Xie}; 134e26e054bSYuan Yao 135e26e054bSYuan Yao&qspi { 136e26e054bSYuan Yao bus-num = <0>; 137e26e054bSYuan Yao status = "okay"; 138e26e054bSYuan Yao 139e26e054bSYuan Yao qflash0: s25fl128s@0 { 140e26e054bSYuan Yao compatible = "spansion,m25p80"; 141e26e054bSYuan Yao #address-cells = <1>; 142e26e054bSYuan Yao #size-cells = <1>; 143e26e054bSYuan Yao spi-max-frequency = <20000000>; 144e26e054bSYuan Yao reg = <0>; 145e26e054bSYuan Yao }; 146e26e054bSYuan Yao}; 147bf02f2ffSMadalin Bucur 148bf02f2ffSMadalin Bucur#include "fsl-ls1043-post.dtsi" 149