1b4b8f2c9SClément Péron// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*cabbaed7SClément Péron// Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.xyz> 3*cabbaed7SClément Péron// Based on sun50i-a64-pine64.dts, which is: 4*cabbaed7SClément Péron// Copyright (c) 2016 ARM Ltd. 5c3904a26SIcenowy Zheng 6c3904a26SIcenowy Zheng#include "sun50i-a64.dtsi" 7c3904a26SIcenowy Zheng 8edb24ffeSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h> 9edb24ffeSEmmanuel Vadot 10498c21f2SVasily Khoruzhick&codec_analog { 1107de9094SChen-Yu Tsai cpvdd-supply = <®_eldo1>; 12498c21f2SVasily Khoruzhick}; 13498c21f2SVasily Khoruzhick 14c3904a26SIcenowy Zheng&mmc0 { 15c3904a26SIcenowy Zheng pinctrl-names = "default"; 16c3904a26SIcenowy Zheng pinctrl-0 = <&mmc0_pins>; 177d556bfcSJagan Teki vmmc-supply = <®_dcdc1>; 18c3904a26SIcenowy Zheng non-removable; 19c3904a26SIcenowy Zheng disable-wp; 20c3904a26SIcenowy Zheng bus-width = <4>; 21edb24ffeSEmmanuel Vadot cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 22c3904a26SIcenowy Zheng status = "okay"; 23c3904a26SIcenowy Zheng}; 2478c3cbc8SIcenowy Zheng 2578c3cbc8SIcenowy Zheng&r_rsb { 2678c3cbc8SIcenowy Zheng status = "okay"; 2778c3cbc8SIcenowy Zheng 2878c3cbc8SIcenowy Zheng axp803: pmic@3a3 { 2978c3cbc8SIcenowy Zheng compatible = "x-powers,axp803"; 3078c3cbc8SIcenowy Zheng reg = <0x3a3>; 3178c3cbc8SIcenowy Zheng interrupt-parent = <&r_intc>; 3278c3cbc8SIcenowy Zheng interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 3378c3cbc8SIcenowy Zheng }; 3478c3cbc8SIcenowy Zheng}; 3578c3cbc8SIcenowy Zheng 364661c3afSEmmanuel Vadot&spi0 { 374661c3afSEmmanuel Vadot status = "okay"; 384661c3afSEmmanuel Vadot 394661c3afSEmmanuel Vadot flash@0 { 404661c3afSEmmanuel Vadot #address-cells = <1>; 414661c3afSEmmanuel Vadot #size-cells = <1>; 424661c3afSEmmanuel Vadot compatible = "jedec,spi-nor"; 434661c3afSEmmanuel Vadot reg = <0>; 444661c3afSEmmanuel Vadot spi-max-frequency = <40000000>; 454661c3afSEmmanuel Vadot }; 464661c3afSEmmanuel Vadot}; 474661c3afSEmmanuel Vadot 4878c3cbc8SIcenowy Zheng#include "axp803.dtsi" 4978c3cbc8SIcenowy Zheng 5078c3cbc8SIcenowy Zheng®_aldo2 { 5178c3cbc8SIcenowy Zheng regulator-always-on; 5278c3cbc8SIcenowy Zheng regulator-min-microvolt = <1800000>; 5378c3cbc8SIcenowy Zheng regulator-max-microvolt = <3300000>; 5478c3cbc8SIcenowy Zheng regulator-name = "vcc-pl"; 5578c3cbc8SIcenowy Zheng}; 5678c3cbc8SIcenowy Zheng 5778c3cbc8SIcenowy Zheng®_aldo3 { 5878c3cbc8SIcenowy Zheng regulator-always-on; 5978c3cbc8SIcenowy Zheng regulator-min-microvolt = <3000000>; 6078c3cbc8SIcenowy Zheng regulator-max-microvolt = <3000000>; 6178c3cbc8SIcenowy Zheng regulator-name = "vcc-pll-avcc"; 6278c3cbc8SIcenowy Zheng}; 6378c3cbc8SIcenowy Zheng 6478c3cbc8SIcenowy Zheng®_dcdc1 { 6578c3cbc8SIcenowy Zheng regulator-always-on; 6678c3cbc8SIcenowy Zheng regulator-min-microvolt = <3300000>; 6778c3cbc8SIcenowy Zheng regulator-max-microvolt = <3300000>; 6878c3cbc8SIcenowy Zheng regulator-name = "vcc-3v3"; 6978c3cbc8SIcenowy Zheng}; 7078c3cbc8SIcenowy Zheng 7178c3cbc8SIcenowy Zheng®_dcdc2 { 7278c3cbc8SIcenowy Zheng regulator-always-on; 7378c3cbc8SIcenowy Zheng regulator-min-microvolt = <1040000>; 7478c3cbc8SIcenowy Zheng regulator-max-microvolt = <1300000>; 7578c3cbc8SIcenowy Zheng regulator-name = "vdd-cpux"; 7678c3cbc8SIcenowy Zheng}; 7778c3cbc8SIcenowy Zheng 7878c3cbc8SIcenowy Zheng/* DCDC3 is polyphased with DCDC2 */ 7978c3cbc8SIcenowy Zheng 8078c3cbc8SIcenowy Zheng®_dcdc5 { 8178c3cbc8SIcenowy Zheng regulator-always-on; 8278c3cbc8SIcenowy Zheng regulator-min-microvolt = <1200000>; 8378c3cbc8SIcenowy Zheng regulator-max-microvolt = <1200000>; 8478c3cbc8SIcenowy Zheng regulator-name = "vcc-dram"; 8578c3cbc8SIcenowy Zheng}; 8678c3cbc8SIcenowy Zheng 8778c3cbc8SIcenowy Zheng®_dcdc6 { 8878c3cbc8SIcenowy Zheng regulator-always-on; 8978c3cbc8SIcenowy Zheng regulator-min-microvolt = <1100000>; 9078c3cbc8SIcenowy Zheng regulator-max-microvolt = <1100000>; 9178c3cbc8SIcenowy Zheng regulator-name = "vdd-sys"; 9278c3cbc8SIcenowy Zheng}; 9378c3cbc8SIcenowy Zheng 9478c3cbc8SIcenowy Zheng®_eldo1 { 9578c3cbc8SIcenowy Zheng regulator-always-on; 9678c3cbc8SIcenowy Zheng regulator-min-microvolt = <1800000>; 9778c3cbc8SIcenowy Zheng regulator-max-microvolt = <1800000>; 9878c3cbc8SIcenowy Zheng regulator-name = "vdd-1v8-lpddr"; 9978c3cbc8SIcenowy Zheng}; 10078c3cbc8SIcenowy Zheng 10178c3cbc8SIcenowy Zheng®_fldo1 { 10278c3cbc8SIcenowy Zheng regulator-min-microvolt = <1200000>; 10378c3cbc8SIcenowy Zheng regulator-max-microvolt = <1200000>; 10478c3cbc8SIcenowy Zheng regulator-name = "vcc-1v2-hsic"; 10578c3cbc8SIcenowy Zheng}; 10678c3cbc8SIcenowy Zheng 10778c3cbc8SIcenowy Zheng/* 10878c3cbc8SIcenowy Zheng * The A64 chip cannot work without this regulator off, although 10978c3cbc8SIcenowy Zheng * it seems to be only driving the AR100 core. 11078c3cbc8SIcenowy Zheng * Maybe we don't still know well about CPUs domain. 11178c3cbc8SIcenowy Zheng */ 11278c3cbc8SIcenowy Zheng®_fldo2 { 11378c3cbc8SIcenowy Zheng regulator-always-on; 11478c3cbc8SIcenowy Zheng regulator-min-microvolt = <1100000>; 11578c3cbc8SIcenowy Zheng regulator-max-microvolt = <1100000>; 11678c3cbc8SIcenowy Zheng regulator-name = "vdd-cpus"; 11778c3cbc8SIcenowy Zheng}; 11878c3cbc8SIcenowy Zheng 11978c3cbc8SIcenowy Zheng®_rtc_ldo { 12078c3cbc8SIcenowy Zheng regulator-name = "vcc-rtc"; 12178c3cbc8SIcenowy Zheng}; 122