1c3904a26SIcenowy Zheng/* 2c3904a26SIcenowy Zheng * Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.xyz> 3c3904a26SIcenowy Zheng * 4c3904a26SIcenowy Zheng * Based on sun50i-a64-pine64.dts, which is: 5c3904a26SIcenowy Zheng * Copyright (c) 2016 ARM Ltd. 6c3904a26SIcenowy Zheng * 7c3904a26SIcenowy Zheng * This file is dual-licensed: you can use it either under the terms 8c3904a26SIcenowy Zheng * of the GPL or the X11 license, at your option. Note that this dual 9c3904a26SIcenowy Zheng * licensing only applies to this file, and not this project as a 10c3904a26SIcenowy Zheng * whole. 11c3904a26SIcenowy Zheng * 12c3904a26SIcenowy Zheng * a) This library is free software; you can redistribute it and/or 13c3904a26SIcenowy Zheng * modify it under the terms of the GNU General Public License as 14c3904a26SIcenowy Zheng * published by the Free Software Foundation; either version 2 of the 15c3904a26SIcenowy Zheng * License, or (at your option) any later version. 16c3904a26SIcenowy Zheng * 17c3904a26SIcenowy Zheng * This library is distributed in the hope that it will be useful, 18c3904a26SIcenowy Zheng * but WITHOUT ANY WARRANTY; without even the implied warranty of 19c3904a26SIcenowy Zheng * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20c3904a26SIcenowy Zheng * GNU General Public License for more details. 21c3904a26SIcenowy Zheng * 22c3904a26SIcenowy Zheng * Or, alternatively, 23c3904a26SIcenowy Zheng * 24c3904a26SIcenowy Zheng * b) Permission is hereby granted, free of charge, to any person 25c3904a26SIcenowy Zheng * obtaining a copy of this software and associated documentation 26c3904a26SIcenowy Zheng * files (the "Software"), to deal in the Software without 27c3904a26SIcenowy Zheng * restriction, including without limitation the rights to use, 28c3904a26SIcenowy Zheng * copy, modify, merge, publish, distribute, sublicense, and/or 29c3904a26SIcenowy Zheng * sell copies of the Software, and to permit persons to whom the 30c3904a26SIcenowy Zheng * Software is furnished to do so, subject to the following 31c3904a26SIcenowy Zheng * conditions: 32c3904a26SIcenowy Zheng * 33c3904a26SIcenowy Zheng * The above copyright notice and this permission notice shall be 34c3904a26SIcenowy Zheng * included in all copies or substantial portions of the Software. 35c3904a26SIcenowy Zheng * 36c3904a26SIcenowy Zheng * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 37c3904a26SIcenowy Zheng * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 38c3904a26SIcenowy Zheng * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 39c3904a26SIcenowy Zheng * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 40c3904a26SIcenowy Zheng * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 41c3904a26SIcenowy Zheng * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 42c3904a26SIcenowy Zheng * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 43c3904a26SIcenowy Zheng * OTHER DEALINGS IN THE SOFTWARE. 44c3904a26SIcenowy Zheng */ 45c3904a26SIcenowy Zheng 46c3904a26SIcenowy Zheng#include "sun50i-a64.dtsi" 47c3904a26SIcenowy Zheng 48c3904a26SIcenowy Zheng/ { 49c3904a26SIcenowy Zheng reg_vcc3v3: vcc3v3 { 50c3904a26SIcenowy Zheng compatible = "regulator-fixed"; 51c3904a26SIcenowy Zheng regulator-name = "vcc3v3"; 52c3904a26SIcenowy Zheng regulator-min-microvolt = <3300000>; 53c3904a26SIcenowy Zheng regulator-max-microvolt = <3300000>; 54c3904a26SIcenowy Zheng }; 55c3904a26SIcenowy Zheng}; 56c3904a26SIcenowy Zheng 57c3904a26SIcenowy Zheng&mmc0 { 58c3904a26SIcenowy Zheng pinctrl-names = "default"; 59c3904a26SIcenowy Zheng pinctrl-0 = <&mmc0_pins>; 60c3904a26SIcenowy Zheng vmmc-supply = <®_vcc3v3>; 61c3904a26SIcenowy Zheng non-removable; 62c3904a26SIcenowy Zheng disable-wp; 63c3904a26SIcenowy Zheng bus-width = <4>; 64c3904a26SIcenowy Zheng status = "okay"; 65c3904a26SIcenowy Zheng}; 66*78c3cbc8SIcenowy Zheng 67*78c3cbc8SIcenowy Zheng&r_rsb { 68*78c3cbc8SIcenowy Zheng status = "okay"; 69*78c3cbc8SIcenowy Zheng 70*78c3cbc8SIcenowy Zheng axp803: pmic@3a3 { 71*78c3cbc8SIcenowy Zheng compatible = "x-powers,axp803"; 72*78c3cbc8SIcenowy Zheng reg = <0x3a3>; 73*78c3cbc8SIcenowy Zheng interrupt-parent = <&r_intc>; 74*78c3cbc8SIcenowy Zheng interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 75*78c3cbc8SIcenowy Zheng }; 76*78c3cbc8SIcenowy Zheng}; 77*78c3cbc8SIcenowy Zheng 78*78c3cbc8SIcenowy Zheng#include "axp803.dtsi" 79*78c3cbc8SIcenowy Zheng 80*78c3cbc8SIcenowy Zheng®_aldo2 { 81*78c3cbc8SIcenowy Zheng regulator-always-on; 82*78c3cbc8SIcenowy Zheng regulator-min-microvolt = <1800000>; 83*78c3cbc8SIcenowy Zheng regulator-max-microvolt = <3300000>; 84*78c3cbc8SIcenowy Zheng regulator-name = "vcc-pl"; 85*78c3cbc8SIcenowy Zheng}; 86*78c3cbc8SIcenowy Zheng 87*78c3cbc8SIcenowy Zheng®_aldo3 { 88*78c3cbc8SIcenowy Zheng regulator-always-on; 89*78c3cbc8SIcenowy Zheng regulator-min-microvolt = <3000000>; 90*78c3cbc8SIcenowy Zheng regulator-max-microvolt = <3000000>; 91*78c3cbc8SIcenowy Zheng regulator-name = "vcc-pll-avcc"; 92*78c3cbc8SIcenowy Zheng}; 93*78c3cbc8SIcenowy Zheng 94*78c3cbc8SIcenowy Zheng®_dcdc1 { 95*78c3cbc8SIcenowy Zheng regulator-always-on; 96*78c3cbc8SIcenowy Zheng regulator-min-microvolt = <3300000>; 97*78c3cbc8SIcenowy Zheng regulator-max-microvolt = <3300000>; 98*78c3cbc8SIcenowy Zheng regulator-name = "vcc-3v3"; 99*78c3cbc8SIcenowy Zheng}; 100*78c3cbc8SIcenowy Zheng 101*78c3cbc8SIcenowy Zheng®_dcdc2 { 102*78c3cbc8SIcenowy Zheng regulator-always-on; 103*78c3cbc8SIcenowy Zheng regulator-min-microvolt = <1040000>; 104*78c3cbc8SIcenowy Zheng regulator-max-microvolt = <1300000>; 105*78c3cbc8SIcenowy Zheng regulator-name = "vdd-cpux"; 106*78c3cbc8SIcenowy Zheng}; 107*78c3cbc8SIcenowy Zheng 108*78c3cbc8SIcenowy Zheng/* DCDC3 is polyphased with DCDC2 */ 109*78c3cbc8SIcenowy Zheng 110*78c3cbc8SIcenowy Zheng®_dcdc5 { 111*78c3cbc8SIcenowy Zheng regulator-always-on; 112*78c3cbc8SIcenowy Zheng regulator-min-microvolt = <1200000>; 113*78c3cbc8SIcenowy Zheng regulator-max-microvolt = <1200000>; 114*78c3cbc8SIcenowy Zheng regulator-name = "vcc-dram"; 115*78c3cbc8SIcenowy Zheng}; 116*78c3cbc8SIcenowy Zheng 117*78c3cbc8SIcenowy Zheng®_dcdc6 { 118*78c3cbc8SIcenowy Zheng regulator-always-on; 119*78c3cbc8SIcenowy Zheng regulator-min-microvolt = <1100000>; 120*78c3cbc8SIcenowy Zheng regulator-max-microvolt = <1100000>; 121*78c3cbc8SIcenowy Zheng regulator-name = "vdd-sys"; 122*78c3cbc8SIcenowy Zheng}; 123*78c3cbc8SIcenowy Zheng 124*78c3cbc8SIcenowy Zheng®_eldo1 { 125*78c3cbc8SIcenowy Zheng regulator-always-on; 126*78c3cbc8SIcenowy Zheng regulator-min-microvolt = <1800000>; 127*78c3cbc8SIcenowy Zheng regulator-max-microvolt = <1800000>; 128*78c3cbc8SIcenowy Zheng regulator-name = "vdd-1v8-lpddr"; 129*78c3cbc8SIcenowy Zheng}; 130*78c3cbc8SIcenowy Zheng 131*78c3cbc8SIcenowy Zheng®_fldo1 { 132*78c3cbc8SIcenowy Zheng regulator-min-microvolt = <1200000>; 133*78c3cbc8SIcenowy Zheng regulator-max-microvolt = <1200000>; 134*78c3cbc8SIcenowy Zheng regulator-name = "vcc-1v2-hsic"; 135*78c3cbc8SIcenowy Zheng}; 136*78c3cbc8SIcenowy Zheng 137*78c3cbc8SIcenowy Zheng/* 138*78c3cbc8SIcenowy Zheng * The A64 chip cannot work without this regulator off, although 139*78c3cbc8SIcenowy Zheng * it seems to be only driving the AR100 core. 140*78c3cbc8SIcenowy Zheng * Maybe we don't still know well about CPUs domain. 141*78c3cbc8SIcenowy Zheng */ 142*78c3cbc8SIcenowy Zheng®_fldo2 { 143*78c3cbc8SIcenowy Zheng regulator-always-on; 144*78c3cbc8SIcenowy Zheng regulator-min-microvolt = <1100000>; 145*78c3cbc8SIcenowy Zheng regulator-max-microvolt = <1100000>; 146*78c3cbc8SIcenowy Zheng regulator-name = "vdd-cpus"; 147*78c3cbc8SIcenowy Zheng}; 148*78c3cbc8SIcenowy Zheng 149*78c3cbc8SIcenowy Zheng®_rtc_ldo { 150*78c3cbc8SIcenowy Zheng regulator-name = "vcc-rtc"; 151*78c3cbc8SIcenowy Zheng}; 152