xref: /openbmc/linux/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi (revision 8be98d2f2a0a262f8bf8a0bc1fdf522b3c7aab17)
1b4b8f2c9SClément Péron// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2cabbaed7SClément Péron// Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.xyz>
3cabbaed7SClément Péron// Based on sun50i-a64-pine64.dts, which is:
4cabbaed7SClément Péron//   Copyright (c) 2016 ARM Ltd.
5c3904a26SIcenowy Zheng
6c3904a26SIcenowy Zheng#include "sun50i-a64.dtsi"
7ac904843SVasily Khoruzhick#include "sun50i-a64-cpu-opp.dtsi"
8c3904a26SIcenowy Zheng
9edb24ffeSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h>
10edb24ffeSEmmanuel Vadot
11498c21f2SVasily Khoruzhick&codec_analog {
1207de9094SChen-Yu Tsai	cpvdd-supply = <&reg_eldo1>;
13498c21f2SVasily Khoruzhick};
14498c21f2SVasily Khoruzhick
15ac904843SVasily Khoruzhick&cpu0 {
16ac904843SVasily Khoruzhick	cpu-supply = <&reg_dcdc2>;
17ac904843SVasily Khoruzhick};
18ac904843SVasily Khoruzhick
19ac904843SVasily Khoruzhick&cpu1 {
20ac904843SVasily Khoruzhick	cpu-supply = <&reg_dcdc2>;
21ac904843SVasily Khoruzhick};
22ac904843SVasily Khoruzhick
23ac904843SVasily Khoruzhick&cpu2 {
24ac904843SVasily Khoruzhick	cpu-supply = <&reg_dcdc2>;
25ac904843SVasily Khoruzhick};
26ac904843SVasily Khoruzhick
27ac904843SVasily Khoruzhick&cpu3 {
28ac904843SVasily Khoruzhick	cpu-supply = <&reg_dcdc2>;
29ac904843SVasily Khoruzhick};
30ac904843SVasily Khoruzhick
31c3904a26SIcenowy Zheng&mmc0 {
32c3904a26SIcenowy Zheng	pinctrl-names = "default";
33c3904a26SIcenowy Zheng	pinctrl-0 = <&mmc0_pins>;
347d556bfcSJagan Teki	vmmc-supply = <&reg_dcdc1>;
35c3904a26SIcenowy Zheng	disable-wp;
36c3904a26SIcenowy Zheng	bus-width = <4>;
37*3dd4ce41SAndre Przywara	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 push-pull switch */
38c3904a26SIcenowy Zheng	status = "okay";
39c3904a26SIcenowy Zheng};
4078c3cbc8SIcenowy Zheng
4178c3cbc8SIcenowy Zheng&r_rsb {
4278c3cbc8SIcenowy Zheng	status = "okay";
4378c3cbc8SIcenowy Zheng
4478c3cbc8SIcenowy Zheng	axp803: pmic@3a3 {
4578c3cbc8SIcenowy Zheng		compatible = "x-powers,axp803";
4678c3cbc8SIcenowy Zheng		reg = <0x3a3>;
4778c3cbc8SIcenowy Zheng		interrupt-parent = <&r_intc>;
4873088dfeSSamuel Holland		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
4978c3cbc8SIcenowy Zheng	};
5078c3cbc8SIcenowy Zheng};
5178c3cbc8SIcenowy Zheng
524661c3afSEmmanuel Vadot&spi0  {
534661c3afSEmmanuel Vadot	status = "okay";
544661c3afSEmmanuel Vadot
554661c3afSEmmanuel Vadot	flash@0 {
564661c3afSEmmanuel Vadot		#address-cells = <1>;
574661c3afSEmmanuel Vadot		#size-cells = <1>;
584661c3afSEmmanuel Vadot		compatible = "jedec,spi-nor";
594661c3afSEmmanuel Vadot		reg = <0>;
604661c3afSEmmanuel Vadot		spi-max-frequency = <40000000>;
614661c3afSEmmanuel Vadot	};
624661c3afSEmmanuel Vadot};
634661c3afSEmmanuel Vadot
6478c3cbc8SIcenowy Zheng#include "axp803.dtsi"
6578c3cbc8SIcenowy Zheng
6678c3cbc8SIcenowy Zheng&reg_aldo2 {
6778c3cbc8SIcenowy Zheng	regulator-always-on;
6878c3cbc8SIcenowy Zheng	regulator-min-microvolt = <1800000>;
6978c3cbc8SIcenowy Zheng	regulator-max-microvolt = <3300000>;
7078c3cbc8SIcenowy Zheng	regulator-name = "vcc-pl";
7178c3cbc8SIcenowy Zheng};
7278c3cbc8SIcenowy Zheng
7378c3cbc8SIcenowy Zheng&reg_aldo3 {
7478c3cbc8SIcenowy Zheng	regulator-always-on;
7578c3cbc8SIcenowy Zheng	regulator-min-microvolt = <3000000>;
7678c3cbc8SIcenowy Zheng	regulator-max-microvolt = <3000000>;
7778c3cbc8SIcenowy Zheng	regulator-name = "vcc-pll-avcc";
7878c3cbc8SIcenowy Zheng};
7978c3cbc8SIcenowy Zheng
8078c3cbc8SIcenowy Zheng&reg_dcdc1 {
8178c3cbc8SIcenowy Zheng	regulator-always-on;
8278c3cbc8SIcenowy Zheng	regulator-min-microvolt = <3300000>;
8378c3cbc8SIcenowy Zheng	regulator-max-microvolt = <3300000>;
8478c3cbc8SIcenowy Zheng	regulator-name = "vcc-3v3";
8578c3cbc8SIcenowy Zheng};
8678c3cbc8SIcenowy Zheng
8778c3cbc8SIcenowy Zheng&reg_dcdc2 {
8878c3cbc8SIcenowy Zheng	regulator-always-on;
8978c3cbc8SIcenowy Zheng	regulator-min-microvolt = <1040000>;
9078c3cbc8SIcenowy Zheng	regulator-max-microvolt = <1300000>;
9178c3cbc8SIcenowy Zheng	regulator-name = "vdd-cpux";
9278c3cbc8SIcenowy Zheng};
9378c3cbc8SIcenowy Zheng
9478c3cbc8SIcenowy Zheng/* DCDC3 is polyphased with DCDC2 */
9578c3cbc8SIcenowy Zheng
9678c3cbc8SIcenowy Zheng&reg_dcdc5 {
9778c3cbc8SIcenowy Zheng	regulator-always-on;
9878c3cbc8SIcenowy Zheng	regulator-min-microvolt = <1200000>;
9978c3cbc8SIcenowy Zheng	regulator-max-microvolt = <1200000>;
10078c3cbc8SIcenowy Zheng	regulator-name = "vcc-dram";
10178c3cbc8SIcenowy Zheng};
10278c3cbc8SIcenowy Zheng
10378c3cbc8SIcenowy Zheng&reg_dcdc6 {
10478c3cbc8SIcenowy Zheng	regulator-always-on;
10578c3cbc8SIcenowy Zheng	regulator-min-microvolt = <1100000>;
10678c3cbc8SIcenowy Zheng	regulator-max-microvolt = <1100000>;
10778c3cbc8SIcenowy Zheng	regulator-name = "vdd-sys";
10878c3cbc8SIcenowy Zheng};
10978c3cbc8SIcenowy Zheng
11078c3cbc8SIcenowy Zheng&reg_eldo1 {
11178c3cbc8SIcenowy Zheng	regulator-always-on;
11278c3cbc8SIcenowy Zheng	regulator-min-microvolt = <1800000>;
11378c3cbc8SIcenowy Zheng	regulator-max-microvolt = <1800000>;
11478c3cbc8SIcenowy Zheng	regulator-name = "vdd-1v8-lpddr";
11578c3cbc8SIcenowy Zheng};
11678c3cbc8SIcenowy Zheng
11778c3cbc8SIcenowy Zheng&reg_fldo1 {
11878c3cbc8SIcenowy Zheng	regulator-min-microvolt = <1200000>;
11978c3cbc8SIcenowy Zheng	regulator-max-microvolt = <1200000>;
12078c3cbc8SIcenowy Zheng	regulator-name = "vcc-1v2-hsic";
12178c3cbc8SIcenowy Zheng};
12278c3cbc8SIcenowy Zheng
12378c3cbc8SIcenowy Zheng/*
12478c3cbc8SIcenowy Zheng * The A64 chip cannot work without this regulator off, although
12578c3cbc8SIcenowy Zheng * it seems to be only driving the AR100 core.
12678c3cbc8SIcenowy Zheng * Maybe we don't still know well about CPUs domain.
12778c3cbc8SIcenowy Zheng */
12878c3cbc8SIcenowy Zheng&reg_fldo2 {
12978c3cbc8SIcenowy Zheng	regulator-always-on;
13078c3cbc8SIcenowy Zheng	regulator-min-microvolt = <1100000>;
13178c3cbc8SIcenowy Zheng	regulator-max-microvolt = <1100000>;
13278c3cbc8SIcenowy Zheng	regulator-name = "vdd-cpus";
13378c3cbc8SIcenowy Zheng};
13478c3cbc8SIcenowy Zheng
13578c3cbc8SIcenowy Zheng&reg_rtc_ldo {
13678c3cbc8SIcenowy Zheng	regulator-name = "vcc-rtc";
13778c3cbc8SIcenowy Zheng};
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