xref: /openbmc/linux/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts (revision 674ef1d0a7b23681699994a892a1ed508c7df122)
1*674ef1d0SIcenowy Zheng// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*674ef1d0SIcenowy Zheng/*
3*674ef1d0SIcenowy Zheng * Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.xyz>
4*674ef1d0SIcenowy Zheng *
5*674ef1d0SIcenowy Zheng */
6*674ef1d0SIcenowy Zheng
7*674ef1d0SIcenowy Zheng/dts-v1/;
8*674ef1d0SIcenowy Zheng
9*674ef1d0SIcenowy Zheng#include "sun50i-a64.dtsi"
10*674ef1d0SIcenowy Zheng#include "sun50i-a64-cpu-opp.dtsi"
11*674ef1d0SIcenowy Zheng
12*674ef1d0SIcenowy Zheng#include <dt-bindings/gpio/gpio.h>
13*674ef1d0SIcenowy Zheng#include <dt-bindings/input/input.h>
14*674ef1d0SIcenowy Zheng#include <dt-bindings/pwm/pwm.h>
15*674ef1d0SIcenowy Zheng
16*674ef1d0SIcenowy Zheng/ {
17*674ef1d0SIcenowy Zheng	model = "PineTab";
18*674ef1d0SIcenowy Zheng	compatible = "pine64,pinetab", "allwinner,sun50i-a64";
19*674ef1d0SIcenowy Zheng
20*674ef1d0SIcenowy Zheng	aliases {
21*674ef1d0SIcenowy Zheng		serial0 = &uart0;
22*674ef1d0SIcenowy Zheng		ethernet0 = &rtl8723cs;
23*674ef1d0SIcenowy Zheng	};
24*674ef1d0SIcenowy Zheng
25*674ef1d0SIcenowy Zheng	backlight: backlight {
26*674ef1d0SIcenowy Zheng		compatible = "pwm-backlight";
27*674ef1d0SIcenowy Zheng		pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
28*674ef1d0SIcenowy Zheng		brightness-levels = <0 16 18 20 22 24 26 29 32 35 38 42 46 51 56 62 68 75 83 91 100>;
29*674ef1d0SIcenowy Zheng		default-brightness-level = <15>;
30*674ef1d0SIcenowy Zheng		enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
31*674ef1d0SIcenowy Zheng		power-supply = <&vdd_bl>;
32*674ef1d0SIcenowy Zheng	};
33*674ef1d0SIcenowy Zheng
34*674ef1d0SIcenowy Zheng	chosen {
35*674ef1d0SIcenowy Zheng		stdout-path = "serial0:115200n8";
36*674ef1d0SIcenowy Zheng	};
37*674ef1d0SIcenowy Zheng
38*674ef1d0SIcenowy Zheng	i2c-csi {
39*674ef1d0SIcenowy Zheng		compatible = "i2c-gpio";
40*674ef1d0SIcenowy Zheng		sda-gpios = <&pio 4 13 GPIO_ACTIVE_HIGH>; /* PE13 */
41*674ef1d0SIcenowy Zheng		scl-gpios = <&pio 4 12 GPIO_ACTIVE_HIGH>; /* PE12 */
42*674ef1d0SIcenowy Zheng		i2c-gpio,delay-us = <5>;
43*674ef1d0SIcenowy Zheng		#address-cells = <1>;
44*674ef1d0SIcenowy Zheng		#size-cells = <0>;
45*674ef1d0SIcenowy Zheng
46*674ef1d0SIcenowy Zheng		/* Rear camera */
47*674ef1d0SIcenowy Zheng		ov5640: camera@3c {
48*674ef1d0SIcenowy Zheng			compatible = "ovti,ov5640";
49*674ef1d0SIcenowy Zheng			reg = <0x3c>;
50*674ef1d0SIcenowy Zheng			pinctrl-names = "default";
51*674ef1d0SIcenowy Zheng			pinctrl-0 = <&csi_mclk_pin>;
52*674ef1d0SIcenowy Zheng			clocks = <&ccu CLK_CSI_MCLK>;
53*674ef1d0SIcenowy Zheng			clock-names = "xclk";
54*674ef1d0SIcenowy Zheng
55*674ef1d0SIcenowy Zheng			AVDD-supply = <&reg_dldo3>;
56*674ef1d0SIcenowy Zheng			DOVDD-supply = <&reg_aldo1>;
57*674ef1d0SIcenowy Zheng			DVDD-supply = <&reg_eldo3>;
58*674ef1d0SIcenowy Zheng			reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>; /* PE14 */
59*674ef1d0SIcenowy Zheng			powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */
60*674ef1d0SIcenowy Zheng
61*674ef1d0SIcenowy Zheng			port {
62*674ef1d0SIcenowy Zheng				ov5640_ep: endpoint {
63*674ef1d0SIcenowy Zheng					remote-endpoint = <&csi_ep>;
64*674ef1d0SIcenowy Zheng					bus-width = <8>;
65*674ef1d0SIcenowy Zheng					hsync-active = <1>; /* Active high */
66*674ef1d0SIcenowy Zheng					vsync-active = <0>; /* Active low */
67*674ef1d0SIcenowy Zheng					data-active = <1>;  /* Active high */
68*674ef1d0SIcenowy Zheng					pclk-sample = <1>;  /* Rising */
69*674ef1d0SIcenowy Zheng				};
70*674ef1d0SIcenowy Zheng			};
71*674ef1d0SIcenowy Zheng		};
72*674ef1d0SIcenowy Zheng	};
73*674ef1d0SIcenowy Zheng
74*674ef1d0SIcenowy Zheng	speaker_amp: audio-amplifier {
75*674ef1d0SIcenowy Zheng		compatible = "simple-audio-amplifier";
76*674ef1d0SIcenowy Zheng		enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
77*674ef1d0SIcenowy Zheng		sound-name-prefix = "Speaker Amp";
78*674ef1d0SIcenowy Zheng	};
79*674ef1d0SIcenowy Zheng
80*674ef1d0SIcenowy Zheng	vdd_bl: regulator@0 {
81*674ef1d0SIcenowy Zheng		compatible = "regulator-fixed";
82*674ef1d0SIcenowy Zheng		regulator-name = "bl-3v3";
83*674ef1d0SIcenowy Zheng		regulator-min-microvolt = <3300000>;
84*674ef1d0SIcenowy Zheng		regulator-max-microvolt = <3300000>;
85*674ef1d0SIcenowy Zheng		gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
86*674ef1d0SIcenowy Zheng		enable-active-high;
87*674ef1d0SIcenowy Zheng	};
88*674ef1d0SIcenowy Zheng
89*674ef1d0SIcenowy Zheng	wifi_pwrseq: wifi_pwrseq {
90*674ef1d0SIcenowy Zheng		compatible = "mmc-pwrseq-simple";
91*674ef1d0SIcenowy Zheng		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
92*674ef1d0SIcenowy Zheng		post-power-on-delay-ms = <200>;
93*674ef1d0SIcenowy Zheng	};
94*674ef1d0SIcenowy Zheng};
95*674ef1d0SIcenowy Zheng
96*674ef1d0SIcenowy Zheng&codec {
97*674ef1d0SIcenowy Zheng	status = "okay";
98*674ef1d0SIcenowy Zheng};
99*674ef1d0SIcenowy Zheng
100*674ef1d0SIcenowy Zheng&codec_analog {
101*674ef1d0SIcenowy Zheng	hpvcc-supply = <&reg_eldo1>;
102*674ef1d0SIcenowy Zheng	status = "okay";
103*674ef1d0SIcenowy Zheng};
104*674ef1d0SIcenowy Zheng
105*674ef1d0SIcenowy Zheng&cpu0 {
106*674ef1d0SIcenowy Zheng	cpu-supply = <&reg_dcdc2>;
107*674ef1d0SIcenowy Zheng};
108*674ef1d0SIcenowy Zheng
109*674ef1d0SIcenowy Zheng&cpu1 {
110*674ef1d0SIcenowy Zheng	cpu-supply = <&reg_dcdc2>;
111*674ef1d0SIcenowy Zheng};
112*674ef1d0SIcenowy Zheng
113*674ef1d0SIcenowy Zheng&cpu2 {
114*674ef1d0SIcenowy Zheng	cpu-supply = <&reg_dcdc2>;
115*674ef1d0SIcenowy Zheng};
116*674ef1d0SIcenowy Zheng
117*674ef1d0SIcenowy Zheng&cpu3 {
118*674ef1d0SIcenowy Zheng	cpu-supply = <&reg_dcdc2>;
119*674ef1d0SIcenowy Zheng};
120*674ef1d0SIcenowy Zheng
121*674ef1d0SIcenowy Zheng&csi {
122*674ef1d0SIcenowy Zheng	status = "okay";
123*674ef1d0SIcenowy Zheng
124*674ef1d0SIcenowy Zheng	port {
125*674ef1d0SIcenowy Zheng		#address-cells = <1>;
126*674ef1d0SIcenowy Zheng		#size-cells = <0>;
127*674ef1d0SIcenowy Zheng
128*674ef1d0SIcenowy Zheng		csi_ep: endpoint {
129*674ef1d0SIcenowy Zheng			remote-endpoint = <&ov5640_ep>;
130*674ef1d0SIcenowy Zheng			bus-width = <8>;
131*674ef1d0SIcenowy Zheng			hsync-active = <1>; /* Active high */
132*674ef1d0SIcenowy Zheng			vsync-active = <0>; /* Active low */
133*674ef1d0SIcenowy Zheng			data-active = <1>;  /* Active high */
134*674ef1d0SIcenowy Zheng			pclk-sample = <1>;  /* Rising */
135*674ef1d0SIcenowy Zheng		};
136*674ef1d0SIcenowy Zheng	};
137*674ef1d0SIcenowy Zheng};
138*674ef1d0SIcenowy Zheng
139*674ef1d0SIcenowy Zheng&dai {
140*674ef1d0SIcenowy Zheng	status = "okay";
141*674ef1d0SIcenowy Zheng};
142*674ef1d0SIcenowy Zheng
143*674ef1d0SIcenowy Zheng&de {
144*674ef1d0SIcenowy Zheng	status = "okay";
145*674ef1d0SIcenowy Zheng};
146*674ef1d0SIcenowy Zheng
147*674ef1d0SIcenowy Zheng&dphy {
148*674ef1d0SIcenowy Zheng	status = "okay";
149*674ef1d0SIcenowy Zheng};
150*674ef1d0SIcenowy Zheng
151*674ef1d0SIcenowy Zheng&dsi {
152*674ef1d0SIcenowy Zheng	vcc-dsi-supply = <&reg_dldo1>;
153*674ef1d0SIcenowy Zheng	status = "okay";
154*674ef1d0SIcenowy Zheng
155*674ef1d0SIcenowy Zheng	panel@0 {
156*674ef1d0SIcenowy Zheng		compatible = "feixin,k101-im2ba02";
157*674ef1d0SIcenowy Zheng		reg = <0>;
158*674ef1d0SIcenowy Zheng		avdd-supply = <&reg_dc1sw>;
159*674ef1d0SIcenowy Zheng		dvdd-supply = <&reg_dc1sw>;
160*674ef1d0SIcenowy Zheng		cvdd-supply = <&reg_ldo_io1>;
161*674ef1d0SIcenowy Zheng		reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
162*674ef1d0SIcenowy Zheng		backlight = <&backlight>;
163*674ef1d0SIcenowy Zheng	};
164*674ef1d0SIcenowy Zheng};
165*674ef1d0SIcenowy Zheng
166*674ef1d0SIcenowy Zheng&ehci0 {
167*674ef1d0SIcenowy Zheng	status = "okay";
168*674ef1d0SIcenowy Zheng};
169*674ef1d0SIcenowy Zheng
170*674ef1d0SIcenowy Zheng&ehci1 {
171*674ef1d0SIcenowy Zheng	status = "okay";
172*674ef1d0SIcenowy Zheng};
173*674ef1d0SIcenowy Zheng
174*674ef1d0SIcenowy Zheng&i2c0 {
175*674ef1d0SIcenowy Zheng	status = "okay";
176*674ef1d0SIcenowy Zheng
177*674ef1d0SIcenowy Zheng	touchscreen@5d {
178*674ef1d0SIcenowy Zheng		compatible = "goodix,gt9271";
179*674ef1d0SIcenowy Zheng		reg = <0x5d>;
180*674ef1d0SIcenowy Zheng		interrupt-parent = <&pio>;
181*674ef1d0SIcenowy Zheng		interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */
182*674ef1d0SIcenowy Zheng		irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
183*674ef1d0SIcenowy Zheng		reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */
184*674ef1d0SIcenowy Zheng		AVDD28-supply = <&reg_ldo_io1>;
185*674ef1d0SIcenowy Zheng	};
186*674ef1d0SIcenowy Zheng};
187*674ef1d0SIcenowy Zheng
188*674ef1d0SIcenowy Zheng&i2c0_pins {
189*674ef1d0SIcenowy Zheng	bias-pull-up;
190*674ef1d0SIcenowy Zheng};
191*674ef1d0SIcenowy Zheng
192*674ef1d0SIcenowy Zheng&i2c1 {
193*674ef1d0SIcenowy Zheng	status = "okay";
194*674ef1d0SIcenowy Zheng
195*674ef1d0SIcenowy Zheng	/* TODO: add Bochs BMA223 accelerometer here */
196*674ef1d0SIcenowy Zheng};
197*674ef1d0SIcenowy Zheng
198*674ef1d0SIcenowy Zheng&lradc {
199*674ef1d0SIcenowy Zheng	vref-supply = <&reg_aldo3>;
200*674ef1d0SIcenowy Zheng	status = "okay";
201*674ef1d0SIcenowy Zheng
202*674ef1d0SIcenowy Zheng	button-200 {
203*674ef1d0SIcenowy Zheng		label = "Volume Up";
204*674ef1d0SIcenowy Zheng		linux,code = <KEY_VOLUMEUP>;
205*674ef1d0SIcenowy Zheng		channel = <0>;
206*674ef1d0SIcenowy Zheng		voltage = <200000>;
207*674ef1d0SIcenowy Zheng	};
208*674ef1d0SIcenowy Zheng
209*674ef1d0SIcenowy Zheng	button-400 {
210*674ef1d0SIcenowy Zheng		label = "Volume Down";
211*674ef1d0SIcenowy Zheng		linux,code = <KEY_VOLUMEDOWN>;
212*674ef1d0SIcenowy Zheng		channel = <0>;
213*674ef1d0SIcenowy Zheng		voltage = <400000>;
214*674ef1d0SIcenowy Zheng	};
215*674ef1d0SIcenowy Zheng};
216*674ef1d0SIcenowy Zheng
217*674ef1d0SIcenowy Zheng&mixer1 {
218*674ef1d0SIcenowy Zheng	status = "okay";
219*674ef1d0SIcenowy Zheng};
220*674ef1d0SIcenowy Zheng
221*674ef1d0SIcenowy Zheng&mmc0 {
222*674ef1d0SIcenowy Zheng	pinctrl-names = "default";
223*674ef1d0SIcenowy Zheng	pinctrl-0 = <&mmc0_pins>;
224*674ef1d0SIcenowy Zheng	vmmc-supply = <&reg_dcdc1>;
225*674ef1d0SIcenowy Zheng	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
226*674ef1d0SIcenowy Zheng	disable-wp;
227*674ef1d0SIcenowy Zheng	bus-width = <4>;
228*674ef1d0SIcenowy Zheng	status = "okay";
229*674ef1d0SIcenowy Zheng};
230*674ef1d0SIcenowy Zheng
231*674ef1d0SIcenowy Zheng&mmc1 {
232*674ef1d0SIcenowy Zheng	pinctrl-names = "default";
233*674ef1d0SIcenowy Zheng	pinctrl-0 = <&mmc1_pins>;
234*674ef1d0SIcenowy Zheng	vmmc-supply = <&reg_dldo4>;
235*674ef1d0SIcenowy Zheng	vqmmc-supply = <&reg_eldo1>;
236*674ef1d0SIcenowy Zheng	mmc-pwrseq = <&wifi_pwrseq>;
237*674ef1d0SIcenowy Zheng	bus-width = <4>;
238*674ef1d0SIcenowy Zheng	non-removable;
239*674ef1d0SIcenowy Zheng	status = "okay";
240*674ef1d0SIcenowy Zheng
241*674ef1d0SIcenowy Zheng	rtl8723cs: wifi@1 {
242*674ef1d0SIcenowy Zheng		reg = <1>;
243*674ef1d0SIcenowy Zheng	};
244*674ef1d0SIcenowy Zheng};
245*674ef1d0SIcenowy Zheng
246*674ef1d0SIcenowy Zheng&mmc2 {
247*674ef1d0SIcenowy Zheng	pinctrl-names = "default";
248*674ef1d0SIcenowy Zheng	pinctrl-0 = <&mmc2_pins>;
249*674ef1d0SIcenowy Zheng	vmmc-supply = <&reg_dcdc1>;
250*674ef1d0SIcenowy Zheng	vqmmc-supply = <&reg_dcdc1>;
251*674ef1d0SIcenowy Zheng	bus-width = <8>;
252*674ef1d0SIcenowy Zheng	non-removable;
253*674ef1d0SIcenowy Zheng	cap-mmc-hw-reset;
254*674ef1d0SIcenowy Zheng	status = "okay";
255*674ef1d0SIcenowy Zheng};
256*674ef1d0SIcenowy Zheng
257*674ef1d0SIcenowy Zheng&ohci0 {
258*674ef1d0SIcenowy Zheng	status = "okay";
259*674ef1d0SIcenowy Zheng};
260*674ef1d0SIcenowy Zheng
261*674ef1d0SIcenowy Zheng&pwm {
262*674ef1d0SIcenowy Zheng	status = "okay";
263*674ef1d0SIcenowy Zheng};
264*674ef1d0SIcenowy Zheng
265*674ef1d0SIcenowy Zheng&r_rsb {
266*674ef1d0SIcenowy Zheng	status = "okay";
267*674ef1d0SIcenowy Zheng
268*674ef1d0SIcenowy Zheng	axp803: pmic@3a3 {
269*674ef1d0SIcenowy Zheng		compatible = "x-powers,axp803";
270*674ef1d0SIcenowy Zheng		reg = <0x3a3>;
271*674ef1d0SIcenowy Zheng		interrupt-parent = <&r_intc>;
272*674ef1d0SIcenowy Zheng		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
273*674ef1d0SIcenowy Zheng		x-powers,drive-vbus-en;
274*674ef1d0SIcenowy Zheng	};
275*674ef1d0SIcenowy Zheng};
276*674ef1d0SIcenowy Zheng
277*674ef1d0SIcenowy Zheng#include "axp803.dtsi"
278*674ef1d0SIcenowy Zheng
279*674ef1d0SIcenowy Zheng&ac_power_supply {
280*674ef1d0SIcenowy Zheng	status = "okay";
281*674ef1d0SIcenowy Zheng};
282*674ef1d0SIcenowy Zheng
283*674ef1d0SIcenowy Zheng&battery_power_supply {
284*674ef1d0SIcenowy Zheng	status = "okay";
285*674ef1d0SIcenowy Zheng};
286*674ef1d0SIcenowy Zheng
287*674ef1d0SIcenowy Zheng&reg_aldo1 {
288*674ef1d0SIcenowy Zheng	regulator-min-microvolt = <2800000>;
289*674ef1d0SIcenowy Zheng	regulator-max-microvolt = <2800000>;
290*674ef1d0SIcenowy Zheng	regulator-name = "dovdd-csi";
291*674ef1d0SIcenowy Zheng};
292*674ef1d0SIcenowy Zheng
293*674ef1d0SIcenowy Zheng&reg_aldo2 {
294*674ef1d0SIcenowy Zheng	regulator-always-on;
295*674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1800000>;
296*674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
297*674ef1d0SIcenowy Zheng	regulator-name = "vcc-pl";
298*674ef1d0SIcenowy Zheng};
299*674ef1d0SIcenowy Zheng
300*674ef1d0SIcenowy Zheng&reg_aldo3 {
301*674ef1d0SIcenowy Zheng	regulator-always-on;
302*674ef1d0SIcenowy Zheng	regulator-min-microvolt = <2700000>;
303*674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
304*674ef1d0SIcenowy Zheng	regulator-name = "vcc-pll-avcc";
305*674ef1d0SIcenowy Zheng};
306*674ef1d0SIcenowy Zheng
307*674ef1d0SIcenowy Zheng&reg_dc1sw {
308*674ef1d0SIcenowy Zheng	regulator-name = "vcc-lcd";
309*674ef1d0SIcenowy Zheng};
310*674ef1d0SIcenowy Zheng
311*674ef1d0SIcenowy Zheng&reg_dcdc1 {
312*674ef1d0SIcenowy Zheng	regulator-always-on;
313*674ef1d0SIcenowy Zheng	regulator-min-microvolt = <3300000>;
314*674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
315*674ef1d0SIcenowy Zheng	regulator-name = "vcc-3v3";
316*674ef1d0SIcenowy Zheng};
317*674ef1d0SIcenowy Zheng
318*674ef1d0SIcenowy Zheng&reg_dcdc2 {
319*674ef1d0SIcenowy Zheng	regulator-always-on;
320*674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1000000>;
321*674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1300000>;
322*674ef1d0SIcenowy Zheng	regulator-name = "vdd-cpux";
323*674ef1d0SIcenowy Zheng};
324*674ef1d0SIcenowy Zheng
325*674ef1d0SIcenowy Zheng/* DCDC3 is polyphased with DCDC2 */
326*674ef1d0SIcenowy Zheng
327*674ef1d0SIcenowy Zheng&reg_dcdc5 {
328*674ef1d0SIcenowy Zheng	regulator-always-on;
329*674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1200000>;
330*674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1200000>;
331*674ef1d0SIcenowy Zheng	regulator-name = "vcc-dram";
332*674ef1d0SIcenowy Zheng};
333*674ef1d0SIcenowy Zheng
334*674ef1d0SIcenowy Zheng&reg_dcdc6 {
335*674ef1d0SIcenowy Zheng	regulator-always-on;
336*674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1100000>;
337*674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1100000>;
338*674ef1d0SIcenowy Zheng	regulator-name = "vdd-sys";
339*674ef1d0SIcenowy Zheng};
340*674ef1d0SIcenowy Zheng
341*674ef1d0SIcenowy Zheng&reg_dldo1 {
342*674ef1d0SIcenowy Zheng	regulator-always-on;
343*674ef1d0SIcenowy Zheng	regulator-min-microvolt = <3300000>;
344*674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
345*674ef1d0SIcenowy Zheng	regulator-name = "vcc-hdmi-dsi-sensor";
346*674ef1d0SIcenowy Zheng};
347*674ef1d0SIcenowy Zheng
348*674ef1d0SIcenowy Zheng&reg_dldo3 {
349*674ef1d0SIcenowy Zheng	regulator-min-microvolt = <2800000>;
350*674ef1d0SIcenowy Zheng	regulator-max-microvolt = <2800000>;
351*674ef1d0SIcenowy Zheng	regulator-name = "avdd-csi";
352*674ef1d0SIcenowy Zheng};
353*674ef1d0SIcenowy Zheng
354*674ef1d0SIcenowy Zheng&reg_dldo4 {
355*674ef1d0SIcenowy Zheng	regulator-min-microvolt = <3300000>;
356*674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
357*674ef1d0SIcenowy Zheng	regulator-name = "vcc-wifi";
358*674ef1d0SIcenowy Zheng};
359*674ef1d0SIcenowy Zheng
360*674ef1d0SIcenowy Zheng&reg_drivevbus {
361*674ef1d0SIcenowy Zheng	regulator-name = "usb0-vbus";
362*674ef1d0SIcenowy Zheng	status = "okay";
363*674ef1d0SIcenowy Zheng};
364*674ef1d0SIcenowy Zheng
365*674ef1d0SIcenowy Zheng&reg_eldo1 {
366*674ef1d0SIcenowy Zheng	regulator-always-on;
367*674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1800000>;
368*674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1800000>;
369*674ef1d0SIcenowy Zheng	regulator-name = "cpvdd";
370*674ef1d0SIcenowy Zheng};
371*674ef1d0SIcenowy Zheng
372*674ef1d0SIcenowy Zheng&reg_eldo2 {
373*674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1800000>;
374*674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1800000>;
375*674ef1d0SIcenowy Zheng	regulator-name = "vcca-1v8";
376*674ef1d0SIcenowy Zheng};
377*674ef1d0SIcenowy Zheng
378*674ef1d0SIcenowy Zheng&reg_eldo3 {
379*674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1800000>;
380*674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1800000>;
381*674ef1d0SIcenowy Zheng	regulator-name = "dvdd-1v8-csi";
382*674ef1d0SIcenowy Zheng};
383*674ef1d0SIcenowy Zheng
384*674ef1d0SIcenowy Zheng&reg_fldo1 {
385*674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1200000>;
386*674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1200000>;
387*674ef1d0SIcenowy Zheng	regulator-name = "vcc-1v2-hsic";
388*674ef1d0SIcenowy Zheng};
389*674ef1d0SIcenowy Zheng
390*674ef1d0SIcenowy Zheng&reg_fldo2 {
391*674ef1d0SIcenowy Zheng	regulator-always-on;
392*674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1100000>;
393*674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1100000>;
394*674ef1d0SIcenowy Zheng	regulator-name = "vdd-cpus";
395*674ef1d0SIcenowy Zheng};
396*674ef1d0SIcenowy Zheng
397*674ef1d0SIcenowy Zheng&reg_ldo_io0 {
398*674ef1d0SIcenowy Zheng	regulator-min-microvolt = <3300000>;
399*674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
400*674ef1d0SIcenowy Zheng	regulator-name = "vcc-usb";
401*674ef1d0SIcenowy Zheng	status = "okay";
402*674ef1d0SIcenowy Zheng};
403*674ef1d0SIcenowy Zheng
404*674ef1d0SIcenowy Zheng&reg_ldo_io1 {
405*674ef1d0SIcenowy Zheng	regulator-min-microvolt = <3300000>;
406*674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
407*674ef1d0SIcenowy Zheng	regulator-enable-ramp-delay = <3500000>;
408*674ef1d0SIcenowy Zheng	regulator-name = "vcc-touchscreen";
409*674ef1d0SIcenowy Zheng	status = "okay";
410*674ef1d0SIcenowy Zheng};
411*674ef1d0SIcenowy Zheng
412*674ef1d0SIcenowy Zheng&reg_rtc_ldo {
413*674ef1d0SIcenowy Zheng	regulator-name = "vcc-rtc";
414*674ef1d0SIcenowy Zheng};
415*674ef1d0SIcenowy Zheng
416*674ef1d0SIcenowy Zheng&sound {
417*674ef1d0SIcenowy Zheng	status = "okay";
418*674ef1d0SIcenowy Zheng	simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>;
419*674ef1d0SIcenowy Zheng	simple-audio-card,widgets = "Microphone", "Internal Microphone Left",
420*674ef1d0SIcenowy Zheng				    "Microphone", "Internal Microphone Right",
421*674ef1d0SIcenowy Zheng				    "Headphone", "Headphone Jack",
422*674ef1d0SIcenowy Zheng				    "Speaker", "Internal Speaker";
423*674ef1d0SIcenowy Zheng	simple-audio-card,routing =
424*674ef1d0SIcenowy Zheng			"Left DAC", "AIF1 Slot 0 Left",
425*674ef1d0SIcenowy Zheng			"Right DAC", "AIF1 Slot 0 Right",
426*674ef1d0SIcenowy Zheng			"Speaker Amp INL", "LINEOUT",
427*674ef1d0SIcenowy Zheng			"Speaker Amp INR", "LINEOUT",
428*674ef1d0SIcenowy Zheng			"Internal Speaker", "Speaker Amp OUTL",
429*674ef1d0SIcenowy Zheng			"Internal Speaker", "Speaker Amp OUTR",
430*674ef1d0SIcenowy Zheng			"Headphone Jack", "HP",
431*674ef1d0SIcenowy Zheng			"AIF1 Slot 0 Left ADC", "Left ADC",
432*674ef1d0SIcenowy Zheng			"AIF1 Slot 0 Right ADC", "Right ADC",
433*674ef1d0SIcenowy Zheng			"Internal Microphone Left", "MBIAS",
434*674ef1d0SIcenowy Zheng			"MIC1", "Internal Microphone Left",
435*674ef1d0SIcenowy Zheng			"Internal Microphone Right", "HBIAS",
436*674ef1d0SIcenowy Zheng			"MIC2", "Internal Microphone Right";
437*674ef1d0SIcenowy Zheng};
438*674ef1d0SIcenowy Zheng
439*674ef1d0SIcenowy Zheng&uart0 {
440*674ef1d0SIcenowy Zheng	pinctrl-names = "default";
441*674ef1d0SIcenowy Zheng	pinctrl-0 = <&uart0_pb_pins>;
442*674ef1d0SIcenowy Zheng	status = "okay";
443*674ef1d0SIcenowy Zheng};
444*674ef1d0SIcenowy Zheng
445*674ef1d0SIcenowy Zheng&usb_otg {
446*674ef1d0SIcenowy Zheng	dr_mode = "otg";
447*674ef1d0SIcenowy Zheng	status = "okay";
448*674ef1d0SIcenowy Zheng};
449*674ef1d0SIcenowy Zheng
450*674ef1d0SIcenowy Zheng&usb_power_supply {
451*674ef1d0SIcenowy Zheng	status = "okay";
452*674ef1d0SIcenowy Zheng};
453*674ef1d0SIcenowy Zheng
454*674ef1d0SIcenowy Zheng&usbphy {
455*674ef1d0SIcenowy Zheng	usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
456*674ef1d0SIcenowy Zheng	usb0_vbus_power-supply = <&usb_power_supply>;
457*674ef1d0SIcenowy Zheng	usb0_vbus-supply = <&reg_drivevbus>;
458*674ef1d0SIcenowy Zheng	usb1_vbus-supply = <&reg_ldo_io0>;
459*674ef1d0SIcenowy Zheng	status = "okay";
460*674ef1d0SIcenowy Zheng};
461