xref: /openbmc/linux/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts (revision 631e6a353060981675cc15d71417e3379fb414e2)
1674ef1d0SIcenowy Zheng// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2674ef1d0SIcenowy Zheng/*
3674ef1d0SIcenowy Zheng * Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.xyz>
4674ef1d0SIcenowy Zheng *
5674ef1d0SIcenowy Zheng */
6674ef1d0SIcenowy Zheng
7674ef1d0SIcenowy Zheng/dts-v1/;
8674ef1d0SIcenowy Zheng
9674ef1d0SIcenowy Zheng#include "sun50i-a64.dtsi"
10674ef1d0SIcenowy Zheng#include "sun50i-a64-cpu-opp.dtsi"
11674ef1d0SIcenowy Zheng
12674ef1d0SIcenowy Zheng#include <dt-bindings/gpio/gpio.h>
13674ef1d0SIcenowy Zheng#include <dt-bindings/input/input.h>
14674ef1d0SIcenowy Zheng#include <dt-bindings/pwm/pwm.h>
15674ef1d0SIcenowy Zheng
16674ef1d0SIcenowy Zheng/ {
17674ef1d0SIcenowy Zheng	model = "PineTab";
18674ef1d0SIcenowy Zheng	compatible = "pine64,pinetab", "allwinner,sun50i-a64";
19674ef1d0SIcenowy Zheng
20674ef1d0SIcenowy Zheng	aliases {
21674ef1d0SIcenowy Zheng		serial0 = &uart0;
22674ef1d0SIcenowy Zheng		ethernet0 = &rtl8723cs;
23674ef1d0SIcenowy Zheng	};
24674ef1d0SIcenowy Zheng
25674ef1d0SIcenowy Zheng	backlight: backlight {
26674ef1d0SIcenowy Zheng		compatible = "pwm-backlight";
27674ef1d0SIcenowy Zheng		pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
28674ef1d0SIcenowy Zheng		brightness-levels = <0 16 18 20 22 24 26 29 32 35 38 42 46 51 56 62 68 75 83 91 100>;
29674ef1d0SIcenowy Zheng		default-brightness-level = <15>;
30674ef1d0SIcenowy Zheng		enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
31674ef1d0SIcenowy Zheng		power-supply = <&vdd_bl>;
32674ef1d0SIcenowy Zheng	};
33674ef1d0SIcenowy Zheng
34674ef1d0SIcenowy Zheng	chosen {
35674ef1d0SIcenowy Zheng		stdout-path = "serial0:115200n8";
36674ef1d0SIcenowy Zheng	};
37674ef1d0SIcenowy Zheng
38674ef1d0SIcenowy Zheng	i2c-csi {
39674ef1d0SIcenowy Zheng		compatible = "i2c-gpio";
40674ef1d0SIcenowy Zheng		sda-gpios = <&pio 4 13 GPIO_ACTIVE_HIGH>; /* PE13 */
41674ef1d0SIcenowy Zheng		scl-gpios = <&pio 4 12 GPIO_ACTIVE_HIGH>; /* PE12 */
42674ef1d0SIcenowy Zheng		i2c-gpio,delay-us = <5>;
43674ef1d0SIcenowy Zheng		#address-cells = <1>;
44674ef1d0SIcenowy Zheng		#size-cells = <0>;
45674ef1d0SIcenowy Zheng
46674ef1d0SIcenowy Zheng		/* Rear camera */
47674ef1d0SIcenowy Zheng		ov5640: camera@3c {
48674ef1d0SIcenowy Zheng			compatible = "ovti,ov5640";
49674ef1d0SIcenowy Zheng			reg = <0x3c>;
50674ef1d0SIcenowy Zheng			pinctrl-names = "default";
51674ef1d0SIcenowy Zheng			pinctrl-0 = <&csi_mclk_pin>;
52674ef1d0SIcenowy Zheng			clocks = <&ccu CLK_CSI_MCLK>;
53674ef1d0SIcenowy Zheng			clock-names = "xclk";
54674ef1d0SIcenowy Zheng
55674ef1d0SIcenowy Zheng			AVDD-supply = <&reg_dldo3>;
56674ef1d0SIcenowy Zheng			DOVDD-supply = <&reg_aldo1>;
57674ef1d0SIcenowy Zheng			DVDD-supply = <&reg_eldo3>;
58674ef1d0SIcenowy Zheng			reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>; /* PE14 */
59674ef1d0SIcenowy Zheng			powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */
60674ef1d0SIcenowy Zheng
61674ef1d0SIcenowy Zheng			port {
62674ef1d0SIcenowy Zheng				ov5640_ep: endpoint {
63674ef1d0SIcenowy Zheng					remote-endpoint = <&csi_ep>;
64674ef1d0SIcenowy Zheng					bus-width = <8>;
65674ef1d0SIcenowy Zheng					hsync-active = <1>; /* Active high */
66674ef1d0SIcenowy Zheng					vsync-active = <0>; /* Active low */
67674ef1d0SIcenowy Zheng					data-active = <1>;  /* Active high */
68674ef1d0SIcenowy Zheng					pclk-sample = <1>;  /* Rising */
69674ef1d0SIcenowy Zheng				};
70674ef1d0SIcenowy Zheng			};
71674ef1d0SIcenowy Zheng		};
72674ef1d0SIcenowy Zheng	};
73674ef1d0SIcenowy Zheng
74674ef1d0SIcenowy Zheng	speaker_amp: audio-amplifier {
75674ef1d0SIcenowy Zheng		compatible = "simple-audio-amplifier";
76674ef1d0SIcenowy Zheng		enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
77674ef1d0SIcenowy Zheng		sound-name-prefix = "Speaker Amp";
78674ef1d0SIcenowy Zheng	};
79674ef1d0SIcenowy Zheng
80674ef1d0SIcenowy Zheng	vdd_bl: regulator@0 {
81674ef1d0SIcenowy Zheng		compatible = "regulator-fixed";
82674ef1d0SIcenowy Zheng		regulator-name = "bl-3v3";
83674ef1d0SIcenowy Zheng		regulator-min-microvolt = <3300000>;
84674ef1d0SIcenowy Zheng		regulator-max-microvolt = <3300000>;
85674ef1d0SIcenowy Zheng		gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
86674ef1d0SIcenowy Zheng		enable-active-high;
87674ef1d0SIcenowy Zheng	};
88674ef1d0SIcenowy Zheng
89674ef1d0SIcenowy Zheng	wifi_pwrseq: wifi_pwrseq {
90674ef1d0SIcenowy Zheng		compatible = "mmc-pwrseq-simple";
91674ef1d0SIcenowy Zheng		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
92674ef1d0SIcenowy Zheng		post-power-on-delay-ms = <200>;
93674ef1d0SIcenowy Zheng	};
94674ef1d0SIcenowy Zheng};
95674ef1d0SIcenowy Zheng
96674ef1d0SIcenowy Zheng&codec {
97674ef1d0SIcenowy Zheng	status = "okay";
98674ef1d0SIcenowy Zheng};
99674ef1d0SIcenowy Zheng
100674ef1d0SIcenowy Zheng&codec_analog {
1015f39dd23SSamuel Holland	cpvdd-supply = <&reg_eldo1>;
102674ef1d0SIcenowy Zheng	status = "okay";
103674ef1d0SIcenowy Zheng};
104674ef1d0SIcenowy Zheng
105674ef1d0SIcenowy Zheng&cpu0 {
106674ef1d0SIcenowy Zheng	cpu-supply = <&reg_dcdc2>;
107674ef1d0SIcenowy Zheng};
108674ef1d0SIcenowy Zheng
109674ef1d0SIcenowy Zheng&cpu1 {
110674ef1d0SIcenowy Zheng	cpu-supply = <&reg_dcdc2>;
111674ef1d0SIcenowy Zheng};
112674ef1d0SIcenowy Zheng
113674ef1d0SIcenowy Zheng&cpu2 {
114674ef1d0SIcenowy Zheng	cpu-supply = <&reg_dcdc2>;
115674ef1d0SIcenowy Zheng};
116674ef1d0SIcenowy Zheng
117674ef1d0SIcenowy Zheng&cpu3 {
118674ef1d0SIcenowy Zheng	cpu-supply = <&reg_dcdc2>;
119674ef1d0SIcenowy Zheng};
120674ef1d0SIcenowy Zheng
121674ef1d0SIcenowy Zheng&csi {
122674ef1d0SIcenowy Zheng	status = "okay";
123674ef1d0SIcenowy Zheng
124674ef1d0SIcenowy Zheng	port {
125674ef1d0SIcenowy Zheng		#address-cells = <1>;
126674ef1d0SIcenowy Zheng		#size-cells = <0>;
127674ef1d0SIcenowy Zheng
128674ef1d0SIcenowy Zheng		csi_ep: endpoint {
129674ef1d0SIcenowy Zheng			remote-endpoint = <&ov5640_ep>;
130674ef1d0SIcenowy Zheng			bus-width = <8>;
131674ef1d0SIcenowy Zheng			hsync-active = <1>; /* Active high */
132674ef1d0SIcenowy Zheng			vsync-active = <0>; /* Active low */
133674ef1d0SIcenowy Zheng			data-active = <1>;  /* Active high */
134674ef1d0SIcenowy Zheng			pclk-sample = <1>;  /* Rising */
135674ef1d0SIcenowy Zheng		};
136674ef1d0SIcenowy Zheng	};
137674ef1d0SIcenowy Zheng};
138674ef1d0SIcenowy Zheng
139674ef1d0SIcenowy Zheng&dai {
140674ef1d0SIcenowy Zheng	status = "okay";
141674ef1d0SIcenowy Zheng};
142674ef1d0SIcenowy Zheng
143674ef1d0SIcenowy Zheng&de {
144674ef1d0SIcenowy Zheng	status = "okay";
145674ef1d0SIcenowy Zheng};
146674ef1d0SIcenowy Zheng
147674ef1d0SIcenowy Zheng&dphy {
148674ef1d0SIcenowy Zheng	status = "okay";
149674ef1d0SIcenowy Zheng};
150674ef1d0SIcenowy Zheng
151674ef1d0SIcenowy Zheng&dsi {
152674ef1d0SIcenowy Zheng	vcc-dsi-supply = <&reg_dldo1>;
153674ef1d0SIcenowy Zheng	status = "okay";
154674ef1d0SIcenowy Zheng
155674ef1d0SIcenowy Zheng	panel@0 {
156674ef1d0SIcenowy Zheng		compatible = "feixin,k101-im2ba02";
157674ef1d0SIcenowy Zheng		reg = <0>;
158674ef1d0SIcenowy Zheng		avdd-supply = <&reg_dc1sw>;
159674ef1d0SIcenowy Zheng		dvdd-supply = <&reg_dc1sw>;
160674ef1d0SIcenowy Zheng		cvdd-supply = <&reg_ldo_io1>;
161674ef1d0SIcenowy Zheng		reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
162674ef1d0SIcenowy Zheng		backlight = <&backlight>;
163674ef1d0SIcenowy Zheng	};
164674ef1d0SIcenowy Zheng};
165674ef1d0SIcenowy Zheng
166674ef1d0SIcenowy Zheng&ehci0 {
167674ef1d0SIcenowy Zheng	status = "okay";
168674ef1d0SIcenowy Zheng};
169674ef1d0SIcenowy Zheng
170674ef1d0SIcenowy Zheng&ehci1 {
171674ef1d0SIcenowy Zheng	status = "okay";
172674ef1d0SIcenowy Zheng};
173674ef1d0SIcenowy Zheng
174674ef1d0SIcenowy Zheng&i2c0 {
175674ef1d0SIcenowy Zheng	status = "okay";
176674ef1d0SIcenowy Zheng
177674ef1d0SIcenowy Zheng	touchscreen@5d {
178674ef1d0SIcenowy Zheng		compatible = "goodix,gt9271";
179674ef1d0SIcenowy Zheng		reg = <0x5d>;
180674ef1d0SIcenowy Zheng		interrupt-parent = <&pio>;
181674ef1d0SIcenowy Zheng		interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */
182674ef1d0SIcenowy Zheng		irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
183674ef1d0SIcenowy Zheng		reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */
184674ef1d0SIcenowy Zheng		AVDD28-supply = <&reg_ldo_io1>;
185674ef1d0SIcenowy Zheng	};
186674ef1d0SIcenowy Zheng};
187674ef1d0SIcenowy Zheng
188674ef1d0SIcenowy Zheng&i2c0_pins {
189674ef1d0SIcenowy Zheng	bias-pull-up;
190674ef1d0SIcenowy Zheng};
191674ef1d0SIcenowy Zheng
192674ef1d0SIcenowy Zheng&i2c1 {
193674ef1d0SIcenowy Zheng	status = "okay";
194674ef1d0SIcenowy Zheng
195674ef1d0SIcenowy Zheng	/* TODO: add Bochs BMA223 accelerometer here */
196674ef1d0SIcenowy Zheng};
197674ef1d0SIcenowy Zheng
198674ef1d0SIcenowy Zheng&lradc {
199674ef1d0SIcenowy Zheng	vref-supply = <&reg_aldo3>;
200674ef1d0SIcenowy Zheng	status = "okay";
201674ef1d0SIcenowy Zheng
202674ef1d0SIcenowy Zheng	button-200 {
203674ef1d0SIcenowy Zheng		label = "Volume Up";
204674ef1d0SIcenowy Zheng		linux,code = <KEY_VOLUMEUP>;
205674ef1d0SIcenowy Zheng		channel = <0>;
206674ef1d0SIcenowy Zheng		voltage = <200000>;
207674ef1d0SIcenowy Zheng	};
208674ef1d0SIcenowy Zheng
209674ef1d0SIcenowy Zheng	button-400 {
210674ef1d0SIcenowy Zheng		label = "Volume Down";
211674ef1d0SIcenowy Zheng		linux,code = <KEY_VOLUMEDOWN>;
212674ef1d0SIcenowy Zheng		channel = <0>;
213674ef1d0SIcenowy Zheng		voltage = <400000>;
214674ef1d0SIcenowy Zheng	};
215674ef1d0SIcenowy Zheng};
216674ef1d0SIcenowy Zheng
217674ef1d0SIcenowy Zheng&mixer1 {
218674ef1d0SIcenowy Zheng	status = "okay";
219674ef1d0SIcenowy Zheng};
220674ef1d0SIcenowy Zheng
221674ef1d0SIcenowy Zheng&mmc0 {
222674ef1d0SIcenowy Zheng	pinctrl-names = "default";
223674ef1d0SIcenowy Zheng	pinctrl-0 = <&mmc0_pins>;
224674ef1d0SIcenowy Zheng	vmmc-supply = <&reg_dcdc1>;
225674ef1d0SIcenowy Zheng	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
226674ef1d0SIcenowy Zheng	disable-wp;
227674ef1d0SIcenowy Zheng	bus-width = <4>;
228674ef1d0SIcenowy Zheng	status = "okay";
229674ef1d0SIcenowy Zheng};
230674ef1d0SIcenowy Zheng
231674ef1d0SIcenowy Zheng&mmc1 {
232674ef1d0SIcenowy Zheng	pinctrl-names = "default";
233674ef1d0SIcenowy Zheng	pinctrl-0 = <&mmc1_pins>;
234674ef1d0SIcenowy Zheng	vmmc-supply = <&reg_dldo4>;
235674ef1d0SIcenowy Zheng	vqmmc-supply = <&reg_eldo1>;
236674ef1d0SIcenowy Zheng	mmc-pwrseq = <&wifi_pwrseq>;
237674ef1d0SIcenowy Zheng	bus-width = <4>;
238674ef1d0SIcenowy Zheng	non-removable;
239674ef1d0SIcenowy Zheng	status = "okay";
240674ef1d0SIcenowy Zheng
241674ef1d0SIcenowy Zheng	rtl8723cs: wifi@1 {
242674ef1d0SIcenowy Zheng		reg = <1>;
243674ef1d0SIcenowy Zheng	};
244674ef1d0SIcenowy Zheng};
245674ef1d0SIcenowy Zheng
246674ef1d0SIcenowy Zheng&mmc2 {
247674ef1d0SIcenowy Zheng	pinctrl-names = "default";
248674ef1d0SIcenowy Zheng	pinctrl-0 = <&mmc2_pins>;
249674ef1d0SIcenowy Zheng	vmmc-supply = <&reg_dcdc1>;
250674ef1d0SIcenowy Zheng	vqmmc-supply = <&reg_dcdc1>;
251674ef1d0SIcenowy Zheng	bus-width = <8>;
252674ef1d0SIcenowy Zheng	non-removable;
253674ef1d0SIcenowy Zheng	cap-mmc-hw-reset;
254674ef1d0SIcenowy Zheng	status = "okay";
255674ef1d0SIcenowy Zheng};
256674ef1d0SIcenowy Zheng
257674ef1d0SIcenowy Zheng&ohci0 {
258674ef1d0SIcenowy Zheng	status = "okay";
259674ef1d0SIcenowy Zheng};
260674ef1d0SIcenowy Zheng
261674ef1d0SIcenowy Zheng&pwm {
262674ef1d0SIcenowy Zheng	status = "okay";
263674ef1d0SIcenowy Zheng};
264674ef1d0SIcenowy Zheng
265674ef1d0SIcenowy Zheng&r_rsb {
266674ef1d0SIcenowy Zheng	status = "okay";
267674ef1d0SIcenowy Zheng
268674ef1d0SIcenowy Zheng	axp803: pmic@3a3 {
269674ef1d0SIcenowy Zheng		compatible = "x-powers,axp803";
270674ef1d0SIcenowy Zheng		reg = <0x3a3>;
271674ef1d0SIcenowy Zheng		interrupt-parent = <&r_intc>;
272674ef1d0SIcenowy Zheng		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
273674ef1d0SIcenowy Zheng		x-powers,drive-vbus-en;
274674ef1d0SIcenowy Zheng	};
275674ef1d0SIcenowy Zheng};
276674ef1d0SIcenowy Zheng
277674ef1d0SIcenowy Zheng#include "axp803.dtsi"
278674ef1d0SIcenowy Zheng
279674ef1d0SIcenowy Zheng&ac_power_supply {
280674ef1d0SIcenowy Zheng	status = "okay";
281674ef1d0SIcenowy Zheng};
282674ef1d0SIcenowy Zheng
283674ef1d0SIcenowy Zheng&battery_power_supply {
284674ef1d0SIcenowy Zheng	status = "okay";
285674ef1d0SIcenowy Zheng};
286674ef1d0SIcenowy Zheng
287674ef1d0SIcenowy Zheng&reg_aldo1 {
288674ef1d0SIcenowy Zheng	regulator-min-microvolt = <2800000>;
289674ef1d0SIcenowy Zheng	regulator-max-microvolt = <2800000>;
290674ef1d0SIcenowy Zheng	regulator-name = "dovdd-csi";
291674ef1d0SIcenowy Zheng};
292674ef1d0SIcenowy Zheng
293674ef1d0SIcenowy Zheng&reg_aldo2 {
294674ef1d0SIcenowy Zheng	regulator-always-on;
295674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1800000>;
296674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
297674ef1d0SIcenowy Zheng	regulator-name = "vcc-pl";
298674ef1d0SIcenowy Zheng};
299674ef1d0SIcenowy Zheng
300674ef1d0SIcenowy Zheng&reg_aldo3 {
301674ef1d0SIcenowy Zheng	regulator-always-on;
302674ef1d0SIcenowy Zheng	regulator-min-microvolt = <2700000>;
303674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
304674ef1d0SIcenowy Zheng	regulator-name = "vcc-pll-avcc";
305674ef1d0SIcenowy Zheng};
306674ef1d0SIcenowy Zheng
307674ef1d0SIcenowy Zheng&reg_dc1sw {
308674ef1d0SIcenowy Zheng	regulator-name = "vcc-lcd";
309674ef1d0SIcenowy Zheng};
310674ef1d0SIcenowy Zheng
311674ef1d0SIcenowy Zheng&reg_dcdc1 {
312674ef1d0SIcenowy Zheng	regulator-always-on;
313674ef1d0SIcenowy Zheng	regulator-min-microvolt = <3300000>;
314674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
315674ef1d0SIcenowy Zheng	regulator-name = "vcc-3v3";
316674ef1d0SIcenowy Zheng};
317674ef1d0SIcenowy Zheng
318674ef1d0SIcenowy Zheng&reg_dcdc2 {
319674ef1d0SIcenowy Zheng	regulator-always-on;
320674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1000000>;
321674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1300000>;
322674ef1d0SIcenowy Zheng	regulator-name = "vdd-cpux";
323674ef1d0SIcenowy Zheng};
324674ef1d0SIcenowy Zheng
325674ef1d0SIcenowy Zheng/* DCDC3 is polyphased with DCDC2 */
326674ef1d0SIcenowy Zheng
327674ef1d0SIcenowy Zheng&reg_dcdc5 {
328674ef1d0SIcenowy Zheng	regulator-always-on;
329674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1200000>;
330674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1200000>;
331674ef1d0SIcenowy Zheng	regulator-name = "vcc-dram";
332674ef1d0SIcenowy Zheng};
333674ef1d0SIcenowy Zheng
334674ef1d0SIcenowy Zheng&reg_dcdc6 {
335674ef1d0SIcenowy Zheng	regulator-always-on;
336674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1100000>;
337674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1100000>;
338674ef1d0SIcenowy Zheng	regulator-name = "vdd-sys";
339674ef1d0SIcenowy Zheng};
340674ef1d0SIcenowy Zheng
341674ef1d0SIcenowy Zheng&reg_dldo1 {
342674ef1d0SIcenowy Zheng	regulator-always-on;
343674ef1d0SIcenowy Zheng	regulator-min-microvolt = <3300000>;
344674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
345674ef1d0SIcenowy Zheng	regulator-name = "vcc-hdmi-dsi-sensor";
346674ef1d0SIcenowy Zheng};
347674ef1d0SIcenowy Zheng
348674ef1d0SIcenowy Zheng&reg_dldo3 {
349674ef1d0SIcenowy Zheng	regulator-min-microvolt = <2800000>;
350674ef1d0SIcenowy Zheng	regulator-max-microvolt = <2800000>;
351674ef1d0SIcenowy Zheng	regulator-name = "avdd-csi";
352674ef1d0SIcenowy Zheng};
353674ef1d0SIcenowy Zheng
354674ef1d0SIcenowy Zheng&reg_dldo4 {
355674ef1d0SIcenowy Zheng	regulator-min-microvolt = <3300000>;
356674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
357674ef1d0SIcenowy Zheng	regulator-name = "vcc-wifi";
358674ef1d0SIcenowy Zheng};
359674ef1d0SIcenowy Zheng
360674ef1d0SIcenowy Zheng&reg_drivevbus {
361674ef1d0SIcenowy Zheng	regulator-name = "usb0-vbus";
362674ef1d0SIcenowy Zheng	status = "okay";
363674ef1d0SIcenowy Zheng};
364674ef1d0SIcenowy Zheng
365674ef1d0SIcenowy Zheng&reg_eldo1 {
366674ef1d0SIcenowy Zheng	regulator-always-on;
367674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1800000>;
368674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1800000>;
369674ef1d0SIcenowy Zheng	regulator-name = "cpvdd";
370674ef1d0SIcenowy Zheng};
371674ef1d0SIcenowy Zheng
372674ef1d0SIcenowy Zheng&reg_eldo2 {
373674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1800000>;
374674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1800000>;
375674ef1d0SIcenowy Zheng	regulator-name = "vcca-1v8";
376674ef1d0SIcenowy Zheng};
377674ef1d0SIcenowy Zheng
378674ef1d0SIcenowy Zheng&reg_eldo3 {
379674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1800000>;
380674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1800000>;
381674ef1d0SIcenowy Zheng	regulator-name = "dvdd-1v8-csi";
382674ef1d0SIcenowy Zheng};
383674ef1d0SIcenowy Zheng
384674ef1d0SIcenowy Zheng&reg_fldo1 {
385674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1200000>;
386674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1200000>;
387674ef1d0SIcenowy Zheng	regulator-name = "vcc-1v2-hsic";
388674ef1d0SIcenowy Zheng};
389674ef1d0SIcenowy Zheng
390674ef1d0SIcenowy Zheng&reg_fldo2 {
391674ef1d0SIcenowy Zheng	regulator-always-on;
392674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1100000>;
393674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1100000>;
394674ef1d0SIcenowy Zheng	regulator-name = "vdd-cpus";
395674ef1d0SIcenowy Zheng};
396674ef1d0SIcenowy Zheng
397674ef1d0SIcenowy Zheng&reg_ldo_io0 {
398674ef1d0SIcenowy Zheng	regulator-min-microvolt = <3300000>;
399674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
400674ef1d0SIcenowy Zheng	regulator-name = "vcc-usb";
401674ef1d0SIcenowy Zheng	status = "okay";
402674ef1d0SIcenowy Zheng};
403674ef1d0SIcenowy Zheng
404674ef1d0SIcenowy Zheng&reg_ldo_io1 {
405674ef1d0SIcenowy Zheng	regulator-min-microvolt = <3300000>;
406674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
407674ef1d0SIcenowy Zheng	regulator-enable-ramp-delay = <3500000>;
408674ef1d0SIcenowy Zheng	regulator-name = "vcc-touchscreen";
409674ef1d0SIcenowy Zheng	status = "okay";
410674ef1d0SIcenowy Zheng};
411674ef1d0SIcenowy Zheng
412674ef1d0SIcenowy Zheng&reg_rtc_ldo {
413674ef1d0SIcenowy Zheng	regulator-name = "vcc-rtc";
414674ef1d0SIcenowy Zheng};
415674ef1d0SIcenowy Zheng
416674ef1d0SIcenowy Zheng&sound {
417674ef1d0SIcenowy Zheng	status = "okay";
418674ef1d0SIcenowy Zheng	simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>;
419674ef1d0SIcenowy Zheng	simple-audio-card,widgets = "Microphone", "Internal Microphone Left",
420674ef1d0SIcenowy Zheng				    "Microphone", "Internal Microphone Right",
421674ef1d0SIcenowy Zheng				    "Headphone", "Headphone Jack",
422674ef1d0SIcenowy Zheng				    "Speaker", "Internal Speaker";
423674ef1d0SIcenowy Zheng	simple-audio-card,routing =
424*631e6a35SSamuel Holland			"Left DAC", "DACL",
425*631e6a35SSamuel Holland			"Right DAC", "DACR",
426674ef1d0SIcenowy Zheng			"Speaker Amp INL", "LINEOUT",
427674ef1d0SIcenowy Zheng			"Speaker Amp INR", "LINEOUT",
428674ef1d0SIcenowy Zheng			"Internal Speaker", "Speaker Amp OUTL",
429674ef1d0SIcenowy Zheng			"Internal Speaker", "Speaker Amp OUTR",
430674ef1d0SIcenowy Zheng			"Headphone Jack", "HP",
431*631e6a35SSamuel Holland			"ADCL", "Left ADC",
432*631e6a35SSamuel Holland			"ADCR", "Right ADC",
433674ef1d0SIcenowy Zheng			"Internal Microphone Left", "MBIAS",
434674ef1d0SIcenowy Zheng			"MIC1", "Internal Microphone Left",
435674ef1d0SIcenowy Zheng			"Internal Microphone Right", "HBIAS",
436674ef1d0SIcenowy Zheng			"MIC2", "Internal Microphone Right";
437674ef1d0SIcenowy Zheng};
438674ef1d0SIcenowy Zheng
439674ef1d0SIcenowy Zheng&uart0 {
440674ef1d0SIcenowy Zheng	pinctrl-names = "default";
441674ef1d0SIcenowy Zheng	pinctrl-0 = <&uart0_pb_pins>;
442674ef1d0SIcenowy Zheng	status = "okay";
443674ef1d0SIcenowy Zheng};
444674ef1d0SIcenowy Zheng
445674ef1d0SIcenowy Zheng&usb_otg {
446674ef1d0SIcenowy Zheng	dr_mode = "otg";
447674ef1d0SIcenowy Zheng	status = "okay";
448674ef1d0SIcenowy Zheng};
449674ef1d0SIcenowy Zheng
450674ef1d0SIcenowy Zheng&usb_power_supply {
451674ef1d0SIcenowy Zheng	status = "okay";
452674ef1d0SIcenowy Zheng};
453674ef1d0SIcenowy Zheng
454674ef1d0SIcenowy Zheng&usbphy {
455674ef1d0SIcenowy Zheng	usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
456674ef1d0SIcenowy Zheng	usb0_vbus_power-supply = <&usb_power_supply>;
457674ef1d0SIcenowy Zheng	usb0_vbus-supply = <&reg_drivevbus>;
458674ef1d0SIcenowy Zheng	usb1_vbus-supply = <&reg_ldo_io0>;
459674ef1d0SIcenowy Zheng	status = "okay";
460674ef1d0SIcenowy Zheng};
461