xref: /openbmc/linux/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts (revision 03ab8e6297acd1bc0eedaa050e2a1635c576fd11)
1674ef1d0SIcenowy Zheng// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2674ef1d0SIcenowy Zheng/*
3674ef1d0SIcenowy Zheng * Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.xyz>
4674ef1d0SIcenowy Zheng *
5674ef1d0SIcenowy Zheng */
6674ef1d0SIcenowy Zheng
7674ef1d0SIcenowy Zheng/dts-v1/;
8674ef1d0SIcenowy Zheng
9674ef1d0SIcenowy Zheng#include "sun50i-a64.dtsi"
10674ef1d0SIcenowy Zheng#include "sun50i-a64-cpu-opp.dtsi"
11674ef1d0SIcenowy Zheng
12674ef1d0SIcenowy Zheng#include <dt-bindings/gpio/gpio.h>
13674ef1d0SIcenowy Zheng#include <dt-bindings/input/input.h>
14674ef1d0SIcenowy Zheng#include <dt-bindings/pwm/pwm.h>
15674ef1d0SIcenowy Zheng
16674ef1d0SIcenowy Zheng/ {
17bdb574e5SIcenowy Zheng	model = "PineTab, Development Sample";
18674ef1d0SIcenowy Zheng	compatible = "pine64,pinetab", "allwinner,sun50i-a64";
19*d900a1cdSArnaud Ferraris	chassis-type = "tablet";
20674ef1d0SIcenowy Zheng
21674ef1d0SIcenowy Zheng	aliases {
22674ef1d0SIcenowy Zheng		serial0 = &uart0;
23674ef1d0SIcenowy Zheng		ethernet0 = &rtl8723cs;
24674ef1d0SIcenowy Zheng	};
25674ef1d0SIcenowy Zheng
26674ef1d0SIcenowy Zheng	backlight: backlight {
27674ef1d0SIcenowy Zheng		compatible = "pwm-backlight";
28674ef1d0SIcenowy Zheng		pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
29674ef1d0SIcenowy Zheng		brightness-levels = <0 16 18 20 22 24 26 29 32 35 38 42 46 51 56 62 68 75 83 91 100>;
30674ef1d0SIcenowy Zheng		default-brightness-level = <15>;
31674ef1d0SIcenowy Zheng		enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
32674ef1d0SIcenowy Zheng		power-supply = <&vdd_bl>;
33674ef1d0SIcenowy Zheng	};
34674ef1d0SIcenowy Zheng
35674ef1d0SIcenowy Zheng	chosen {
36674ef1d0SIcenowy Zheng		stdout-path = "serial0:115200n8";
37674ef1d0SIcenowy Zheng	};
38674ef1d0SIcenowy Zheng
398c2e09b9SDang Huynh	hdmi-connector {
408c2e09b9SDang Huynh		compatible = "hdmi-connector";
418c2e09b9SDang Huynh		type = "c";
428c2e09b9SDang Huynh
438c2e09b9SDang Huynh		port {
448c2e09b9SDang Huynh			hdmi_con_in: endpoint {
458c2e09b9SDang Huynh				remote-endpoint = <&hdmi_out_con>;
468c2e09b9SDang Huynh			};
478c2e09b9SDang Huynh		};
488c2e09b9SDang Huynh	};
498c2e09b9SDang Huynh
50674ef1d0SIcenowy Zheng	i2c-csi {
51674ef1d0SIcenowy Zheng		compatible = "i2c-gpio";
52674ef1d0SIcenowy Zheng		sda-gpios = <&pio 4 13 GPIO_ACTIVE_HIGH>; /* PE13 */
53674ef1d0SIcenowy Zheng		scl-gpios = <&pio 4 12 GPIO_ACTIVE_HIGH>; /* PE12 */
54674ef1d0SIcenowy Zheng		i2c-gpio,delay-us = <5>;
55674ef1d0SIcenowy Zheng		#address-cells = <1>;
56674ef1d0SIcenowy Zheng		#size-cells = <0>;
57674ef1d0SIcenowy Zheng
58674ef1d0SIcenowy Zheng		/* Rear camera */
59674ef1d0SIcenowy Zheng		ov5640: camera@3c {
60674ef1d0SIcenowy Zheng			compatible = "ovti,ov5640";
61674ef1d0SIcenowy Zheng			reg = <0x3c>;
62674ef1d0SIcenowy Zheng			pinctrl-names = "default";
63674ef1d0SIcenowy Zheng			pinctrl-0 = <&csi_mclk_pin>;
64674ef1d0SIcenowy Zheng			clocks = <&ccu CLK_CSI_MCLK>;
65674ef1d0SIcenowy Zheng			clock-names = "xclk";
66674ef1d0SIcenowy Zheng
67674ef1d0SIcenowy Zheng			AVDD-supply = <&reg_dldo3>;
68674ef1d0SIcenowy Zheng			DOVDD-supply = <&reg_aldo1>;
69674ef1d0SIcenowy Zheng			DVDD-supply = <&reg_eldo3>;
70674ef1d0SIcenowy Zheng			reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>; /* PE14 */
71674ef1d0SIcenowy Zheng			powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */
72674ef1d0SIcenowy Zheng
73674ef1d0SIcenowy Zheng			port {
74674ef1d0SIcenowy Zheng				ov5640_ep: endpoint {
75674ef1d0SIcenowy Zheng					remote-endpoint = <&csi_ep>;
76674ef1d0SIcenowy Zheng					bus-width = <8>;
77674ef1d0SIcenowy Zheng					hsync-active = <1>; /* Active high */
78674ef1d0SIcenowy Zheng					vsync-active = <0>; /* Active low */
79674ef1d0SIcenowy Zheng					data-active = <1>;  /* Active high */
80674ef1d0SIcenowy Zheng					pclk-sample = <1>;  /* Rising */
81674ef1d0SIcenowy Zheng				};
82674ef1d0SIcenowy Zheng			};
83674ef1d0SIcenowy Zheng		};
84674ef1d0SIcenowy Zheng	};
85674ef1d0SIcenowy Zheng
86674ef1d0SIcenowy Zheng	speaker_amp: audio-amplifier {
87674ef1d0SIcenowy Zheng		compatible = "simple-audio-amplifier";
88674ef1d0SIcenowy Zheng		enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
89674ef1d0SIcenowy Zheng		sound-name-prefix = "Speaker Amp";
90674ef1d0SIcenowy Zheng	};
91674ef1d0SIcenowy Zheng
9235ce5b87SMaxime Ripard	vdd_bl: regulator {
93674ef1d0SIcenowy Zheng		compatible = "regulator-fixed";
94674ef1d0SIcenowy Zheng		regulator-name = "bl-3v3";
95674ef1d0SIcenowy Zheng		regulator-min-microvolt = <3300000>;
96674ef1d0SIcenowy Zheng		regulator-max-microvolt = <3300000>;
97674ef1d0SIcenowy Zheng		gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
98674ef1d0SIcenowy Zheng		enable-active-high;
99674ef1d0SIcenowy Zheng	};
100674ef1d0SIcenowy Zheng
101674ef1d0SIcenowy Zheng	wifi_pwrseq: wifi_pwrseq {
102674ef1d0SIcenowy Zheng		compatible = "mmc-pwrseq-simple";
103674ef1d0SIcenowy Zheng		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
104674ef1d0SIcenowy Zheng		post-power-on-delay-ms = <200>;
105674ef1d0SIcenowy Zheng	};
106674ef1d0SIcenowy Zheng};
107674ef1d0SIcenowy Zheng
108674ef1d0SIcenowy Zheng&codec {
109674ef1d0SIcenowy Zheng	status = "okay";
110674ef1d0SIcenowy Zheng};
111674ef1d0SIcenowy Zheng
112674ef1d0SIcenowy Zheng&codec_analog {
1135f39dd23SSamuel Holland	cpvdd-supply = <&reg_eldo1>;
114674ef1d0SIcenowy Zheng	status = "okay";
115674ef1d0SIcenowy Zheng};
116674ef1d0SIcenowy Zheng
117674ef1d0SIcenowy Zheng&cpu0 {
118674ef1d0SIcenowy Zheng	cpu-supply = <&reg_dcdc2>;
119674ef1d0SIcenowy Zheng};
120674ef1d0SIcenowy Zheng
121674ef1d0SIcenowy Zheng&cpu1 {
122674ef1d0SIcenowy Zheng	cpu-supply = <&reg_dcdc2>;
123674ef1d0SIcenowy Zheng};
124674ef1d0SIcenowy Zheng
125674ef1d0SIcenowy Zheng&cpu2 {
126674ef1d0SIcenowy Zheng	cpu-supply = <&reg_dcdc2>;
127674ef1d0SIcenowy Zheng};
128674ef1d0SIcenowy Zheng
129674ef1d0SIcenowy Zheng&cpu3 {
130674ef1d0SIcenowy Zheng	cpu-supply = <&reg_dcdc2>;
131674ef1d0SIcenowy Zheng};
132674ef1d0SIcenowy Zheng
133674ef1d0SIcenowy Zheng&csi {
134674ef1d0SIcenowy Zheng	status = "okay";
135674ef1d0SIcenowy Zheng
136674ef1d0SIcenowy Zheng	port {
137674ef1d0SIcenowy Zheng		csi_ep: endpoint {
138674ef1d0SIcenowy Zheng			remote-endpoint = <&ov5640_ep>;
139674ef1d0SIcenowy Zheng			bus-width = <8>;
140674ef1d0SIcenowy Zheng			hsync-active = <1>; /* Active high */
141674ef1d0SIcenowy Zheng			vsync-active = <0>; /* Active low */
142674ef1d0SIcenowy Zheng			data-active = <1>;  /* Active high */
143674ef1d0SIcenowy Zheng			pclk-sample = <1>;  /* Rising */
144674ef1d0SIcenowy Zheng		};
145674ef1d0SIcenowy Zheng	};
146674ef1d0SIcenowy Zheng};
147674ef1d0SIcenowy Zheng
148674ef1d0SIcenowy Zheng&dai {
149674ef1d0SIcenowy Zheng	status = "okay";
150674ef1d0SIcenowy Zheng};
151674ef1d0SIcenowy Zheng
152674ef1d0SIcenowy Zheng&de {
153674ef1d0SIcenowy Zheng	status = "okay";
154674ef1d0SIcenowy Zheng};
155674ef1d0SIcenowy Zheng
156674ef1d0SIcenowy Zheng&dphy {
157674ef1d0SIcenowy Zheng	status = "okay";
158674ef1d0SIcenowy Zheng};
159674ef1d0SIcenowy Zheng
160674ef1d0SIcenowy Zheng&dsi {
161674ef1d0SIcenowy Zheng	vcc-dsi-supply = <&reg_dldo1>;
162674ef1d0SIcenowy Zheng	status = "okay";
163674ef1d0SIcenowy Zheng
164674ef1d0SIcenowy Zheng	panel@0 {
165674ef1d0SIcenowy Zheng		compatible = "feixin,k101-im2ba02";
166674ef1d0SIcenowy Zheng		reg = <0>;
167674ef1d0SIcenowy Zheng		avdd-supply = <&reg_dc1sw>;
168674ef1d0SIcenowy Zheng		dvdd-supply = <&reg_dc1sw>;
169674ef1d0SIcenowy Zheng		cvdd-supply = <&reg_ldo_io1>;
170674ef1d0SIcenowy Zheng		reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
171674ef1d0SIcenowy Zheng		backlight = <&backlight>;
172674ef1d0SIcenowy Zheng	};
173674ef1d0SIcenowy Zheng};
174674ef1d0SIcenowy Zheng
175674ef1d0SIcenowy Zheng&ehci0 {
176674ef1d0SIcenowy Zheng	status = "okay";
177674ef1d0SIcenowy Zheng};
178674ef1d0SIcenowy Zheng
179674ef1d0SIcenowy Zheng&ehci1 {
180674ef1d0SIcenowy Zheng	status = "okay";
181674ef1d0SIcenowy Zheng};
182674ef1d0SIcenowy Zheng
183674ef1d0SIcenowy Zheng&i2c0 {
184674ef1d0SIcenowy Zheng	status = "okay";
185674ef1d0SIcenowy Zheng
186674ef1d0SIcenowy Zheng	touchscreen@5d {
187674ef1d0SIcenowy Zheng		compatible = "goodix,gt9271";
188674ef1d0SIcenowy Zheng		reg = <0x5d>;
189674ef1d0SIcenowy Zheng		interrupt-parent = <&pio>;
190674ef1d0SIcenowy Zheng		interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */
191674ef1d0SIcenowy Zheng		irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
192674ef1d0SIcenowy Zheng		reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */
193674ef1d0SIcenowy Zheng		AVDD28-supply = <&reg_ldo_io1>;
194674ef1d0SIcenowy Zheng	};
195674ef1d0SIcenowy Zheng};
196674ef1d0SIcenowy Zheng
197674ef1d0SIcenowy Zheng&i2c0_pins {
198674ef1d0SIcenowy Zheng	bias-pull-up;
199674ef1d0SIcenowy Zheng};
200674ef1d0SIcenowy Zheng
201674ef1d0SIcenowy Zheng&i2c1 {
202674ef1d0SIcenowy Zheng	status = "okay";
203674ef1d0SIcenowy Zheng
204674ef1d0SIcenowy Zheng	/* TODO: add Bochs BMA223 accelerometer here */
205674ef1d0SIcenowy Zheng};
206674ef1d0SIcenowy Zheng
207674ef1d0SIcenowy Zheng&lradc {
208674ef1d0SIcenowy Zheng	vref-supply = <&reg_aldo3>;
209674ef1d0SIcenowy Zheng	status = "okay";
210674ef1d0SIcenowy Zheng
211674ef1d0SIcenowy Zheng	button-200 {
212674ef1d0SIcenowy Zheng		label = "Volume Up";
213674ef1d0SIcenowy Zheng		linux,code = <KEY_VOLUMEUP>;
214674ef1d0SIcenowy Zheng		channel = <0>;
215674ef1d0SIcenowy Zheng		voltage = <200000>;
216674ef1d0SIcenowy Zheng	};
217674ef1d0SIcenowy Zheng
218674ef1d0SIcenowy Zheng	button-400 {
219674ef1d0SIcenowy Zheng		label = "Volume Down";
220674ef1d0SIcenowy Zheng		linux,code = <KEY_VOLUMEDOWN>;
221674ef1d0SIcenowy Zheng		channel = <0>;
222674ef1d0SIcenowy Zheng		voltage = <400000>;
223674ef1d0SIcenowy Zheng	};
224674ef1d0SIcenowy Zheng};
225674ef1d0SIcenowy Zheng
226674ef1d0SIcenowy Zheng&mixer1 {
227674ef1d0SIcenowy Zheng	status = "okay";
228674ef1d0SIcenowy Zheng};
229674ef1d0SIcenowy Zheng
230674ef1d0SIcenowy Zheng&mmc0 {
231674ef1d0SIcenowy Zheng	pinctrl-names = "default";
232674ef1d0SIcenowy Zheng	pinctrl-0 = <&mmc0_pins>;
233674ef1d0SIcenowy Zheng	vmmc-supply = <&reg_dcdc1>;
234674ef1d0SIcenowy Zheng	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
235674ef1d0SIcenowy Zheng	disable-wp;
236674ef1d0SIcenowy Zheng	bus-width = <4>;
237674ef1d0SIcenowy Zheng	status = "okay";
238674ef1d0SIcenowy Zheng};
239674ef1d0SIcenowy Zheng
240674ef1d0SIcenowy Zheng&mmc1 {
241674ef1d0SIcenowy Zheng	pinctrl-names = "default";
242674ef1d0SIcenowy Zheng	pinctrl-0 = <&mmc1_pins>;
243674ef1d0SIcenowy Zheng	vmmc-supply = <&reg_dldo4>;
244674ef1d0SIcenowy Zheng	vqmmc-supply = <&reg_eldo1>;
245674ef1d0SIcenowy Zheng	mmc-pwrseq = <&wifi_pwrseq>;
246674ef1d0SIcenowy Zheng	bus-width = <4>;
247674ef1d0SIcenowy Zheng	non-removable;
248674ef1d0SIcenowy Zheng	status = "okay";
249674ef1d0SIcenowy Zheng
250674ef1d0SIcenowy Zheng	rtl8723cs: wifi@1 {
251674ef1d0SIcenowy Zheng		reg = <1>;
252674ef1d0SIcenowy Zheng	};
253674ef1d0SIcenowy Zheng};
254674ef1d0SIcenowy Zheng
255674ef1d0SIcenowy Zheng&mmc2 {
256674ef1d0SIcenowy Zheng	pinctrl-names = "default";
257674ef1d0SIcenowy Zheng	pinctrl-0 = <&mmc2_pins>;
258674ef1d0SIcenowy Zheng	vmmc-supply = <&reg_dcdc1>;
259674ef1d0SIcenowy Zheng	vqmmc-supply = <&reg_dcdc1>;
260674ef1d0SIcenowy Zheng	bus-width = <8>;
261674ef1d0SIcenowy Zheng	non-removable;
262674ef1d0SIcenowy Zheng	cap-mmc-hw-reset;
263674ef1d0SIcenowy Zheng	status = "okay";
264674ef1d0SIcenowy Zheng};
265674ef1d0SIcenowy Zheng
266674ef1d0SIcenowy Zheng&ohci0 {
267674ef1d0SIcenowy Zheng	status = "okay";
268674ef1d0SIcenowy Zheng};
269674ef1d0SIcenowy Zheng
270674ef1d0SIcenowy Zheng&pwm {
271674ef1d0SIcenowy Zheng	status = "okay";
272674ef1d0SIcenowy Zheng};
273674ef1d0SIcenowy Zheng
274674ef1d0SIcenowy Zheng&r_rsb {
275674ef1d0SIcenowy Zheng	status = "okay";
276674ef1d0SIcenowy Zheng
277674ef1d0SIcenowy Zheng	axp803: pmic@3a3 {
278674ef1d0SIcenowy Zheng		compatible = "x-powers,axp803";
279674ef1d0SIcenowy Zheng		reg = <0x3a3>;
280674ef1d0SIcenowy Zheng		interrupt-parent = <&r_intc>;
28173088dfeSSamuel Holland		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
282674ef1d0SIcenowy Zheng		x-powers,drive-vbus-en;
283674ef1d0SIcenowy Zheng	};
284674ef1d0SIcenowy Zheng};
285674ef1d0SIcenowy Zheng
286674ef1d0SIcenowy Zheng#include "axp803.dtsi"
287674ef1d0SIcenowy Zheng
288674ef1d0SIcenowy Zheng&ac_power_supply {
289674ef1d0SIcenowy Zheng	status = "okay";
290674ef1d0SIcenowy Zheng};
291674ef1d0SIcenowy Zheng
292674ef1d0SIcenowy Zheng&battery_power_supply {
293674ef1d0SIcenowy Zheng	status = "okay";
294674ef1d0SIcenowy Zheng};
295674ef1d0SIcenowy Zheng
296674ef1d0SIcenowy Zheng&reg_aldo1 {
297674ef1d0SIcenowy Zheng	regulator-min-microvolt = <2800000>;
298674ef1d0SIcenowy Zheng	regulator-max-microvolt = <2800000>;
299674ef1d0SIcenowy Zheng	regulator-name = "dovdd-csi";
300674ef1d0SIcenowy Zheng};
301674ef1d0SIcenowy Zheng
302674ef1d0SIcenowy Zheng&reg_aldo2 {
303674ef1d0SIcenowy Zheng	regulator-always-on;
304674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1800000>;
305674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
306674ef1d0SIcenowy Zheng	regulator-name = "vcc-pl";
307674ef1d0SIcenowy Zheng};
308674ef1d0SIcenowy Zheng
309674ef1d0SIcenowy Zheng&reg_aldo3 {
310674ef1d0SIcenowy Zheng	regulator-always-on;
311674ef1d0SIcenowy Zheng	regulator-min-microvolt = <2700000>;
312674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
313674ef1d0SIcenowy Zheng	regulator-name = "vcc-pll-avcc";
314674ef1d0SIcenowy Zheng};
315674ef1d0SIcenowy Zheng
316674ef1d0SIcenowy Zheng&reg_dc1sw {
317674ef1d0SIcenowy Zheng	regulator-name = "vcc-lcd";
318674ef1d0SIcenowy Zheng};
319674ef1d0SIcenowy Zheng
320674ef1d0SIcenowy Zheng&reg_dcdc1 {
321674ef1d0SIcenowy Zheng	regulator-always-on;
322674ef1d0SIcenowy Zheng	regulator-min-microvolt = <3300000>;
323674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
324674ef1d0SIcenowy Zheng	regulator-name = "vcc-3v3";
325674ef1d0SIcenowy Zheng};
326674ef1d0SIcenowy Zheng
327674ef1d0SIcenowy Zheng&reg_dcdc2 {
328674ef1d0SIcenowy Zheng	regulator-always-on;
329674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1000000>;
330674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1300000>;
331674ef1d0SIcenowy Zheng	regulator-name = "vdd-cpux";
332674ef1d0SIcenowy Zheng};
333674ef1d0SIcenowy Zheng
334674ef1d0SIcenowy Zheng/* DCDC3 is polyphased with DCDC2 */
335674ef1d0SIcenowy Zheng
336674ef1d0SIcenowy Zheng&reg_dcdc5 {
337674ef1d0SIcenowy Zheng	regulator-always-on;
338674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1200000>;
339674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1200000>;
340674ef1d0SIcenowy Zheng	regulator-name = "vcc-dram";
341674ef1d0SIcenowy Zheng};
342674ef1d0SIcenowy Zheng
343674ef1d0SIcenowy Zheng&reg_dcdc6 {
344674ef1d0SIcenowy Zheng	regulator-always-on;
345674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1100000>;
346674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1100000>;
347674ef1d0SIcenowy Zheng	regulator-name = "vdd-sys";
348674ef1d0SIcenowy Zheng};
349674ef1d0SIcenowy Zheng
350674ef1d0SIcenowy Zheng&reg_dldo1 {
351674ef1d0SIcenowy Zheng	regulator-always-on;
352674ef1d0SIcenowy Zheng	regulator-min-microvolt = <3300000>;
353674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
354674ef1d0SIcenowy Zheng	regulator-name = "vcc-hdmi-dsi-sensor";
355674ef1d0SIcenowy Zheng};
356674ef1d0SIcenowy Zheng
357674ef1d0SIcenowy Zheng&reg_dldo3 {
358674ef1d0SIcenowy Zheng	regulator-min-microvolt = <2800000>;
359674ef1d0SIcenowy Zheng	regulator-max-microvolt = <2800000>;
360674ef1d0SIcenowy Zheng	regulator-name = "avdd-csi";
361674ef1d0SIcenowy Zheng};
362674ef1d0SIcenowy Zheng
363674ef1d0SIcenowy Zheng&reg_dldo4 {
364674ef1d0SIcenowy Zheng	regulator-min-microvolt = <3300000>;
365674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
366674ef1d0SIcenowy Zheng	regulator-name = "vcc-wifi";
367674ef1d0SIcenowy Zheng};
368674ef1d0SIcenowy Zheng
369674ef1d0SIcenowy Zheng&reg_drivevbus {
370674ef1d0SIcenowy Zheng	regulator-name = "usb0-vbus";
371674ef1d0SIcenowy Zheng	status = "okay";
372674ef1d0SIcenowy Zheng};
373674ef1d0SIcenowy Zheng
374674ef1d0SIcenowy Zheng&reg_eldo1 {
375674ef1d0SIcenowy Zheng	regulator-always-on;
376674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1800000>;
377674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1800000>;
378674ef1d0SIcenowy Zheng	regulator-name = "cpvdd";
379674ef1d0SIcenowy Zheng};
380674ef1d0SIcenowy Zheng
381674ef1d0SIcenowy Zheng&reg_eldo2 {
382674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1800000>;
383674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1800000>;
384674ef1d0SIcenowy Zheng	regulator-name = "vcca-1v8";
385674ef1d0SIcenowy Zheng};
386674ef1d0SIcenowy Zheng
387674ef1d0SIcenowy Zheng&reg_eldo3 {
388674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1800000>;
389674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1800000>;
390674ef1d0SIcenowy Zheng	regulator-name = "dvdd-1v8-csi";
391674ef1d0SIcenowy Zheng};
392674ef1d0SIcenowy Zheng
393674ef1d0SIcenowy Zheng&reg_fldo1 {
394674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1200000>;
395674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1200000>;
396674ef1d0SIcenowy Zheng	regulator-name = "vcc-1v2-hsic";
397674ef1d0SIcenowy Zheng};
398674ef1d0SIcenowy Zheng
399674ef1d0SIcenowy Zheng&reg_fldo2 {
400674ef1d0SIcenowy Zheng	regulator-always-on;
401674ef1d0SIcenowy Zheng	regulator-min-microvolt = <1100000>;
402674ef1d0SIcenowy Zheng	regulator-max-microvolt = <1100000>;
403674ef1d0SIcenowy Zheng	regulator-name = "vdd-cpus";
404674ef1d0SIcenowy Zheng};
405674ef1d0SIcenowy Zheng
406674ef1d0SIcenowy Zheng&reg_ldo_io0 {
407674ef1d0SIcenowy Zheng	regulator-min-microvolt = <3300000>;
408674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
409674ef1d0SIcenowy Zheng	regulator-name = "vcc-usb";
410674ef1d0SIcenowy Zheng	status = "okay";
411674ef1d0SIcenowy Zheng};
412674ef1d0SIcenowy Zheng
413674ef1d0SIcenowy Zheng&reg_ldo_io1 {
414674ef1d0SIcenowy Zheng	regulator-min-microvolt = <3300000>;
415674ef1d0SIcenowy Zheng	regulator-max-microvolt = <3300000>;
416674ef1d0SIcenowy Zheng	regulator-enable-ramp-delay = <3500000>;
417674ef1d0SIcenowy Zheng	regulator-name = "vcc-touchscreen";
418674ef1d0SIcenowy Zheng	status = "okay";
419674ef1d0SIcenowy Zheng};
420674ef1d0SIcenowy Zheng
421674ef1d0SIcenowy Zheng&reg_rtc_ldo {
422674ef1d0SIcenowy Zheng	regulator-name = "vcc-rtc";
423674ef1d0SIcenowy Zheng};
424674ef1d0SIcenowy Zheng
4258c2e09b9SDang Huynh&simplefb_hdmi {
4268c2e09b9SDang Huynh	vcc-hdmi-supply = <&reg_dldo1>;
4278c2e09b9SDang Huynh};
4288c2e09b9SDang Huynh
4298c2e09b9SDang Huynh&hdmi {
4308c2e09b9SDang Huynh	hvcc-supply = <&reg_dldo1>;
4318c2e09b9SDang Huynh	status = "okay";
4328c2e09b9SDang Huynh};
4338c2e09b9SDang Huynh
4348c2e09b9SDang Huynh&hdmi_out {
4358c2e09b9SDang Huynh	hdmi_out_con: endpoint {
4368c2e09b9SDang Huynh		remote-endpoint = <&hdmi_con_in>;
4378c2e09b9SDang Huynh	};
4388c2e09b9SDang Huynh};
4398c2e09b9SDang Huynh
440674ef1d0SIcenowy Zheng&sound {
441674ef1d0SIcenowy Zheng	status = "okay";
442674ef1d0SIcenowy Zheng	simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>;
443674ef1d0SIcenowy Zheng	simple-audio-card,widgets = "Microphone", "Internal Microphone Left",
444674ef1d0SIcenowy Zheng				    "Microphone", "Internal Microphone Right",
445674ef1d0SIcenowy Zheng				    "Headphone", "Headphone Jack",
446674ef1d0SIcenowy Zheng				    "Speaker", "Internal Speaker";
447674ef1d0SIcenowy Zheng	simple-audio-card,routing =
448631e6a35SSamuel Holland			"Left DAC", "DACL",
449631e6a35SSamuel Holland			"Right DAC", "DACR",
450674ef1d0SIcenowy Zheng			"Speaker Amp INL", "LINEOUT",
451674ef1d0SIcenowy Zheng			"Speaker Amp INR", "LINEOUT",
452674ef1d0SIcenowy Zheng			"Internal Speaker", "Speaker Amp OUTL",
453674ef1d0SIcenowy Zheng			"Internal Speaker", "Speaker Amp OUTR",
454674ef1d0SIcenowy Zheng			"Headphone Jack", "HP",
455631e6a35SSamuel Holland			"ADCL", "Left ADC",
456631e6a35SSamuel Holland			"ADCR", "Right ADC",
457674ef1d0SIcenowy Zheng			"Internal Microphone Left", "MBIAS",
458674ef1d0SIcenowy Zheng			"MIC1", "Internal Microphone Left",
459674ef1d0SIcenowy Zheng			"Internal Microphone Right", "HBIAS",
460674ef1d0SIcenowy Zheng			"MIC2", "Internal Microphone Right";
461674ef1d0SIcenowy Zheng};
462674ef1d0SIcenowy Zheng
463674ef1d0SIcenowy Zheng&uart0 {
464674ef1d0SIcenowy Zheng	pinctrl-names = "default";
465674ef1d0SIcenowy Zheng	pinctrl-0 = <&uart0_pb_pins>;
466674ef1d0SIcenowy Zheng	status = "okay";
467674ef1d0SIcenowy Zheng};
468674ef1d0SIcenowy Zheng
469674ef1d0SIcenowy Zheng&usb_otg {
470674ef1d0SIcenowy Zheng	dr_mode = "otg";
471674ef1d0SIcenowy Zheng	status = "okay";
472674ef1d0SIcenowy Zheng};
473674ef1d0SIcenowy Zheng
474674ef1d0SIcenowy Zheng&usb_power_supply {
475674ef1d0SIcenowy Zheng	status = "okay";
476674ef1d0SIcenowy Zheng};
477674ef1d0SIcenowy Zheng
478674ef1d0SIcenowy Zheng&usbphy {
479674ef1d0SIcenowy Zheng	usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
480674ef1d0SIcenowy Zheng	usb0_vbus_power-supply = <&usb_power_supply>;
481674ef1d0SIcenowy Zheng	usb0_vbus-supply = <&reg_drivevbus>;
482674ef1d0SIcenowy Zheng	usb1_vbus-supply = <&reg_ldo_io0>;
483674ef1d0SIcenowy Zheng	status = "okay";
484674ef1d0SIcenowy Zheng};
485