xref: /openbmc/linux/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
191f480d4SOndrej Jirman// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
291f480d4SOndrej Jirman// Copyright (C) 2020 Ondrej Jirman <megous@megous.com>
391f480d4SOndrej Jirman
491f480d4SOndrej Jirman/dts-v1/;
591f480d4SOndrej Jirman
691f480d4SOndrej Jirman#include "sun50i-a64-pinephone.dtsi"
791f480d4SOndrej Jirman
891f480d4SOndrej Jirman/ {
991f480d4SOndrej Jirman	model = "Pine64 PinePhone Braveheart (1.1)";
10536f74a8SDylan Van Assche	compatible = "pine64,pinephone-1.1", "pine64,pinephone", "allwinner,sun50i-a64";
1191f480d4SOndrej Jirman};
12a6a22f82SIcenowy Zheng
13a6a22f82SIcenowy Zheng&backlight {
14a6a22f82SIcenowy Zheng	power-supply = <&reg_ldo_io0>;
15a6a22f82SIcenowy Zheng	/*
16a6a22f82SIcenowy Zheng	 * PWM backlight circuit on this PinePhone revision was changed since
17a6a22f82SIcenowy Zheng	 * 1.0, and the lowest PWM duty cycle that doesn't lead to backlight
18a6a22f82SIcenowy Zheng	 * being off is around 20%. Duty cycle for the lowest brightness level
19a6a22f82SIcenowy Zheng	 * also varries quite a bit between individual boards, so the lowest
20a6a22f82SIcenowy Zheng	 * value here was chosen as a safe default.
21a6a22f82SIcenowy Zheng	 */
22a6a22f82SIcenowy Zheng	brightness-levels = <
23a6a22f82SIcenowy Zheng		774  793  814  842
24a6a22f82SIcenowy Zheng		882  935  1003 1088
25a6a22f82SIcenowy Zheng		1192 1316 1462 1633
26a6a22f82SIcenowy Zheng		1830 2054 2309 2596
27a6a22f82SIcenowy Zheng		2916 3271 3664 4096>;
28a6a22f82SIcenowy Zheng	num-interpolated-steps = <50>;
29a6a22f82SIcenowy Zheng	default-brightness-level = <400>;
30a6a22f82SIcenowy Zheng};
31085d96b8SLuca Weiss
32*aab941b8SSamuel Holland&codec_analog {
33*aab941b8SSamuel Holland	allwinner,internal-bias-resistor;
34*aab941b8SSamuel Holland};
35*aab941b8SSamuel Holland
36085d96b8SLuca Weiss&sgm3140 {
37085d96b8SLuca Weiss	enable-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
38085d96b8SLuca Weiss	flash-gpios = <&pio 2 3 GPIO_ACTIVE_HIGH>; /* PC3 */
39085d96b8SLuca Weiss};
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