1b4b8f2c9SClément Péron// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*cabbaed7SClément Péron// Copyright (c) 2016 ARM Ltd. 3b8bcf0e1SAndre Przywara 4b8bcf0e1SAndre Przywara/dts-v1/; 5b8bcf0e1SAndre Przywara 6b8bcf0e1SAndre Przywara#include "sun50i-a64.dtsi" 7b8bcf0e1SAndre Przywara 8b8bcf0e1SAndre Przywara#include <dt-bindings/gpio/gpio.h> 9b8bcf0e1SAndre Przywara 10b8bcf0e1SAndre Przywara/ { 11b8bcf0e1SAndre Przywara model = "BananaPi-M64"; 12b8bcf0e1SAndre Przywara compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64"; 13b8bcf0e1SAndre Przywara 14b8bcf0e1SAndre Przywara aliases { 1594f44288SCorentin Labbe ethernet0 = &emac; 16b8bcf0e1SAndre Przywara serial0 = &uart0; 17b8bcf0e1SAndre Przywara serial1 = &uart1; 18b8bcf0e1SAndre Przywara }; 19b8bcf0e1SAndre Przywara 20b8bcf0e1SAndre Przywara chosen { 21b8bcf0e1SAndre Przywara stdout-path = "serial0:115200n8"; 22b8bcf0e1SAndre Przywara }; 233bc1de8cSIcenowy Zheng 24f4e4453aSJagan Teki hdmi-connector { 25f4e4453aSJagan Teki compatible = "hdmi-connector"; 26f4e4453aSJagan Teki type = "a"; 27f4e4453aSJagan Teki 28f4e4453aSJagan Teki port { 29f4e4453aSJagan Teki hdmi_con_in: endpoint { 30f4e4453aSJagan Teki remote-endpoint = <&hdmi_out_con>; 31f4e4453aSJagan Teki }; 32f4e4453aSJagan Teki }; 33f4e4453aSJagan Teki }; 34f4e4453aSJagan Teki 3536252668SChen-Yu Tsai leds { 3636252668SChen-Yu Tsai compatible = "gpio-leds"; 3736252668SChen-Yu Tsai 3836252668SChen-Yu Tsai pwr-led { 3936252668SChen-Yu Tsai label = "bananapi-m64:red:pwr"; 4036252668SChen-Yu Tsai gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ 4136252668SChen-Yu Tsai default-state = "on"; 4236252668SChen-Yu Tsai }; 4336252668SChen-Yu Tsai 4436252668SChen-Yu Tsai green { 4536252668SChen-Yu Tsai label = "bananapi-m64:green:user"; 4636252668SChen-Yu Tsai gpios = <&pio 4 14 GPIO_ACTIVE_HIGH>; /* PE14 */ 4736252668SChen-Yu Tsai }; 4836252668SChen-Yu Tsai 4936252668SChen-Yu Tsai blue { 5036252668SChen-Yu Tsai label = "bananapi-m64:blue:user"; 5136252668SChen-Yu Tsai gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */ 5236252668SChen-Yu Tsai }; 5336252668SChen-Yu Tsai }; 5436252668SChen-Yu Tsai 553bc1de8cSIcenowy Zheng wifi_pwrseq: wifi_pwrseq { 563bc1de8cSIcenowy Zheng compatible = "mmc-pwrseq-simple"; 573bc1de8cSIcenowy Zheng reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ 58c266a2b4SChen-Yu Tsai clocks = <&rtc 1>; 59c266a2b4SChen-Yu Tsai clock-names = "ext_clock"; 603bc1de8cSIcenowy Zheng }; 61b8bcf0e1SAndre Przywara}; 62b8bcf0e1SAndre Przywara 63c56689e6SChen-Yu Tsai&codec { 64c56689e6SChen-Yu Tsai status = "okay"; 65c56689e6SChen-Yu Tsai}; 66c56689e6SChen-Yu Tsai 67c56689e6SChen-Yu Tsai&codec_analog { 6807de9094SChen-Yu Tsai cpvdd-supply = <®_eldo1>; 69c56689e6SChen-Yu Tsai status = "okay"; 70c56689e6SChen-Yu Tsai}; 71c56689e6SChen-Yu Tsai 72c56689e6SChen-Yu Tsai&dai { 73c56689e6SChen-Yu Tsai status = "okay"; 74c56689e6SChen-Yu Tsai}; 75c56689e6SChen-Yu Tsai 76f4e4453aSJagan Teki&de { 77f4e4453aSJagan Teki status = "okay"; 78f4e4453aSJagan Teki}; 79f4e4453aSJagan Teki 8081866805SJagan Teki&ehci0 { 8181866805SJagan Teki status = "okay"; 8281866805SJagan Teki}; 8381866805SJagan Teki 8415ec9598SIcenowy Zheng&ehci1 { 8515ec9598SIcenowy Zheng status = "okay"; 8615ec9598SIcenowy Zheng}; 8715ec9598SIcenowy Zheng 8894f44288SCorentin Labbe&emac { 8994f44288SCorentin Labbe pinctrl-names = "default"; 9094f44288SCorentin Labbe pinctrl-0 = <&rgmii_pins>; 9194f44288SCorentin Labbe phy-mode = "rgmii"; 9294f44288SCorentin Labbe phy-handle = <&ext_rgmii_phy>; 93bdfe4cebSIcenowy Zheng phy-supply = <®_dc1sw>; 9494f44288SCorentin Labbe status = "okay"; 9594f44288SCorentin Labbe}; 9694f44288SCorentin Labbe 97f4e4453aSJagan Teki&hdmi { 98f4e4453aSJagan Teki hvcc-supply = <®_dldo1>; 99f4e4453aSJagan Teki status = "okay"; 100f4e4453aSJagan Teki}; 101f4e4453aSJagan Teki 102f4e4453aSJagan Teki&hdmi_out { 103f4e4453aSJagan Teki hdmi_out_con: endpoint { 104f4e4453aSJagan Teki remote-endpoint = <&hdmi_con_in>; 105f4e4453aSJagan Teki }; 106f4e4453aSJagan Teki}; 107f4e4453aSJagan Teki 108b8bcf0e1SAndre Przywara&i2c1 { 109b8bcf0e1SAndre Przywara status = "okay"; 110b8bcf0e1SAndre Przywara}; 111b8bcf0e1SAndre Przywara 112b8bcf0e1SAndre Przywara&i2c1_pins { 113b8bcf0e1SAndre Przywara bias-pull-up; 114b8bcf0e1SAndre Przywara}; 115b8bcf0e1SAndre Przywara 11694f44288SCorentin Labbe&mdio { 11794f44288SCorentin Labbe ext_rgmii_phy: ethernet-phy@1 { 11894f44288SCorentin Labbe compatible = "ethernet-phy-ieee802.3-c22"; 11994f44288SCorentin Labbe reg = <1>; 12094f44288SCorentin Labbe }; 12194f44288SCorentin Labbe}; 12294f44288SCorentin Labbe 123b8bcf0e1SAndre Przywara&mmc0 { 124b8bcf0e1SAndre Przywara pinctrl-names = "default"; 125b8bcf0e1SAndre Przywara pinctrl-0 = <&mmc0_pins>; 1260ff75efbSIcenowy Zheng vmmc-supply = <®_dcdc1>; 127b75cb68dSTuomas Tynkkynen cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; 128b8bcf0e1SAndre Przywara disable-wp; 129b8bcf0e1SAndre Przywara bus-width = <4>; 130b8bcf0e1SAndre Przywara status = "okay"; 131b8bcf0e1SAndre Przywara}; 132b8bcf0e1SAndre Przywara 133b8bcf0e1SAndre Przywara&mmc1 { 134b8bcf0e1SAndre Przywara pinctrl-names = "default"; 135b8bcf0e1SAndre Przywara pinctrl-0 = <&mmc1_pins>; 1360ff75efbSIcenowy Zheng vmmc-supply = <®_dldo2>; 1370ff75efbSIcenowy Zheng vqmmc-supply = <®_dldo4>; 1383bc1de8cSIcenowy Zheng mmc-pwrseq = <&wifi_pwrseq>; 139b8bcf0e1SAndre Przywara bus-width = <4>; 140b8bcf0e1SAndre Przywara non-removable; 141b8bcf0e1SAndre Przywara status = "okay"; 1423bc1de8cSIcenowy Zheng 1433bc1de8cSIcenowy Zheng brcmf: wifi@1 { 1443bc1de8cSIcenowy Zheng reg = <1>; 1453bc1de8cSIcenowy Zheng compatible = "brcm,bcm4329-fmac"; 1463bc1de8cSIcenowy Zheng interrupt-parent = <&r_pio>; 1473bc1de8cSIcenowy Zheng interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */ 1483bc1de8cSIcenowy Zheng interrupt-names = "host-wake"; 1493bc1de8cSIcenowy Zheng }; 150b8bcf0e1SAndre Przywara}; 151b8bcf0e1SAndre Przywara 152b8bcf0e1SAndre Przywara&mmc2 { 153b8bcf0e1SAndre Przywara pinctrl-names = "default"; 154fa59dd2eSChen-Yu Tsai pinctrl-0 = <&mmc2_pins>, <&mmc2_ds_pin>; 1550ff75efbSIcenowy Zheng vmmc-supply = <®_dcdc1>; 156b8bcf0e1SAndre Przywara bus-width = <8>; 157b8bcf0e1SAndre Przywara non-removable; 158b8bcf0e1SAndre Przywara cap-mmc-hw-reset; 159b8bcf0e1SAndre Przywara status = "okay"; 160b8bcf0e1SAndre Przywara}; 161b8bcf0e1SAndre Przywara 16281866805SJagan Teki&ohci0 { 16381866805SJagan Teki status = "okay"; 16481866805SJagan Teki}; 16581866805SJagan Teki 16615ec9598SIcenowy Zheng&ohci1 { 16715ec9598SIcenowy Zheng status = "okay"; 16815ec9598SIcenowy Zheng}; 16915ec9598SIcenowy Zheng 1700ff75efbSIcenowy Zheng&r_rsb { 1710ff75efbSIcenowy Zheng status = "okay"; 1720ff75efbSIcenowy Zheng 1730ff75efbSIcenowy Zheng axp803: pmic@3a3 { 1740ff75efbSIcenowy Zheng compatible = "x-powers,axp803"; 1750ff75efbSIcenowy Zheng reg = <0x3a3>; 1760ff75efbSIcenowy Zheng interrupt-parent = <&r_intc>; 1770ff75efbSIcenowy Zheng interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 17881866805SJagan Teki x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */ 1790ff75efbSIcenowy Zheng }; 1800ff75efbSIcenowy Zheng}; 1810ff75efbSIcenowy Zheng 1820ff75efbSIcenowy Zheng#include "axp803.dtsi" 1830ff75efbSIcenowy Zheng 184a24270afSChen-Yu Tsai&ac_power_supply { 185a24270afSChen-Yu Tsai status = "okay"; 186a24270afSChen-Yu Tsai}; 187a24270afSChen-Yu Tsai 188a24270afSChen-Yu Tsai&battery_power_supply { 189a24270afSChen-Yu Tsai status = "okay"; 190a24270afSChen-Yu Tsai}; 191a24270afSChen-Yu Tsai 19236252668SChen-Yu Tsai®_aldo1 { 19336252668SChen-Yu Tsai /* 19436252668SChen-Yu Tsai * This regulator also drives the PE pingroup GPIOs, 19536252668SChen-Yu Tsai * which also controls two LEDs. 19636252668SChen-Yu Tsai */ 19736252668SChen-Yu Tsai regulator-always-on; 19836252668SChen-Yu Tsai regulator-min-microvolt = <2800000>; 19936252668SChen-Yu Tsai regulator-max-microvolt = <2800000>; 20036252668SChen-Yu Tsai regulator-name = "afvcc-csi"; 20136252668SChen-Yu Tsai}; 20236252668SChen-Yu Tsai 2030ff75efbSIcenowy Zheng®_aldo2 { 2040ff75efbSIcenowy Zheng regulator-always-on; 2050ff75efbSIcenowy Zheng regulator-min-microvolt = <1800000>; 2060ff75efbSIcenowy Zheng regulator-max-microvolt = <3300000>; 2070ff75efbSIcenowy Zheng regulator-name = "vcc-pl"; 2080ff75efbSIcenowy Zheng}; 2090ff75efbSIcenowy Zheng 2100ff75efbSIcenowy Zheng®_aldo3 { 2110ff75efbSIcenowy Zheng regulator-always-on; 2120ff75efbSIcenowy Zheng regulator-min-microvolt = <3000000>; 2130ff75efbSIcenowy Zheng regulator-max-microvolt = <3000000>; 2140ff75efbSIcenowy Zheng regulator-name = "vcc-pll-avcc"; 2150ff75efbSIcenowy Zheng}; 2160ff75efbSIcenowy Zheng 2170ff75efbSIcenowy Zheng®_dc1sw { 21836252668SChen-Yu Tsai /* 21936252668SChen-Yu Tsai * This regulator also indirectly drives the PD pingroup GPIOs, 22036252668SChen-Yu Tsai * which also controls the power LED. 22136252668SChen-Yu Tsai */ 22236252668SChen-Yu Tsai regulator-always-on; 2230ff75efbSIcenowy Zheng regulator-name = "vcc-phy"; 2240ff75efbSIcenowy Zheng}; 2250ff75efbSIcenowy Zheng 2260ff75efbSIcenowy Zheng®_dcdc1 { 2270ff75efbSIcenowy Zheng regulator-always-on; 2280ff75efbSIcenowy Zheng regulator-min-microvolt = <3300000>; 2290ff75efbSIcenowy Zheng regulator-max-microvolt = <3300000>; 2300ff75efbSIcenowy Zheng regulator-name = "vcc-3v3"; 2310ff75efbSIcenowy Zheng}; 2320ff75efbSIcenowy Zheng 2330ff75efbSIcenowy Zheng®_dcdc2 { 2340ff75efbSIcenowy Zheng regulator-always-on; 2350ff75efbSIcenowy Zheng regulator-min-microvolt = <1040000>; 2360ff75efbSIcenowy Zheng regulator-max-microvolt = <1300000>; 2370ff75efbSIcenowy Zheng regulator-name = "vdd-cpux"; 2380ff75efbSIcenowy Zheng}; 2390ff75efbSIcenowy Zheng 2400ff75efbSIcenowy Zheng/* DCDC3 is polyphased with DCDC2 */ 2410ff75efbSIcenowy Zheng 2420ff75efbSIcenowy Zheng®_dcdc5 { 2430ff75efbSIcenowy Zheng regulator-always-on; 2440ff75efbSIcenowy Zheng regulator-min-microvolt = <1500000>; 2450ff75efbSIcenowy Zheng regulator-max-microvolt = <1500000>; 2460ff75efbSIcenowy Zheng regulator-name = "vcc-dram"; 2470ff75efbSIcenowy Zheng}; 2480ff75efbSIcenowy Zheng 2490ff75efbSIcenowy Zheng®_dcdc6 { 2500ff75efbSIcenowy Zheng regulator-always-on; 2510ff75efbSIcenowy Zheng regulator-min-microvolt = <1100000>; 2520ff75efbSIcenowy Zheng regulator-max-microvolt = <1100000>; 2530ff75efbSIcenowy Zheng regulator-name = "vdd-sys"; 2540ff75efbSIcenowy Zheng}; 2550ff75efbSIcenowy Zheng 2560ff75efbSIcenowy Zheng®_dldo1 { 2570ff75efbSIcenowy Zheng regulator-min-microvolt = <3300000>; 2580ff75efbSIcenowy Zheng regulator-max-microvolt = <3300000>; 2590ff75efbSIcenowy Zheng regulator-name = "vcc-hdmi-dsi"; 2600ff75efbSIcenowy Zheng}; 2610ff75efbSIcenowy Zheng 2620ff75efbSIcenowy Zheng®_dldo2 { 2630ff75efbSIcenowy Zheng regulator-min-microvolt = <3300000>; 2640ff75efbSIcenowy Zheng regulator-max-microvolt = <3300000>; 2650ff75efbSIcenowy Zheng regulator-name = "vcc-wifi"; 2660ff75efbSIcenowy Zheng}; 2670ff75efbSIcenowy Zheng 2680ff75efbSIcenowy Zheng®_dldo4 { 2690ff75efbSIcenowy Zheng regulator-min-microvolt = <1800000>; 2700ff75efbSIcenowy Zheng regulator-max-microvolt = <3300000>; 2710ff75efbSIcenowy Zheng regulator-name = "vcc-wifi-io"; 2720ff75efbSIcenowy Zheng}; 2730ff75efbSIcenowy Zheng 27481866805SJagan Teki®_drivevbus { 27581866805SJagan Teki regulator-name = "usb0-vbus"; 27681866805SJagan Teki status = "okay"; 27781866805SJagan Teki}; 27881866805SJagan Teki 2790ff75efbSIcenowy Zheng®_eldo1 { 2800ff75efbSIcenowy Zheng regulator-min-microvolt = <1800000>; 2810ff75efbSIcenowy Zheng regulator-max-microvolt = <1800000>; 2820ff75efbSIcenowy Zheng regulator-name = "cpvdd"; 2830ff75efbSIcenowy Zheng}; 2840ff75efbSIcenowy Zheng 2850ff75efbSIcenowy Zheng®_fldo1 { 2860ff75efbSIcenowy Zheng regulator-min-microvolt = <1200000>; 2870ff75efbSIcenowy Zheng regulator-max-microvolt = <1200000>; 2880ff75efbSIcenowy Zheng regulator-name = "vcc-1v2-hsic"; 2890ff75efbSIcenowy Zheng}; 2900ff75efbSIcenowy Zheng 2910ff75efbSIcenowy Zheng/* 2920ff75efbSIcenowy Zheng * The A64 chip cannot work without this regulator off, although 2930ff75efbSIcenowy Zheng * it seems to be only driving the AR100 core. 2940ff75efbSIcenowy Zheng * Maybe we don't still know well about CPUs domain. 2950ff75efbSIcenowy Zheng */ 2960ff75efbSIcenowy Zheng®_fldo2 { 2970ff75efbSIcenowy Zheng regulator-always-on; 2980ff75efbSIcenowy Zheng regulator-min-microvolt = <1100000>; 2990ff75efbSIcenowy Zheng regulator-max-microvolt = <1100000>; 3000ff75efbSIcenowy Zheng regulator-name = "vdd-cpus"; 3010ff75efbSIcenowy Zheng}; 3020ff75efbSIcenowy Zheng 3030ff75efbSIcenowy Zheng®_rtc_ldo { 3040ff75efbSIcenowy Zheng regulator-name = "vcc-rtc"; 3050ff75efbSIcenowy Zheng}; 3060ff75efbSIcenowy Zheng 3075cbef9f9SIcenowy Zheng&simplefb_hdmi { 3085cbef9f9SIcenowy Zheng vcc-hdmi-supply = <®_dldo1>; 3095cbef9f9SIcenowy Zheng}; 3105cbef9f9SIcenowy Zheng 311c56689e6SChen-Yu Tsai&sound { 312c56689e6SChen-Yu Tsai status = "okay"; 313c56689e6SChen-Yu Tsai simple-audio-card,widgets = "Headphone", "Headphone Jack", 314c56689e6SChen-Yu Tsai "Microphone", "Microphone Jack", 315c56689e6SChen-Yu Tsai "Microphone", "Onboard Microphone"; 316c56689e6SChen-Yu Tsai simple-audio-card,routing = 317c56689e6SChen-Yu Tsai "Left DAC", "AIF1 Slot 0 Left", 318c56689e6SChen-Yu Tsai "Right DAC", "AIF1 Slot 0 Right", 319c56689e6SChen-Yu Tsai "AIF1 Slot 0 Left ADC", "Left ADC", 320c56689e6SChen-Yu Tsai "AIF1 Slot 0 Right ADC", "Right ADC", 321c56689e6SChen-Yu Tsai "Headphone Jack", "HP", 322c56689e6SChen-Yu Tsai "MIC2", "Microphone Jack", 323c56689e6SChen-Yu Tsai "Onboard Microphone", "MBIAS", 324c56689e6SChen-Yu Tsai "MIC1", "Onboard Microphone"; 325c56689e6SChen-Yu Tsai}; 326c56689e6SChen-Yu Tsai 327b8bcf0e1SAndre Przywara&uart0 { 328b8bcf0e1SAndre Przywara pinctrl-names = "default"; 329d91ebb95SChen-Yu Tsai pinctrl-0 = <&uart0_pb_pins>; 330b8bcf0e1SAndre Przywara status = "okay"; 331b8bcf0e1SAndre Przywara}; 332b8bcf0e1SAndre Przywara 333b8bcf0e1SAndre Przywara&uart1 { 334b8bcf0e1SAndre Przywara pinctrl-names = "default"; 335b8bcf0e1SAndre Przywara pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; 336c266a2b4SChen-Yu Tsai uart-has-rtscts; 337b8bcf0e1SAndre Przywara status = "okay"; 338c266a2b4SChen-Yu Tsai 339c266a2b4SChen-Yu Tsai bluetooth { 340c266a2b4SChen-Yu Tsai compatible = "brcm,bcm43438-bt"; 341c266a2b4SChen-Yu Tsai clocks = <&rtc 1>; 342c266a2b4SChen-Yu Tsai clock-names = "lpo"; 343c266a2b4SChen-Yu Tsai vbat-supply = <®_dldo2>; 344c266a2b4SChen-Yu Tsai vddio-supply = <®_dldo4>; 345c266a2b4SChen-Yu Tsai device-wakeup-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ 346c266a2b4SChen-Yu Tsai host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */ 347c266a2b4SChen-Yu Tsai shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ 348c266a2b4SChen-Yu Tsai }; 349b8bcf0e1SAndre Przywara}; 35015ec9598SIcenowy Zheng 35181866805SJagan Teki&usb_otg { 35281866805SJagan Teki dr_mode = "otg"; 35381866805SJagan Teki status = "okay"; 35481866805SJagan Teki}; 35581866805SJagan Teki 356cc072fb6SChen-Yu Tsai&usb_power_supply { 357cc072fb6SChen-Yu Tsai status = "okay"; 358cc072fb6SChen-Yu Tsai}; 359cc072fb6SChen-Yu Tsai 36015ec9598SIcenowy Zheng&usbphy { 36181866805SJagan Teki usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ 362cc072fb6SChen-Yu Tsai usb0_vbus_power-supply = <&usb_power_supply>; 36381866805SJagan Teki usb0_vbus-supply = <®_drivevbus>; 36415ec9598SIcenowy Zheng status = "okay"; 36515ec9598SIcenowy Zheng}; 366