xref: /openbmc/linux/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts (revision c56689e6f2fbbb92d853e1251819f9b5731d7389)
1b8bcf0e1SAndre Przywara/*
2b8bcf0e1SAndre Przywara * Copyright (c) 2016 ARM Ltd.
3b8bcf0e1SAndre Przywara *
4b8bcf0e1SAndre Przywara * This file is dual-licensed: you can use it either under the terms
5b8bcf0e1SAndre Przywara * of the GPL or the X11 license, at your option. Note that this dual
6b8bcf0e1SAndre Przywara * licensing only applies to this file, and not this project as a
7b8bcf0e1SAndre Przywara * whole.
8b8bcf0e1SAndre Przywara *
9b8bcf0e1SAndre Przywara *  a) This library is free software; you can redistribute it and/or
10b8bcf0e1SAndre Przywara *     modify it under the terms of the GNU General Public License as
11b8bcf0e1SAndre Przywara *     published by the Free Software Foundation; either version 2 of the
12b8bcf0e1SAndre Przywara *     License, or (at your option) any later version.
13b8bcf0e1SAndre Przywara *
14b8bcf0e1SAndre Przywara *     This library is distributed in the hope that it will be useful,
15b8bcf0e1SAndre Przywara *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16b8bcf0e1SAndre Przywara *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17b8bcf0e1SAndre Przywara *     GNU General Public License for more details.
18b8bcf0e1SAndre Przywara *
19b8bcf0e1SAndre Przywara * Or, alternatively,
20b8bcf0e1SAndre Przywara *
21b8bcf0e1SAndre Przywara *  b) Permission is hereby granted, free of charge, to any person
22b8bcf0e1SAndre Przywara *     obtaining a copy of this software and associated documentation
23b8bcf0e1SAndre Przywara *     files (the "Software"), to deal in the Software without
24b8bcf0e1SAndre Przywara *     restriction, including without limitation the rights to use,
25b8bcf0e1SAndre Przywara *     copy, modify, merge, publish, distribute, sublicense, and/or
26b8bcf0e1SAndre Przywara *     sell copies of the Software, and to permit persons to whom the
27b8bcf0e1SAndre Przywara *     Software is furnished to do so, subject to the following
28b8bcf0e1SAndre Przywara *     conditions:
29b8bcf0e1SAndre Przywara *
30b8bcf0e1SAndre Przywara *     The above copyright notice and this permission notice shall be
31b8bcf0e1SAndre Przywara *     included in all copies or substantial portions of the Software.
32b8bcf0e1SAndre Przywara *
33b8bcf0e1SAndre Przywara *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34b8bcf0e1SAndre Przywara *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35b8bcf0e1SAndre Przywara *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36b8bcf0e1SAndre Przywara *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37b8bcf0e1SAndre Przywara *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38b8bcf0e1SAndre Przywara *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39b8bcf0e1SAndre Przywara *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40b8bcf0e1SAndre Przywara *     OTHER DEALINGS IN THE SOFTWARE.
41b8bcf0e1SAndre Przywara */
42b8bcf0e1SAndre Przywara
43b8bcf0e1SAndre Przywara/dts-v1/;
44b8bcf0e1SAndre Przywara
45b8bcf0e1SAndre Przywara#include "sun50i-a64.dtsi"
46b8bcf0e1SAndre Przywara
47b8bcf0e1SAndre Przywara#include <dt-bindings/gpio/gpio.h>
48b8bcf0e1SAndre Przywara
49b8bcf0e1SAndre Przywara/ {
50b8bcf0e1SAndre Przywara	model = "BananaPi-M64";
51b8bcf0e1SAndre Przywara	compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
52b8bcf0e1SAndre Przywara
53b8bcf0e1SAndre Przywara	aliases {
5494f44288SCorentin Labbe		ethernet0 = &emac;
55b8bcf0e1SAndre Przywara		serial0 = &uart0;
56b8bcf0e1SAndre Przywara		serial1 = &uart1;
57b8bcf0e1SAndre Przywara	};
58b8bcf0e1SAndre Przywara
59b8bcf0e1SAndre Przywara	chosen {
60b8bcf0e1SAndre Przywara		stdout-path = "serial0:115200n8";
61b8bcf0e1SAndre Przywara	};
623bc1de8cSIcenowy Zheng
63f4e4453aSJagan Teki	hdmi-connector {
64f4e4453aSJagan Teki		compatible = "hdmi-connector";
65f4e4453aSJagan Teki		type = "a";
66f4e4453aSJagan Teki
67f4e4453aSJagan Teki		port {
68f4e4453aSJagan Teki			hdmi_con_in: endpoint {
69f4e4453aSJagan Teki				remote-endpoint = <&hdmi_out_con>;
70f4e4453aSJagan Teki			};
71f4e4453aSJagan Teki		};
72f4e4453aSJagan Teki	};
73f4e4453aSJagan Teki
7436252668SChen-Yu Tsai	leds {
7536252668SChen-Yu Tsai		compatible = "gpio-leds";
7636252668SChen-Yu Tsai
7736252668SChen-Yu Tsai		pwr-led {
7836252668SChen-Yu Tsai			label = "bananapi-m64:red:pwr";
7936252668SChen-Yu Tsai			gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
8036252668SChen-Yu Tsai			default-state = "on";
8136252668SChen-Yu Tsai		};
8236252668SChen-Yu Tsai
8336252668SChen-Yu Tsai		green {
8436252668SChen-Yu Tsai			label = "bananapi-m64:green:user";
8536252668SChen-Yu Tsai			gpios = <&pio 4 14 GPIO_ACTIVE_HIGH>; /* PE14 */
8636252668SChen-Yu Tsai		};
8736252668SChen-Yu Tsai
8836252668SChen-Yu Tsai		blue {
8936252668SChen-Yu Tsai			label = "bananapi-m64:blue:user";
9036252668SChen-Yu Tsai			gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */
9136252668SChen-Yu Tsai		};
9236252668SChen-Yu Tsai	};
9336252668SChen-Yu Tsai
943bc1de8cSIcenowy Zheng	wifi_pwrseq: wifi_pwrseq {
953bc1de8cSIcenowy Zheng		compatible = "mmc-pwrseq-simple";
963bc1de8cSIcenowy Zheng		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
973bc1de8cSIcenowy Zheng	};
98b8bcf0e1SAndre Przywara};
99b8bcf0e1SAndre Przywara
100*c56689e6SChen-Yu Tsai&codec {
101*c56689e6SChen-Yu Tsai	status = "okay";
102*c56689e6SChen-Yu Tsai};
103*c56689e6SChen-Yu Tsai
104*c56689e6SChen-Yu Tsai&codec_analog {
105*c56689e6SChen-Yu Tsai	hpvcc-supply = <&reg_eldo1>;
106*c56689e6SChen-Yu Tsai	status = "okay";
107*c56689e6SChen-Yu Tsai};
108*c56689e6SChen-Yu Tsai
109*c56689e6SChen-Yu Tsai&dai {
110*c56689e6SChen-Yu Tsai	status = "okay";
111*c56689e6SChen-Yu Tsai};
112*c56689e6SChen-Yu Tsai
113f4e4453aSJagan Teki&de {
114f4e4453aSJagan Teki	status = "okay";
115f4e4453aSJagan Teki};
116f4e4453aSJagan Teki
11781866805SJagan Teki&ehci0 {
11881866805SJagan Teki	status = "okay";
11981866805SJagan Teki};
12081866805SJagan Teki
12115ec9598SIcenowy Zheng&ehci1 {
12215ec9598SIcenowy Zheng	status = "okay";
12315ec9598SIcenowy Zheng};
12415ec9598SIcenowy Zheng
12594f44288SCorentin Labbe&emac {
12694f44288SCorentin Labbe	pinctrl-names = "default";
12794f44288SCorentin Labbe	pinctrl-0 = <&rgmii_pins>;
12894f44288SCorentin Labbe	phy-mode = "rgmii";
12994f44288SCorentin Labbe	phy-handle = <&ext_rgmii_phy>;
130bdfe4cebSIcenowy Zheng	phy-supply = <&reg_dc1sw>;
13194f44288SCorentin Labbe	status = "okay";
13294f44288SCorentin Labbe};
13394f44288SCorentin Labbe
134f4e4453aSJagan Teki&hdmi {
135f4e4453aSJagan Teki	hvcc-supply = <&reg_dldo1>;
136f4e4453aSJagan Teki	status = "okay";
137f4e4453aSJagan Teki};
138f4e4453aSJagan Teki
139f4e4453aSJagan Teki&hdmi_out {
140f4e4453aSJagan Teki	hdmi_out_con: endpoint {
141f4e4453aSJagan Teki		remote-endpoint = <&hdmi_con_in>;
142f4e4453aSJagan Teki	};
143f4e4453aSJagan Teki};
144f4e4453aSJagan Teki
145b8bcf0e1SAndre Przywara&i2c1 {
146b8bcf0e1SAndre Przywara	pinctrl-names = "default";
147b8bcf0e1SAndre Przywara	pinctrl-0 = <&i2c1_pins>;
148b8bcf0e1SAndre Przywara	status = "okay";
149b8bcf0e1SAndre Przywara};
150b8bcf0e1SAndre Przywara
151b8bcf0e1SAndre Przywara&i2c1_pins {
152b8bcf0e1SAndre Przywara	bias-pull-up;
153b8bcf0e1SAndre Przywara};
154b8bcf0e1SAndre Przywara
15594f44288SCorentin Labbe&mdio {
15694f44288SCorentin Labbe	ext_rgmii_phy: ethernet-phy@1 {
15794f44288SCorentin Labbe		compatible = "ethernet-phy-ieee802.3-c22";
15894f44288SCorentin Labbe		reg = <1>;
15994f44288SCorentin Labbe	};
16094f44288SCorentin Labbe};
16194f44288SCorentin Labbe
162b8bcf0e1SAndre Przywara&mmc0 {
163b8bcf0e1SAndre Przywara	pinctrl-names = "default";
164b8bcf0e1SAndre Przywara	pinctrl-0 = <&mmc0_pins>;
1650ff75efbSIcenowy Zheng	vmmc-supply = <&reg_dcdc1>;
166b75cb68dSTuomas Tynkkynen	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
167b8bcf0e1SAndre Przywara	disable-wp;
168b8bcf0e1SAndre Przywara	bus-width = <4>;
169b8bcf0e1SAndre Przywara	status = "okay";
170b8bcf0e1SAndre Przywara};
171b8bcf0e1SAndre Przywara
172b8bcf0e1SAndre Przywara&mmc1 {
173b8bcf0e1SAndre Przywara	pinctrl-names = "default";
174b8bcf0e1SAndre Przywara	pinctrl-0 = <&mmc1_pins>;
1750ff75efbSIcenowy Zheng	vmmc-supply = <&reg_dldo2>;
1760ff75efbSIcenowy Zheng	vqmmc-supply = <&reg_dldo4>;
1773bc1de8cSIcenowy Zheng	mmc-pwrseq = <&wifi_pwrseq>;
178b8bcf0e1SAndre Przywara	bus-width = <4>;
179b8bcf0e1SAndre Przywara	non-removable;
180b8bcf0e1SAndre Przywara	status = "okay";
1813bc1de8cSIcenowy Zheng
1823bc1de8cSIcenowy Zheng	brcmf: wifi@1 {
1833bc1de8cSIcenowy Zheng		reg = <1>;
1843bc1de8cSIcenowy Zheng		compatible = "brcm,bcm4329-fmac";
1853bc1de8cSIcenowy Zheng		interrupt-parent = <&r_pio>;
1863bc1de8cSIcenowy Zheng		interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
1873bc1de8cSIcenowy Zheng		interrupt-names = "host-wake";
1883bc1de8cSIcenowy Zheng	};
189b8bcf0e1SAndre Przywara};
190b8bcf0e1SAndre Przywara
191b8bcf0e1SAndre Przywara&mmc2 {
192b8bcf0e1SAndre Przywara	pinctrl-names = "default";
193fa59dd2eSChen-Yu Tsai	pinctrl-0 = <&mmc2_pins>, <&mmc2_ds_pin>;
1940ff75efbSIcenowy Zheng	vmmc-supply = <&reg_dcdc1>;
195b8bcf0e1SAndre Przywara	bus-width = <8>;
196b8bcf0e1SAndre Przywara	non-removable;
197b8bcf0e1SAndre Przywara	cap-mmc-hw-reset;
198b8bcf0e1SAndre Przywara	status = "okay";
199b8bcf0e1SAndre Przywara};
200b8bcf0e1SAndre Przywara
20181866805SJagan Teki&ohci0 {
20281866805SJagan Teki	status = "okay";
20381866805SJagan Teki};
20481866805SJagan Teki
20515ec9598SIcenowy Zheng&ohci1 {
20615ec9598SIcenowy Zheng	status = "okay";
20715ec9598SIcenowy Zheng};
20815ec9598SIcenowy Zheng
2090ff75efbSIcenowy Zheng&r_rsb {
2100ff75efbSIcenowy Zheng	status = "okay";
2110ff75efbSIcenowy Zheng
2120ff75efbSIcenowy Zheng	axp803: pmic@3a3 {
2130ff75efbSIcenowy Zheng		compatible = "x-powers,axp803";
2140ff75efbSIcenowy Zheng		reg = <0x3a3>;
2150ff75efbSIcenowy Zheng		interrupt-parent = <&r_intc>;
2160ff75efbSIcenowy Zheng		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
21781866805SJagan Teki		x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
2180ff75efbSIcenowy Zheng	};
2190ff75efbSIcenowy Zheng};
2200ff75efbSIcenowy Zheng
2210ff75efbSIcenowy Zheng#include "axp803.dtsi"
2220ff75efbSIcenowy Zheng
22336252668SChen-Yu Tsai&reg_aldo1 {
22436252668SChen-Yu Tsai	/*
22536252668SChen-Yu Tsai	 * This regulator also drives the PE pingroup GPIOs,
22636252668SChen-Yu Tsai	 * which also controls two LEDs.
22736252668SChen-Yu Tsai	 */
22836252668SChen-Yu Tsai	regulator-always-on;
22936252668SChen-Yu Tsai	regulator-min-microvolt = <2800000>;
23036252668SChen-Yu Tsai	regulator-max-microvolt = <2800000>;
23136252668SChen-Yu Tsai	regulator-name = "afvcc-csi";
23236252668SChen-Yu Tsai};
23336252668SChen-Yu Tsai
2340ff75efbSIcenowy Zheng&reg_aldo2 {
2350ff75efbSIcenowy Zheng	regulator-always-on;
2360ff75efbSIcenowy Zheng	regulator-min-microvolt = <1800000>;
2370ff75efbSIcenowy Zheng	regulator-max-microvolt = <3300000>;
2380ff75efbSIcenowy Zheng	regulator-name = "vcc-pl";
2390ff75efbSIcenowy Zheng};
2400ff75efbSIcenowy Zheng
2410ff75efbSIcenowy Zheng&reg_aldo3 {
2420ff75efbSIcenowy Zheng	regulator-always-on;
2430ff75efbSIcenowy Zheng	regulator-min-microvolt = <3000000>;
2440ff75efbSIcenowy Zheng	regulator-max-microvolt = <3000000>;
2450ff75efbSIcenowy Zheng	regulator-name = "vcc-pll-avcc";
2460ff75efbSIcenowy Zheng};
2470ff75efbSIcenowy Zheng
2480ff75efbSIcenowy Zheng&reg_dc1sw {
24936252668SChen-Yu Tsai	/*
25036252668SChen-Yu Tsai	 * This regulator also indirectly drives the PD pingroup GPIOs,
25136252668SChen-Yu Tsai	 * which also controls the power LED.
25236252668SChen-Yu Tsai	 */
25336252668SChen-Yu Tsai	regulator-always-on;
2540ff75efbSIcenowy Zheng	regulator-name = "vcc-phy";
2550ff75efbSIcenowy Zheng};
2560ff75efbSIcenowy Zheng
2570ff75efbSIcenowy Zheng&reg_dcdc1 {
2580ff75efbSIcenowy Zheng	regulator-always-on;
2590ff75efbSIcenowy Zheng	regulator-min-microvolt = <3300000>;
2600ff75efbSIcenowy Zheng	regulator-max-microvolt = <3300000>;
2610ff75efbSIcenowy Zheng	regulator-name = "vcc-3v3";
2620ff75efbSIcenowy Zheng};
2630ff75efbSIcenowy Zheng
2640ff75efbSIcenowy Zheng&reg_dcdc2 {
2650ff75efbSIcenowy Zheng	regulator-always-on;
2660ff75efbSIcenowy Zheng	regulator-min-microvolt = <1040000>;
2670ff75efbSIcenowy Zheng	regulator-max-microvolt = <1300000>;
2680ff75efbSIcenowy Zheng	regulator-name = "vdd-cpux";
2690ff75efbSIcenowy Zheng};
2700ff75efbSIcenowy Zheng
2710ff75efbSIcenowy Zheng/* DCDC3 is polyphased with DCDC2 */
2720ff75efbSIcenowy Zheng
2730ff75efbSIcenowy Zheng&reg_dcdc5 {
2740ff75efbSIcenowy Zheng	regulator-always-on;
2750ff75efbSIcenowy Zheng	regulator-min-microvolt = <1500000>;
2760ff75efbSIcenowy Zheng	regulator-max-microvolt = <1500000>;
2770ff75efbSIcenowy Zheng	regulator-name = "vcc-dram";
2780ff75efbSIcenowy Zheng};
2790ff75efbSIcenowy Zheng
2800ff75efbSIcenowy Zheng&reg_dcdc6 {
2810ff75efbSIcenowy Zheng	regulator-always-on;
2820ff75efbSIcenowy Zheng	regulator-min-microvolt = <1100000>;
2830ff75efbSIcenowy Zheng	regulator-max-microvolt = <1100000>;
2840ff75efbSIcenowy Zheng	regulator-name = "vdd-sys";
2850ff75efbSIcenowy Zheng};
2860ff75efbSIcenowy Zheng
2870ff75efbSIcenowy Zheng&reg_dldo1 {
2880ff75efbSIcenowy Zheng	regulator-min-microvolt = <3300000>;
2890ff75efbSIcenowy Zheng	regulator-max-microvolt = <3300000>;
2900ff75efbSIcenowy Zheng	regulator-name = "vcc-hdmi-dsi";
2910ff75efbSIcenowy Zheng};
2920ff75efbSIcenowy Zheng
2930ff75efbSIcenowy Zheng&reg_dldo2 {
2940ff75efbSIcenowy Zheng	regulator-min-microvolt = <3300000>;
2950ff75efbSIcenowy Zheng	regulator-max-microvolt = <3300000>;
2960ff75efbSIcenowy Zheng	regulator-name = "vcc-wifi";
2970ff75efbSIcenowy Zheng};
2980ff75efbSIcenowy Zheng
2990ff75efbSIcenowy Zheng&reg_dldo4 {
3000ff75efbSIcenowy Zheng	regulator-min-microvolt = <1800000>;
3010ff75efbSIcenowy Zheng	regulator-max-microvolt = <3300000>;
3020ff75efbSIcenowy Zheng	regulator-name = "vcc-wifi-io";
3030ff75efbSIcenowy Zheng};
3040ff75efbSIcenowy Zheng
30581866805SJagan Teki&reg_drivevbus {
30681866805SJagan Teki	regulator-name = "usb0-vbus";
30781866805SJagan Teki	status = "okay";
30881866805SJagan Teki};
30981866805SJagan Teki
3100ff75efbSIcenowy Zheng&reg_eldo1 {
3110ff75efbSIcenowy Zheng	regulator-min-microvolt = <1800000>;
3120ff75efbSIcenowy Zheng	regulator-max-microvolt = <1800000>;
3130ff75efbSIcenowy Zheng	regulator-name = "cpvdd";
3140ff75efbSIcenowy Zheng};
3150ff75efbSIcenowy Zheng
3160ff75efbSIcenowy Zheng&reg_fldo1 {
3170ff75efbSIcenowy Zheng	regulator-min-microvolt = <1200000>;
3180ff75efbSIcenowy Zheng	regulator-max-microvolt = <1200000>;
3190ff75efbSIcenowy Zheng	regulator-name = "vcc-1v2-hsic";
3200ff75efbSIcenowy Zheng};
3210ff75efbSIcenowy Zheng
3220ff75efbSIcenowy Zheng/*
3230ff75efbSIcenowy Zheng * The A64 chip cannot work without this regulator off, although
3240ff75efbSIcenowy Zheng * it seems to be only driving the AR100 core.
3250ff75efbSIcenowy Zheng * Maybe we don't still know well about CPUs domain.
3260ff75efbSIcenowy Zheng */
3270ff75efbSIcenowy Zheng&reg_fldo2 {
3280ff75efbSIcenowy Zheng	regulator-always-on;
3290ff75efbSIcenowy Zheng	regulator-min-microvolt = <1100000>;
3300ff75efbSIcenowy Zheng	regulator-max-microvolt = <1100000>;
3310ff75efbSIcenowy Zheng	regulator-name = "vdd-cpus";
3320ff75efbSIcenowy Zheng};
3330ff75efbSIcenowy Zheng
3340ff75efbSIcenowy Zheng&reg_rtc_ldo {
3350ff75efbSIcenowy Zheng	regulator-name = "vcc-rtc";
3360ff75efbSIcenowy Zheng};
3370ff75efbSIcenowy Zheng
3385cbef9f9SIcenowy Zheng&simplefb_hdmi {
3395cbef9f9SIcenowy Zheng	vcc-hdmi-supply = <&reg_dldo1>;
3405cbef9f9SIcenowy Zheng};
3415cbef9f9SIcenowy Zheng
342*c56689e6SChen-Yu Tsai&sound {
343*c56689e6SChen-Yu Tsai	status = "okay";
344*c56689e6SChen-Yu Tsai	simple-audio-card,widgets = "Headphone", "Headphone Jack",
345*c56689e6SChen-Yu Tsai				    "Microphone", "Microphone Jack",
346*c56689e6SChen-Yu Tsai				    "Microphone", "Onboard Microphone";
347*c56689e6SChen-Yu Tsai	simple-audio-card,routing =
348*c56689e6SChen-Yu Tsai			"Left DAC", "AIF1 Slot 0 Left",
349*c56689e6SChen-Yu Tsai			"Right DAC", "AIF1 Slot 0 Right",
350*c56689e6SChen-Yu Tsai			"AIF1 Slot 0 Left ADC", "Left ADC",
351*c56689e6SChen-Yu Tsai			"AIF1 Slot 0 Right ADC", "Right ADC",
352*c56689e6SChen-Yu Tsai			"Headphone Jack", "HP",
353*c56689e6SChen-Yu Tsai			"MIC2", "Microphone Jack",
354*c56689e6SChen-Yu Tsai			"Onboard Microphone", "MBIAS",
355*c56689e6SChen-Yu Tsai			"MIC1", "Onboard Microphone";
356*c56689e6SChen-Yu Tsai};
357*c56689e6SChen-Yu Tsai
358b8bcf0e1SAndre Przywara&uart0 {
359b8bcf0e1SAndre Przywara	pinctrl-names = "default";
360d91ebb95SChen-Yu Tsai	pinctrl-0 = <&uart0_pb_pins>;
361b8bcf0e1SAndre Przywara	status = "okay";
362b8bcf0e1SAndre Przywara};
363b8bcf0e1SAndre Przywara
364b8bcf0e1SAndre Przywara&uart1 {
365b8bcf0e1SAndre Przywara	pinctrl-names = "default";
366b8bcf0e1SAndre Przywara	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
367b8bcf0e1SAndre Przywara	status = "okay";
368b8bcf0e1SAndre Przywara};
36915ec9598SIcenowy Zheng
37081866805SJagan Teki&usb_otg {
37181866805SJagan Teki	dr_mode = "otg";
37281866805SJagan Teki	status = "okay";
37381866805SJagan Teki};
37481866805SJagan Teki
37515ec9598SIcenowy Zheng&usbphy {
37681866805SJagan Teki	usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
37781866805SJagan Teki	usb0_vbus-supply = <&reg_drivevbus>;
37815ec9598SIcenowy Zheng	status = "okay";
37915ec9598SIcenowy Zheng};
380