xref: /openbmc/linux/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts (revision b4b8f2c961582f4ab9176e35f59b8ed6a5e108c6)
1*b4b8f2c9SClément Péron// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2b8bcf0e1SAndre Przywara/*
3b8bcf0e1SAndre Przywara * Copyright (c) 2016 ARM Ltd.
4b8bcf0e1SAndre Przywara */
5b8bcf0e1SAndre Przywara
6b8bcf0e1SAndre Przywara/dts-v1/;
7b8bcf0e1SAndre Przywara
8b8bcf0e1SAndre Przywara#include "sun50i-a64.dtsi"
9b8bcf0e1SAndre Przywara
10b8bcf0e1SAndre Przywara#include <dt-bindings/gpio/gpio.h>
11b8bcf0e1SAndre Przywara
12b8bcf0e1SAndre Przywara/ {
13b8bcf0e1SAndre Przywara	model = "BananaPi-M64";
14b8bcf0e1SAndre Przywara	compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
15b8bcf0e1SAndre Przywara
16b8bcf0e1SAndre Przywara	aliases {
1794f44288SCorentin Labbe		ethernet0 = &emac;
18b8bcf0e1SAndre Przywara		serial0 = &uart0;
19b8bcf0e1SAndre Przywara		serial1 = &uart1;
20b8bcf0e1SAndre Przywara	};
21b8bcf0e1SAndre Przywara
22b8bcf0e1SAndre Przywara	chosen {
23b8bcf0e1SAndre Przywara		stdout-path = "serial0:115200n8";
24b8bcf0e1SAndre Przywara	};
253bc1de8cSIcenowy Zheng
26f4e4453aSJagan Teki	hdmi-connector {
27f4e4453aSJagan Teki		compatible = "hdmi-connector";
28f4e4453aSJagan Teki		type = "a";
29f4e4453aSJagan Teki
30f4e4453aSJagan Teki		port {
31f4e4453aSJagan Teki			hdmi_con_in: endpoint {
32f4e4453aSJagan Teki				remote-endpoint = <&hdmi_out_con>;
33f4e4453aSJagan Teki			};
34f4e4453aSJagan Teki		};
35f4e4453aSJagan Teki	};
36f4e4453aSJagan Teki
3736252668SChen-Yu Tsai	leds {
3836252668SChen-Yu Tsai		compatible = "gpio-leds";
3936252668SChen-Yu Tsai
4036252668SChen-Yu Tsai		pwr-led {
4136252668SChen-Yu Tsai			label = "bananapi-m64:red:pwr";
4236252668SChen-Yu Tsai			gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
4336252668SChen-Yu Tsai			default-state = "on";
4436252668SChen-Yu Tsai		};
4536252668SChen-Yu Tsai
4636252668SChen-Yu Tsai		green {
4736252668SChen-Yu Tsai			label = "bananapi-m64:green:user";
4836252668SChen-Yu Tsai			gpios = <&pio 4 14 GPIO_ACTIVE_HIGH>; /* PE14 */
4936252668SChen-Yu Tsai		};
5036252668SChen-Yu Tsai
5136252668SChen-Yu Tsai		blue {
5236252668SChen-Yu Tsai			label = "bananapi-m64:blue:user";
5336252668SChen-Yu Tsai			gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */
5436252668SChen-Yu Tsai		};
5536252668SChen-Yu Tsai	};
5636252668SChen-Yu Tsai
573bc1de8cSIcenowy Zheng	wifi_pwrseq: wifi_pwrseq {
583bc1de8cSIcenowy Zheng		compatible = "mmc-pwrseq-simple";
593bc1de8cSIcenowy Zheng		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
60c266a2b4SChen-Yu Tsai		clocks = <&rtc 1>;
61c266a2b4SChen-Yu Tsai		clock-names = "ext_clock";
623bc1de8cSIcenowy Zheng	};
63b8bcf0e1SAndre Przywara};
64b8bcf0e1SAndre Przywara
65c56689e6SChen-Yu Tsai&codec {
66c56689e6SChen-Yu Tsai	status = "okay";
67c56689e6SChen-Yu Tsai};
68c56689e6SChen-Yu Tsai
69c56689e6SChen-Yu Tsai&codec_analog {
7007de9094SChen-Yu Tsai	cpvdd-supply = <&reg_eldo1>;
71c56689e6SChen-Yu Tsai	status = "okay";
72c56689e6SChen-Yu Tsai};
73c56689e6SChen-Yu Tsai
74c56689e6SChen-Yu Tsai&dai {
75c56689e6SChen-Yu Tsai	status = "okay";
76c56689e6SChen-Yu Tsai};
77c56689e6SChen-Yu Tsai
78f4e4453aSJagan Teki&de {
79f4e4453aSJagan Teki	status = "okay";
80f4e4453aSJagan Teki};
81f4e4453aSJagan Teki
8281866805SJagan Teki&ehci0 {
8381866805SJagan Teki	status = "okay";
8481866805SJagan Teki};
8581866805SJagan Teki
8615ec9598SIcenowy Zheng&ehci1 {
8715ec9598SIcenowy Zheng	status = "okay";
8815ec9598SIcenowy Zheng};
8915ec9598SIcenowy Zheng
9094f44288SCorentin Labbe&emac {
9194f44288SCorentin Labbe	pinctrl-names = "default";
9294f44288SCorentin Labbe	pinctrl-0 = <&rgmii_pins>;
9394f44288SCorentin Labbe	phy-mode = "rgmii";
9494f44288SCorentin Labbe	phy-handle = <&ext_rgmii_phy>;
95bdfe4cebSIcenowy Zheng	phy-supply = <&reg_dc1sw>;
9694f44288SCorentin Labbe	status = "okay";
9794f44288SCorentin Labbe};
9894f44288SCorentin Labbe
99f4e4453aSJagan Teki&hdmi {
100f4e4453aSJagan Teki	hvcc-supply = <&reg_dldo1>;
101f4e4453aSJagan Teki	status = "okay";
102f4e4453aSJagan Teki};
103f4e4453aSJagan Teki
104f4e4453aSJagan Teki&hdmi_out {
105f4e4453aSJagan Teki	hdmi_out_con: endpoint {
106f4e4453aSJagan Teki		remote-endpoint = <&hdmi_con_in>;
107f4e4453aSJagan Teki	};
108f4e4453aSJagan Teki};
109f4e4453aSJagan Teki
110b8bcf0e1SAndre Przywara&i2c1 {
111b8bcf0e1SAndre Przywara	status = "okay";
112b8bcf0e1SAndre Przywara};
113b8bcf0e1SAndre Przywara
114b8bcf0e1SAndre Przywara&i2c1_pins {
115b8bcf0e1SAndre Przywara	bias-pull-up;
116b8bcf0e1SAndre Przywara};
117b8bcf0e1SAndre Przywara
11894f44288SCorentin Labbe&mdio {
11994f44288SCorentin Labbe	ext_rgmii_phy: ethernet-phy@1 {
12094f44288SCorentin Labbe		compatible = "ethernet-phy-ieee802.3-c22";
12194f44288SCorentin Labbe		reg = <1>;
12294f44288SCorentin Labbe	};
12394f44288SCorentin Labbe};
12494f44288SCorentin Labbe
125b8bcf0e1SAndre Przywara&mmc0 {
126b8bcf0e1SAndre Przywara	pinctrl-names = "default";
127b8bcf0e1SAndre Przywara	pinctrl-0 = <&mmc0_pins>;
1280ff75efbSIcenowy Zheng	vmmc-supply = <&reg_dcdc1>;
129b75cb68dSTuomas Tynkkynen	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
130b8bcf0e1SAndre Przywara	disable-wp;
131b8bcf0e1SAndre Przywara	bus-width = <4>;
132b8bcf0e1SAndre Przywara	status = "okay";
133b8bcf0e1SAndre Przywara};
134b8bcf0e1SAndre Przywara
135b8bcf0e1SAndre Przywara&mmc1 {
136b8bcf0e1SAndre Przywara	pinctrl-names = "default";
137b8bcf0e1SAndre Przywara	pinctrl-0 = <&mmc1_pins>;
1380ff75efbSIcenowy Zheng	vmmc-supply = <&reg_dldo2>;
1390ff75efbSIcenowy Zheng	vqmmc-supply = <&reg_dldo4>;
1403bc1de8cSIcenowy Zheng	mmc-pwrseq = <&wifi_pwrseq>;
141b8bcf0e1SAndre Przywara	bus-width = <4>;
142b8bcf0e1SAndre Przywara	non-removable;
143b8bcf0e1SAndre Przywara	status = "okay";
1443bc1de8cSIcenowy Zheng
1453bc1de8cSIcenowy Zheng	brcmf: wifi@1 {
1463bc1de8cSIcenowy Zheng		reg = <1>;
1473bc1de8cSIcenowy Zheng		compatible = "brcm,bcm4329-fmac";
1483bc1de8cSIcenowy Zheng		interrupt-parent = <&r_pio>;
1493bc1de8cSIcenowy Zheng		interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
1503bc1de8cSIcenowy Zheng		interrupt-names = "host-wake";
1513bc1de8cSIcenowy Zheng	};
152b8bcf0e1SAndre Przywara};
153b8bcf0e1SAndre Przywara
154b8bcf0e1SAndre Przywara&mmc2 {
155b8bcf0e1SAndre Przywara	pinctrl-names = "default";
156fa59dd2eSChen-Yu Tsai	pinctrl-0 = <&mmc2_pins>, <&mmc2_ds_pin>;
1570ff75efbSIcenowy Zheng	vmmc-supply = <&reg_dcdc1>;
158b8bcf0e1SAndre Przywara	bus-width = <8>;
159b8bcf0e1SAndre Przywara	non-removable;
160b8bcf0e1SAndre Przywara	cap-mmc-hw-reset;
161b8bcf0e1SAndre Przywara	status = "okay";
162b8bcf0e1SAndre Przywara};
163b8bcf0e1SAndre Przywara
16481866805SJagan Teki&ohci0 {
16581866805SJagan Teki	status = "okay";
16681866805SJagan Teki};
16781866805SJagan Teki
16815ec9598SIcenowy Zheng&ohci1 {
16915ec9598SIcenowy Zheng	status = "okay";
17015ec9598SIcenowy Zheng};
17115ec9598SIcenowy Zheng
1720ff75efbSIcenowy Zheng&r_rsb {
1730ff75efbSIcenowy Zheng	status = "okay";
1740ff75efbSIcenowy Zheng
1750ff75efbSIcenowy Zheng	axp803: pmic@3a3 {
1760ff75efbSIcenowy Zheng		compatible = "x-powers,axp803";
1770ff75efbSIcenowy Zheng		reg = <0x3a3>;
1780ff75efbSIcenowy Zheng		interrupt-parent = <&r_intc>;
1790ff75efbSIcenowy Zheng		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
18081866805SJagan Teki		x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
1810ff75efbSIcenowy Zheng	};
1820ff75efbSIcenowy Zheng};
1830ff75efbSIcenowy Zheng
1840ff75efbSIcenowy Zheng#include "axp803.dtsi"
1850ff75efbSIcenowy Zheng
186a24270afSChen-Yu Tsai&ac_power_supply {
187a24270afSChen-Yu Tsai	status = "okay";
188a24270afSChen-Yu Tsai};
189a24270afSChen-Yu Tsai
190a24270afSChen-Yu Tsai&battery_power_supply {
191a24270afSChen-Yu Tsai	status = "okay";
192a24270afSChen-Yu Tsai};
193a24270afSChen-Yu Tsai
19436252668SChen-Yu Tsai&reg_aldo1 {
19536252668SChen-Yu Tsai	/*
19636252668SChen-Yu Tsai	 * This regulator also drives the PE pingroup GPIOs,
19736252668SChen-Yu Tsai	 * which also controls two LEDs.
19836252668SChen-Yu Tsai	 */
19936252668SChen-Yu Tsai	regulator-always-on;
20036252668SChen-Yu Tsai	regulator-min-microvolt = <2800000>;
20136252668SChen-Yu Tsai	regulator-max-microvolt = <2800000>;
20236252668SChen-Yu Tsai	regulator-name = "afvcc-csi";
20336252668SChen-Yu Tsai};
20436252668SChen-Yu Tsai
2050ff75efbSIcenowy Zheng&reg_aldo2 {
2060ff75efbSIcenowy Zheng	regulator-always-on;
2070ff75efbSIcenowy Zheng	regulator-min-microvolt = <1800000>;
2080ff75efbSIcenowy Zheng	regulator-max-microvolt = <3300000>;
2090ff75efbSIcenowy Zheng	regulator-name = "vcc-pl";
2100ff75efbSIcenowy Zheng};
2110ff75efbSIcenowy Zheng
2120ff75efbSIcenowy Zheng&reg_aldo3 {
2130ff75efbSIcenowy Zheng	regulator-always-on;
2140ff75efbSIcenowy Zheng	regulator-min-microvolt = <3000000>;
2150ff75efbSIcenowy Zheng	regulator-max-microvolt = <3000000>;
2160ff75efbSIcenowy Zheng	regulator-name = "vcc-pll-avcc";
2170ff75efbSIcenowy Zheng};
2180ff75efbSIcenowy Zheng
2190ff75efbSIcenowy Zheng&reg_dc1sw {
22036252668SChen-Yu Tsai	/*
22136252668SChen-Yu Tsai	 * This regulator also indirectly drives the PD pingroup GPIOs,
22236252668SChen-Yu Tsai	 * which also controls the power LED.
22336252668SChen-Yu Tsai	 */
22436252668SChen-Yu Tsai	regulator-always-on;
2250ff75efbSIcenowy Zheng	regulator-name = "vcc-phy";
2260ff75efbSIcenowy Zheng};
2270ff75efbSIcenowy Zheng
2280ff75efbSIcenowy Zheng&reg_dcdc1 {
2290ff75efbSIcenowy Zheng	regulator-always-on;
2300ff75efbSIcenowy Zheng	regulator-min-microvolt = <3300000>;
2310ff75efbSIcenowy Zheng	regulator-max-microvolt = <3300000>;
2320ff75efbSIcenowy Zheng	regulator-name = "vcc-3v3";
2330ff75efbSIcenowy Zheng};
2340ff75efbSIcenowy Zheng
2350ff75efbSIcenowy Zheng&reg_dcdc2 {
2360ff75efbSIcenowy Zheng	regulator-always-on;
2370ff75efbSIcenowy Zheng	regulator-min-microvolt = <1040000>;
2380ff75efbSIcenowy Zheng	regulator-max-microvolt = <1300000>;
2390ff75efbSIcenowy Zheng	regulator-name = "vdd-cpux";
2400ff75efbSIcenowy Zheng};
2410ff75efbSIcenowy Zheng
2420ff75efbSIcenowy Zheng/* DCDC3 is polyphased with DCDC2 */
2430ff75efbSIcenowy Zheng
2440ff75efbSIcenowy Zheng&reg_dcdc5 {
2450ff75efbSIcenowy Zheng	regulator-always-on;
2460ff75efbSIcenowy Zheng	regulator-min-microvolt = <1500000>;
2470ff75efbSIcenowy Zheng	regulator-max-microvolt = <1500000>;
2480ff75efbSIcenowy Zheng	regulator-name = "vcc-dram";
2490ff75efbSIcenowy Zheng};
2500ff75efbSIcenowy Zheng
2510ff75efbSIcenowy Zheng&reg_dcdc6 {
2520ff75efbSIcenowy Zheng	regulator-always-on;
2530ff75efbSIcenowy Zheng	regulator-min-microvolt = <1100000>;
2540ff75efbSIcenowy Zheng	regulator-max-microvolt = <1100000>;
2550ff75efbSIcenowy Zheng	regulator-name = "vdd-sys";
2560ff75efbSIcenowy Zheng};
2570ff75efbSIcenowy Zheng
2580ff75efbSIcenowy Zheng&reg_dldo1 {
2590ff75efbSIcenowy Zheng	regulator-min-microvolt = <3300000>;
2600ff75efbSIcenowy Zheng	regulator-max-microvolt = <3300000>;
2610ff75efbSIcenowy Zheng	regulator-name = "vcc-hdmi-dsi";
2620ff75efbSIcenowy Zheng};
2630ff75efbSIcenowy Zheng
2640ff75efbSIcenowy Zheng&reg_dldo2 {
2650ff75efbSIcenowy Zheng	regulator-min-microvolt = <3300000>;
2660ff75efbSIcenowy Zheng	regulator-max-microvolt = <3300000>;
2670ff75efbSIcenowy Zheng	regulator-name = "vcc-wifi";
2680ff75efbSIcenowy Zheng};
2690ff75efbSIcenowy Zheng
2700ff75efbSIcenowy Zheng&reg_dldo4 {
2710ff75efbSIcenowy Zheng	regulator-min-microvolt = <1800000>;
2720ff75efbSIcenowy Zheng	regulator-max-microvolt = <3300000>;
2730ff75efbSIcenowy Zheng	regulator-name = "vcc-wifi-io";
2740ff75efbSIcenowy Zheng};
2750ff75efbSIcenowy Zheng
27681866805SJagan Teki&reg_drivevbus {
27781866805SJagan Teki	regulator-name = "usb0-vbus";
27881866805SJagan Teki	status = "okay";
27981866805SJagan Teki};
28081866805SJagan Teki
2810ff75efbSIcenowy Zheng&reg_eldo1 {
2820ff75efbSIcenowy Zheng	regulator-min-microvolt = <1800000>;
2830ff75efbSIcenowy Zheng	regulator-max-microvolt = <1800000>;
2840ff75efbSIcenowy Zheng	regulator-name = "cpvdd";
2850ff75efbSIcenowy Zheng};
2860ff75efbSIcenowy Zheng
2870ff75efbSIcenowy Zheng&reg_fldo1 {
2880ff75efbSIcenowy Zheng	regulator-min-microvolt = <1200000>;
2890ff75efbSIcenowy Zheng	regulator-max-microvolt = <1200000>;
2900ff75efbSIcenowy Zheng	regulator-name = "vcc-1v2-hsic";
2910ff75efbSIcenowy Zheng};
2920ff75efbSIcenowy Zheng
2930ff75efbSIcenowy Zheng/*
2940ff75efbSIcenowy Zheng * The A64 chip cannot work without this regulator off, although
2950ff75efbSIcenowy Zheng * it seems to be only driving the AR100 core.
2960ff75efbSIcenowy Zheng * Maybe we don't still know well about CPUs domain.
2970ff75efbSIcenowy Zheng */
2980ff75efbSIcenowy Zheng&reg_fldo2 {
2990ff75efbSIcenowy Zheng	regulator-always-on;
3000ff75efbSIcenowy Zheng	regulator-min-microvolt = <1100000>;
3010ff75efbSIcenowy Zheng	regulator-max-microvolt = <1100000>;
3020ff75efbSIcenowy Zheng	regulator-name = "vdd-cpus";
3030ff75efbSIcenowy Zheng};
3040ff75efbSIcenowy Zheng
3050ff75efbSIcenowy Zheng&reg_rtc_ldo {
3060ff75efbSIcenowy Zheng	regulator-name = "vcc-rtc";
3070ff75efbSIcenowy Zheng};
3080ff75efbSIcenowy Zheng
3095cbef9f9SIcenowy Zheng&simplefb_hdmi {
3105cbef9f9SIcenowy Zheng	vcc-hdmi-supply = <&reg_dldo1>;
3115cbef9f9SIcenowy Zheng};
3125cbef9f9SIcenowy Zheng
313c56689e6SChen-Yu Tsai&sound {
314c56689e6SChen-Yu Tsai	status = "okay";
315c56689e6SChen-Yu Tsai	simple-audio-card,widgets = "Headphone", "Headphone Jack",
316c56689e6SChen-Yu Tsai				    "Microphone", "Microphone Jack",
317c56689e6SChen-Yu Tsai				    "Microphone", "Onboard Microphone";
318c56689e6SChen-Yu Tsai	simple-audio-card,routing =
319c56689e6SChen-Yu Tsai			"Left DAC", "AIF1 Slot 0 Left",
320c56689e6SChen-Yu Tsai			"Right DAC", "AIF1 Slot 0 Right",
321c56689e6SChen-Yu Tsai			"AIF1 Slot 0 Left ADC", "Left ADC",
322c56689e6SChen-Yu Tsai			"AIF1 Slot 0 Right ADC", "Right ADC",
323c56689e6SChen-Yu Tsai			"Headphone Jack", "HP",
324c56689e6SChen-Yu Tsai			"MIC2", "Microphone Jack",
325c56689e6SChen-Yu Tsai			"Onboard Microphone", "MBIAS",
326c56689e6SChen-Yu Tsai			"MIC1", "Onboard Microphone";
327c56689e6SChen-Yu Tsai};
328c56689e6SChen-Yu Tsai
329b8bcf0e1SAndre Przywara&uart0 {
330b8bcf0e1SAndre Przywara	pinctrl-names = "default";
331d91ebb95SChen-Yu Tsai	pinctrl-0 = <&uart0_pb_pins>;
332b8bcf0e1SAndre Przywara	status = "okay";
333b8bcf0e1SAndre Przywara};
334b8bcf0e1SAndre Przywara
335b8bcf0e1SAndre Przywara&uart1 {
336b8bcf0e1SAndre Przywara	pinctrl-names = "default";
337b8bcf0e1SAndre Przywara	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
338c266a2b4SChen-Yu Tsai	uart-has-rtscts;
339b8bcf0e1SAndre Przywara	status = "okay";
340c266a2b4SChen-Yu Tsai
341c266a2b4SChen-Yu Tsai	bluetooth {
342c266a2b4SChen-Yu Tsai		compatible = "brcm,bcm43438-bt";
343c266a2b4SChen-Yu Tsai		clocks = <&rtc 1>;
344c266a2b4SChen-Yu Tsai		clock-names = "lpo";
345c266a2b4SChen-Yu Tsai		vbat-supply = <&reg_dldo2>;
346c266a2b4SChen-Yu Tsai		vddio-supply = <&reg_dldo4>;
347c266a2b4SChen-Yu Tsai		device-wakeup-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
348c266a2b4SChen-Yu Tsai		host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
349c266a2b4SChen-Yu Tsai		shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
350c266a2b4SChen-Yu Tsai	};
351b8bcf0e1SAndre Przywara};
35215ec9598SIcenowy Zheng
35381866805SJagan Teki&usb_otg {
35481866805SJagan Teki	dr_mode = "otg";
35581866805SJagan Teki	status = "okay";
35681866805SJagan Teki};
35781866805SJagan Teki
358cc072fb6SChen-Yu Tsai&usb_power_supply {
359cc072fb6SChen-Yu Tsai	status = "okay";
360cc072fb6SChen-Yu Tsai};
361cc072fb6SChen-Yu Tsai
36215ec9598SIcenowy Zheng&usbphy {
36381866805SJagan Teki	usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
364cc072fb6SChen-Yu Tsai	usb0_vbus_power-supply = <&usb_power_supply>;
36581866805SJagan Teki	usb0_vbus-supply = <&reg_drivevbus>;
36615ec9598SIcenowy Zheng	status = "okay";
36715ec9598SIcenowy Zheng};
368