1b8bcf0e1SAndre Przywara/* 2b8bcf0e1SAndre Przywara * Copyright (c) 2016 ARM Ltd. 3b8bcf0e1SAndre Przywara * 4b8bcf0e1SAndre Przywara * This file is dual-licensed: you can use it either under the terms 5b8bcf0e1SAndre Przywara * of the GPL or the X11 license, at your option. Note that this dual 6b8bcf0e1SAndre Przywara * licensing only applies to this file, and not this project as a 7b8bcf0e1SAndre Przywara * whole. 8b8bcf0e1SAndre Przywara * 9b8bcf0e1SAndre Przywara * a) This library is free software; you can redistribute it and/or 10b8bcf0e1SAndre Przywara * modify it under the terms of the GNU General Public License as 11b8bcf0e1SAndre Przywara * published by the Free Software Foundation; either version 2 of the 12b8bcf0e1SAndre Przywara * License, or (at your option) any later version. 13b8bcf0e1SAndre Przywara * 14b8bcf0e1SAndre Przywara * This library is distributed in the hope that it will be useful, 15b8bcf0e1SAndre Przywara * but WITHOUT ANY WARRANTY; without even the implied warranty of 16b8bcf0e1SAndre Przywara * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17b8bcf0e1SAndre Przywara * GNU General Public License for more details. 18b8bcf0e1SAndre Przywara * 19b8bcf0e1SAndre Przywara * Or, alternatively, 20b8bcf0e1SAndre Przywara * 21b8bcf0e1SAndre Przywara * b) Permission is hereby granted, free of charge, to any person 22b8bcf0e1SAndre Przywara * obtaining a copy of this software and associated documentation 23b8bcf0e1SAndre Przywara * files (the "Software"), to deal in the Software without 24b8bcf0e1SAndre Przywara * restriction, including without limitation the rights to use, 25b8bcf0e1SAndre Przywara * copy, modify, merge, publish, distribute, sublicense, and/or 26b8bcf0e1SAndre Przywara * sell copies of the Software, and to permit persons to whom the 27b8bcf0e1SAndre Przywara * Software is furnished to do so, subject to the following 28b8bcf0e1SAndre Przywara * conditions: 29b8bcf0e1SAndre Przywara * 30b8bcf0e1SAndre Przywara * The above copyright notice and this permission notice shall be 31b8bcf0e1SAndre Przywara * included in all copies or substantial portions of the Software. 32b8bcf0e1SAndre Przywara * 33b8bcf0e1SAndre Przywara * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34b8bcf0e1SAndre Przywara * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35b8bcf0e1SAndre Przywara * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36b8bcf0e1SAndre Przywara * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37b8bcf0e1SAndre Przywara * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38b8bcf0e1SAndre Przywara * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39b8bcf0e1SAndre Przywara * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40b8bcf0e1SAndre Przywara * OTHER DEALINGS IN THE SOFTWARE. 41b8bcf0e1SAndre Przywara */ 42b8bcf0e1SAndre Przywara 43b8bcf0e1SAndre Przywara/dts-v1/; 44b8bcf0e1SAndre Przywara 45b8bcf0e1SAndre Przywara#include "sun50i-a64.dtsi" 46b8bcf0e1SAndre Przywara 47b8bcf0e1SAndre Przywara#include <dt-bindings/gpio/gpio.h> 48b8bcf0e1SAndre Przywara 49b8bcf0e1SAndre Przywara/ { 50b8bcf0e1SAndre Przywara model = "BananaPi-M64"; 51b8bcf0e1SAndre Przywara compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64"; 52b8bcf0e1SAndre Przywara 53b8bcf0e1SAndre Przywara aliases { 5494f44288SCorentin Labbe ethernet0 = &emac; 55b8bcf0e1SAndre Przywara serial0 = &uart0; 56b8bcf0e1SAndre Przywara serial1 = &uart1; 57b8bcf0e1SAndre Przywara }; 58b8bcf0e1SAndre Przywara 59b8bcf0e1SAndre Przywara chosen { 60b8bcf0e1SAndre Przywara stdout-path = "serial0:115200n8"; 61b8bcf0e1SAndre Przywara }; 623bc1de8cSIcenowy Zheng 6336252668SChen-Yu Tsai leds { 6436252668SChen-Yu Tsai compatible = "gpio-leds"; 6536252668SChen-Yu Tsai 6636252668SChen-Yu Tsai pwr-led { 6736252668SChen-Yu Tsai label = "bananapi-m64:red:pwr"; 6836252668SChen-Yu Tsai gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ 6936252668SChen-Yu Tsai default-state = "on"; 7036252668SChen-Yu Tsai }; 7136252668SChen-Yu Tsai 7236252668SChen-Yu Tsai green { 7336252668SChen-Yu Tsai label = "bananapi-m64:green:user"; 7436252668SChen-Yu Tsai gpios = <&pio 4 14 GPIO_ACTIVE_HIGH>; /* PE14 */ 7536252668SChen-Yu Tsai }; 7636252668SChen-Yu Tsai 7736252668SChen-Yu Tsai blue { 7836252668SChen-Yu Tsai label = "bananapi-m64:blue:user"; 7936252668SChen-Yu Tsai gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */ 8036252668SChen-Yu Tsai }; 8136252668SChen-Yu Tsai }; 8236252668SChen-Yu Tsai 833bc1de8cSIcenowy Zheng wifi_pwrseq: wifi_pwrseq { 843bc1de8cSIcenowy Zheng compatible = "mmc-pwrseq-simple"; 853bc1de8cSIcenowy Zheng reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ 863bc1de8cSIcenowy Zheng }; 87b8bcf0e1SAndre Przywara}; 88b8bcf0e1SAndre Przywara 89*81866805SJagan Teki&ehci0 { 90*81866805SJagan Teki status = "okay"; 91*81866805SJagan Teki}; 92*81866805SJagan Teki 9315ec9598SIcenowy Zheng&ehci1 { 9415ec9598SIcenowy Zheng status = "okay"; 9515ec9598SIcenowy Zheng}; 9615ec9598SIcenowy Zheng 9794f44288SCorentin Labbe&emac { 9894f44288SCorentin Labbe pinctrl-names = "default"; 9994f44288SCorentin Labbe pinctrl-0 = <&rgmii_pins>; 10094f44288SCorentin Labbe phy-mode = "rgmii"; 10194f44288SCorentin Labbe phy-handle = <&ext_rgmii_phy>; 102bdfe4cebSIcenowy Zheng phy-supply = <®_dc1sw>; 10394f44288SCorentin Labbe status = "okay"; 10494f44288SCorentin Labbe}; 10594f44288SCorentin Labbe 106b8bcf0e1SAndre Przywara&i2c1 { 107b8bcf0e1SAndre Przywara pinctrl-names = "default"; 108b8bcf0e1SAndre Przywara pinctrl-0 = <&i2c1_pins>; 109b8bcf0e1SAndre Przywara status = "okay"; 110b8bcf0e1SAndre Przywara}; 111b8bcf0e1SAndre Przywara 112b8bcf0e1SAndre Przywara&i2c1_pins { 113b8bcf0e1SAndre Przywara bias-pull-up; 114b8bcf0e1SAndre Przywara}; 115b8bcf0e1SAndre Przywara 11694f44288SCorentin Labbe&mdio { 11794f44288SCorentin Labbe ext_rgmii_phy: ethernet-phy@1 { 11894f44288SCorentin Labbe compatible = "ethernet-phy-ieee802.3-c22"; 11994f44288SCorentin Labbe reg = <1>; 12094f44288SCorentin Labbe }; 12194f44288SCorentin Labbe}; 12294f44288SCorentin Labbe 123b8bcf0e1SAndre Przywara&mmc0 { 124b8bcf0e1SAndre Przywara pinctrl-names = "default"; 125b8bcf0e1SAndre Przywara pinctrl-0 = <&mmc0_pins>; 1260ff75efbSIcenowy Zheng vmmc-supply = <®_dcdc1>; 127b75cb68dSTuomas Tynkkynen cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; 128b8bcf0e1SAndre Przywara disable-wp; 129b8bcf0e1SAndre Przywara bus-width = <4>; 130b8bcf0e1SAndre Przywara status = "okay"; 131b8bcf0e1SAndre Przywara}; 132b8bcf0e1SAndre Przywara 133b8bcf0e1SAndre Przywara&mmc1 { 134b8bcf0e1SAndre Przywara pinctrl-names = "default"; 135b8bcf0e1SAndre Przywara pinctrl-0 = <&mmc1_pins>; 1360ff75efbSIcenowy Zheng vmmc-supply = <®_dldo2>; 1370ff75efbSIcenowy Zheng vqmmc-supply = <®_dldo4>; 1383bc1de8cSIcenowy Zheng mmc-pwrseq = <&wifi_pwrseq>; 139b8bcf0e1SAndre Przywara bus-width = <4>; 140b8bcf0e1SAndre Przywara non-removable; 141b8bcf0e1SAndre Przywara status = "okay"; 1423bc1de8cSIcenowy Zheng 1433bc1de8cSIcenowy Zheng brcmf: wifi@1 { 1443bc1de8cSIcenowy Zheng reg = <1>; 1453bc1de8cSIcenowy Zheng compatible = "brcm,bcm4329-fmac"; 1463bc1de8cSIcenowy Zheng interrupt-parent = <&r_pio>; 1473bc1de8cSIcenowy Zheng interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */ 1483bc1de8cSIcenowy Zheng interrupt-names = "host-wake"; 1493bc1de8cSIcenowy Zheng }; 150b8bcf0e1SAndre Przywara}; 151b8bcf0e1SAndre Przywara 152b8bcf0e1SAndre Przywara&mmc2 { 153b8bcf0e1SAndre Przywara pinctrl-names = "default"; 154b8bcf0e1SAndre Przywara pinctrl-0 = <&mmc2_pins>; 1550ff75efbSIcenowy Zheng vmmc-supply = <®_dcdc1>; 156b8bcf0e1SAndre Przywara bus-width = <8>; 157b8bcf0e1SAndre Przywara non-removable; 158b8bcf0e1SAndre Przywara cap-mmc-hw-reset; 159b8bcf0e1SAndre Przywara status = "okay"; 160b8bcf0e1SAndre Przywara}; 161b8bcf0e1SAndre Przywara 162*81866805SJagan Teki&ohci0 { 163*81866805SJagan Teki status = "okay"; 164*81866805SJagan Teki}; 165*81866805SJagan Teki 16615ec9598SIcenowy Zheng&ohci1 { 16715ec9598SIcenowy Zheng status = "okay"; 16815ec9598SIcenowy Zheng}; 16915ec9598SIcenowy Zheng 1700ff75efbSIcenowy Zheng&r_rsb { 1710ff75efbSIcenowy Zheng status = "okay"; 1720ff75efbSIcenowy Zheng 1730ff75efbSIcenowy Zheng axp803: pmic@3a3 { 1740ff75efbSIcenowy Zheng compatible = "x-powers,axp803"; 1750ff75efbSIcenowy Zheng reg = <0x3a3>; 1760ff75efbSIcenowy Zheng interrupt-parent = <&r_intc>; 1770ff75efbSIcenowy Zheng interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 178*81866805SJagan Teki x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */ 1790ff75efbSIcenowy Zheng }; 1800ff75efbSIcenowy Zheng}; 1810ff75efbSIcenowy Zheng 1820ff75efbSIcenowy Zheng#include "axp803.dtsi" 1830ff75efbSIcenowy Zheng 18436252668SChen-Yu Tsai®_aldo1 { 18536252668SChen-Yu Tsai /* 18636252668SChen-Yu Tsai * This regulator also drives the PE pingroup GPIOs, 18736252668SChen-Yu Tsai * which also controls two LEDs. 18836252668SChen-Yu Tsai */ 18936252668SChen-Yu Tsai regulator-always-on; 19036252668SChen-Yu Tsai regulator-min-microvolt = <2800000>; 19136252668SChen-Yu Tsai regulator-max-microvolt = <2800000>; 19236252668SChen-Yu Tsai regulator-name = "afvcc-csi"; 19336252668SChen-Yu Tsai}; 19436252668SChen-Yu Tsai 1950ff75efbSIcenowy Zheng®_aldo2 { 1960ff75efbSIcenowy Zheng regulator-always-on; 1970ff75efbSIcenowy Zheng regulator-min-microvolt = <1800000>; 1980ff75efbSIcenowy Zheng regulator-max-microvolt = <3300000>; 1990ff75efbSIcenowy Zheng regulator-name = "vcc-pl"; 2000ff75efbSIcenowy Zheng}; 2010ff75efbSIcenowy Zheng 2020ff75efbSIcenowy Zheng®_aldo3 { 2030ff75efbSIcenowy Zheng regulator-always-on; 2040ff75efbSIcenowy Zheng regulator-min-microvolt = <3000000>; 2050ff75efbSIcenowy Zheng regulator-max-microvolt = <3000000>; 2060ff75efbSIcenowy Zheng regulator-name = "vcc-pll-avcc"; 2070ff75efbSIcenowy Zheng}; 2080ff75efbSIcenowy Zheng 2090ff75efbSIcenowy Zheng®_dc1sw { 21036252668SChen-Yu Tsai /* 21136252668SChen-Yu Tsai * This regulator also indirectly drives the PD pingroup GPIOs, 21236252668SChen-Yu Tsai * which also controls the power LED. 21336252668SChen-Yu Tsai */ 21436252668SChen-Yu Tsai regulator-always-on; 2150ff75efbSIcenowy Zheng regulator-name = "vcc-phy"; 2160ff75efbSIcenowy Zheng}; 2170ff75efbSIcenowy Zheng 2180ff75efbSIcenowy Zheng®_dcdc1 { 2190ff75efbSIcenowy Zheng regulator-always-on; 2200ff75efbSIcenowy Zheng regulator-min-microvolt = <3300000>; 2210ff75efbSIcenowy Zheng regulator-max-microvolt = <3300000>; 2220ff75efbSIcenowy Zheng regulator-name = "vcc-3v3"; 2230ff75efbSIcenowy Zheng}; 2240ff75efbSIcenowy Zheng 2250ff75efbSIcenowy Zheng®_dcdc2 { 2260ff75efbSIcenowy Zheng regulator-always-on; 2270ff75efbSIcenowy Zheng regulator-min-microvolt = <1040000>; 2280ff75efbSIcenowy Zheng regulator-max-microvolt = <1300000>; 2290ff75efbSIcenowy Zheng regulator-name = "vdd-cpux"; 2300ff75efbSIcenowy Zheng}; 2310ff75efbSIcenowy Zheng 2320ff75efbSIcenowy Zheng/* DCDC3 is polyphased with DCDC2 */ 2330ff75efbSIcenowy Zheng 2340ff75efbSIcenowy Zheng®_dcdc5 { 2350ff75efbSIcenowy Zheng regulator-always-on; 2360ff75efbSIcenowy Zheng regulator-min-microvolt = <1500000>; 2370ff75efbSIcenowy Zheng regulator-max-microvolt = <1500000>; 2380ff75efbSIcenowy Zheng regulator-name = "vcc-dram"; 2390ff75efbSIcenowy Zheng}; 2400ff75efbSIcenowy Zheng 2410ff75efbSIcenowy Zheng®_dcdc6 { 2420ff75efbSIcenowy Zheng regulator-always-on; 2430ff75efbSIcenowy Zheng regulator-min-microvolt = <1100000>; 2440ff75efbSIcenowy Zheng regulator-max-microvolt = <1100000>; 2450ff75efbSIcenowy Zheng regulator-name = "vdd-sys"; 2460ff75efbSIcenowy Zheng}; 2470ff75efbSIcenowy Zheng 2480ff75efbSIcenowy Zheng®_dldo1 { 2490ff75efbSIcenowy Zheng regulator-min-microvolt = <3300000>; 2500ff75efbSIcenowy Zheng regulator-max-microvolt = <3300000>; 2510ff75efbSIcenowy Zheng regulator-name = "vcc-hdmi-dsi"; 2520ff75efbSIcenowy Zheng}; 2530ff75efbSIcenowy Zheng 2540ff75efbSIcenowy Zheng®_dldo2 { 2550ff75efbSIcenowy Zheng regulator-min-microvolt = <3300000>; 2560ff75efbSIcenowy Zheng regulator-max-microvolt = <3300000>; 2570ff75efbSIcenowy Zheng regulator-name = "vcc-wifi"; 2580ff75efbSIcenowy Zheng}; 2590ff75efbSIcenowy Zheng 2600ff75efbSIcenowy Zheng®_dldo4 { 2610ff75efbSIcenowy Zheng regulator-min-microvolt = <1800000>; 2620ff75efbSIcenowy Zheng regulator-max-microvolt = <3300000>; 2630ff75efbSIcenowy Zheng regulator-name = "vcc-wifi-io"; 2640ff75efbSIcenowy Zheng}; 2650ff75efbSIcenowy Zheng 266*81866805SJagan Teki®_drivevbus { 267*81866805SJagan Teki regulator-name = "usb0-vbus"; 268*81866805SJagan Teki status = "okay"; 269*81866805SJagan Teki}; 270*81866805SJagan Teki 2710ff75efbSIcenowy Zheng®_eldo1 { 2720ff75efbSIcenowy Zheng regulator-min-microvolt = <1800000>; 2730ff75efbSIcenowy Zheng regulator-max-microvolt = <1800000>; 2740ff75efbSIcenowy Zheng regulator-name = "cpvdd"; 2750ff75efbSIcenowy Zheng}; 2760ff75efbSIcenowy Zheng 2770ff75efbSIcenowy Zheng®_fldo1 { 2780ff75efbSIcenowy Zheng regulator-min-microvolt = <1200000>; 2790ff75efbSIcenowy Zheng regulator-max-microvolt = <1200000>; 2800ff75efbSIcenowy Zheng regulator-name = "vcc-1v2-hsic"; 2810ff75efbSIcenowy Zheng}; 2820ff75efbSIcenowy Zheng 2830ff75efbSIcenowy Zheng/* 2840ff75efbSIcenowy Zheng * The A64 chip cannot work without this regulator off, although 2850ff75efbSIcenowy Zheng * it seems to be only driving the AR100 core. 2860ff75efbSIcenowy Zheng * Maybe we don't still know well about CPUs domain. 2870ff75efbSIcenowy Zheng */ 2880ff75efbSIcenowy Zheng®_fldo2 { 2890ff75efbSIcenowy Zheng regulator-always-on; 2900ff75efbSIcenowy Zheng regulator-min-microvolt = <1100000>; 2910ff75efbSIcenowy Zheng regulator-max-microvolt = <1100000>; 2920ff75efbSIcenowy Zheng regulator-name = "vdd-cpus"; 2930ff75efbSIcenowy Zheng}; 2940ff75efbSIcenowy Zheng 2950ff75efbSIcenowy Zheng®_rtc_ldo { 2960ff75efbSIcenowy Zheng regulator-name = "vcc-rtc"; 2970ff75efbSIcenowy Zheng}; 2980ff75efbSIcenowy Zheng 299b8bcf0e1SAndre Przywara&uart0 { 300b8bcf0e1SAndre Przywara pinctrl-names = "default"; 301b8bcf0e1SAndre Przywara pinctrl-0 = <&uart0_pins_a>; 302b8bcf0e1SAndre Przywara status = "okay"; 303b8bcf0e1SAndre Przywara}; 304b8bcf0e1SAndre Przywara 305b8bcf0e1SAndre Przywara&uart1 { 306b8bcf0e1SAndre Przywara pinctrl-names = "default"; 307b8bcf0e1SAndre Przywara pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; 308b8bcf0e1SAndre Przywara status = "okay"; 309b8bcf0e1SAndre Przywara}; 31015ec9598SIcenowy Zheng 311*81866805SJagan Teki&usb_otg { 312*81866805SJagan Teki dr_mode = "otg"; 313*81866805SJagan Teki status = "okay"; 314*81866805SJagan Teki}; 315*81866805SJagan Teki 31615ec9598SIcenowy Zheng&usbphy { 317*81866805SJagan Teki usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ 318*81866805SJagan Teki usb0_vbus-supply = <®_drivevbus>; 31915ec9598SIcenowy Zheng status = "okay"; 32015ec9598SIcenowy Zheng}; 321