1b8bcf0e1SAndre Przywara/* 2b8bcf0e1SAndre Przywara * Copyright (c) 2016 ARM Ltd. 3b8bcf0e1SAndre Przywara * 4b8bcf0e1SAndre Przywara * This file is dual-licensed: you can use it either under the terms 5b8bcf0e1SAndre Przywara * of the GPL or the X11 license, at your option. Note that this dual 6b8bcf0e1SAndre Przywara * licensing only applies to this file, and not this project as a 7b8bcf0e1SAndre Przywara * whole. 8b8bcf0e1SAndre Przywara * 9b8bcf0e1SAndre Przywara * a) This library is free software; you can redistribute it and/or 10b8bcf0e1SAndre Przywara * modify it under the terms of the GNU General Public License as 11b8bcf0e1SAndre Przywara * published by the Free Software Foundation; either version 2 of the 12b8bcf0e1SAndre Przywara * License, or (at your option) any later version. 13b8bcf0e1SAndre Przywara * 14b8bcf0e1SAndre Przywara * This library is distributed in the hope that it will be useful, 15b8bcf0e1SAndre Przywara * but WITHOUT ANY WARRANTY; without even the implied warranty of 16b8bcf0e1SAndre Przywara * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17b8bcf0e1SAndre Przywara * GNU General Public License for more details. 18b8bcf0e1SAndre Przywara * 19b8bcf0e1SAndre Przywara * Or, alternatively, 20b8bcf0e1SAndre Przywara * 21b8bcf0e1SAndre Przywara * b) Permission is hereby granted, free of charge, to any person 22b8bcf0e1SAndre Przywara * obtaining a copy of this software and associated documentation 23b8bcf0e1SAndre Przywara * files (the "Software"), to deal in the Software without 24b8bcf0e1SAndre Przywara * restriction, including without limitation the rights to use, 25b8bcf0e1SAndre Przywara * copy, modify, merge, publish, distribute, sublicense, and/or 26b8bcf0e1SAndre Przywara * sell copies of the Software, and to permit persons to whom the 27b8bcf0e1SAndre Przywara * Software is furnished to do so, subject to the following 28b8bcf0e1SAndre Przywara * conditions: 29b8bcf0e1SAndre Przywara * 30b8bcf0e1SAndre Przywara * The above copyright notice and this permission notice shall be 31b8bcf0e1SAndre Przywara * included in all copies or substantial portions of the Software. 32b8bcf0e1SAndre Przywara * 33b8bcf0e1SAndre Przywara * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34b8bcf0e1SAndre Przywara * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35b8bcf0e1SAndre Przywara * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36b8bcf0e1SAndre Przywara * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37b8bcf0e1SAndre Przywara * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38b8bcf0e1SAndre Przywara * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39b8bcf0e1SAndre Przywara * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40b8bcf0e1SAndre Przywara * OTHER DEALINGS IN THE SOFTWARE. 41b8bcf0e1SAndre Przywara */ 42b8bcf0e1SAndre Przywara 43b8bcf0e1SAndre Przywara/dts-v1/; 44b8bcf0e1SAndre Przywara 45b8bcf0e1SAndre Przywara#include "sun50i-a64.dtsi" 46b8bcf0e1SAndre Przywara 47b8bcf0e1SAndre Przywara#include <dt-bindings/gpio/gpio.h> 48b8bcf0e1SAndre Przywara 49b8bcf0e1SAndre Przywara/ { 50b8bcf0e1SAndre Przywara model = "BananaPi-M64"; 51b8bcf0e1SAndre Przywara compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64"; 52b8bcf0e1SAndre Przywara 53b8bcf0e1SAndre Przywara aliases { 5494f44288SCorentin Labbe ethernet0 = &emac; 55b8bcf0e1SAndre Przywara serial0 = &uart0; 56b8bcf0e1SAndre Przywara serial1 = &uart1; 57b8bcf0e1SAndre Przywara }; 58b8bcf0e1SAndre Przywara 59b8bcf0e1SAndre Przywara chosen { 60b8bcf0e1SAndre Przywara stdout-path = "serial0:115200n8"; 61b8bcf0e1SAndre Przywara }; 623bc1de8cSIcenowy Zheng 63f4e4453aSJagan Teki hdmi-connector { 64f4e4453aSJagan Teki compatible = "hdmi-connector"; 65f4e4453aSJagan Teki type = "a"; 66f4e4453aSJagan Teki 67f4e4453aSJagan Teki port { 68f4e4453aSJagan Teki hdmi_con_in: endpoint { 69f4e4453aSJagan Teki remote-endpoint = <&hdmi_out_con>; 70f4e4453aSJagan Teki }; 71f4e4453aSJagan Teki }; 72f4e4453aSJagan Teki }; 73f4e4453aSJagan Teki 7436252668SChen-Yu Tsai leds { 7536252668SChen-Yu Tsai compatible = "gpio-leds"; 7636252668SChen-Yu Tsai 7736252668SChen-Yu Tsai pwr-led { 7836252668SChen-Yu Tsai label = "bananapi-m64:red:pwr"; 7936252668SChen-Yu Tsai gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ 8036252668SChen-Yu Tsai default-state = "on"; 8136252668SChen-Yu Tsai }; 8236252668SChen-Yu Tsai 8336252668SChen-Yu Tsai green { 8436252668SChen-Yu Tsai label = "bananapi-m64:green:user"; 8536252668SChen-Yu Tsai gpios = <&pio 4 14 GPIO_ACTIVE_HIGH>; /* PE14 */ 8636252668SChen-Yu Tsai }; 8736252668SChen-Yu Tsai 8836252668SChen-Yu Tsai blue { 8936252668SChen-Yu Tsai label = "bananapi-m64:blue:user"; 9036252668SChen-Yu Tsai gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */ 9136252668SChen-Yu Tsai }; 9236252668SChen-Yu Tsai }; 9336252668SChen-Yu Tsai 943bc1de8cSIcenowy Zheng wifi_pwrseq: wifi_pwrseq { 953bc1de8cSIcenowy Zheng compatible = "mmc-pwrseq-simple"; 963bc1de8cSIcenowy Zheng reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ 97c266a2b4SChen-Yu Tsai clocks = <&rtc 1>; 98c266a2b4SChen-Yu Tsai clock-names = "ext_clock"; 993bc1de8cSIcenowy Zheng }; 100b8bcf0e1SAndre Przywara}; 101b8bcf0e1SAndre Przywara 102c56689e6SChen-Yu Tsai&codec { 103c56689e6SChen-Yu Tsai status = "okay"; 104c56689e6SChen-Yu Tsai}; 105c56689e6SChen-Yu Tsai 106c56689e6SChen-Yu Tsai&codec_analog { 107*07de9094SChen-Yu Tsai cpvdd-supply = <®_eldo1>; 108c56689e6SChen-Yu Tsai status = "okay"; 109c56689e6SChen-Yu Tsai}; 110c56689e6SChen-Yu Tsai 111c56689e6SChen-Yu Tsai&dai { 112c56689e6SChen-Yu Tsai status = "okay"; 113c56689e6SChen-Yu Tsai}; 114c56689e6SChen-Yu Tsai 115f4e4453aSJagan Teki&de { 116f4e4453aSJagan Teki status = "okay"; 117f4e4453aSJagan Teki}; 118f4e4453aSJagan Teki 11981866805SJagan Teki&ehci0 { 12081866805SJagan Teki status = "okay"; 12181866805SJagan Teki}; 12281866805SJagan Teki 12315ec9598SIcenowy Zheng&ehci1 { 12415ec9598SIcenowy Zheng status = "okay"; 12515ec9598SIcenowy Zheng}; 12615ec9598SIcenowy Zheng 12794f44288SCorentin Labbe&emac { 12894f44288SCorentin Labbe pinctrl-names = "default"; 12994f44288SCorentin Labbe pinctrl-0 = <&rgmii_pins>; 13094f44288SCorentin Labbe phy-mode = "rgmii"; 13194f44288SCorentin Labbe phy-handle = <&ext_rgmii_phy>; 132bdfe4cebSIcenowy Zheng phy-supply = <®_dc1sw>; 13394f44288SCorentin Labbe status = "okay"; 13494f44288SCorentin Labbe}; 13594f44288SCorentin Labbe 136f4e4453aSJagan Teki&hdmi { 137f4e4453aSJagan Teki hvcc-supply = <®_dldo1>; 138f4e4453aSJagan Teki status = "okay"; 139f4e4453aSJagan Teki}; 140f4e4453aSJagan Teki 141f4e4453aSJagan Teki&hdmi_out { 142f4e4453aSJagan Teki hdmi_out_con: endpoint { 143f4e4453aSJagan Teki remote-endpoint = <&hdmi_con_in>; 144f4e4453aSJagan Teki }; 145f4e4453aSJagan Teki}; 146f4e4453aSJagan Teki 147b8bcf0e1SAndre Przywara&i2c1 { 148b8bcf0e1SAndre Przywara pinctrl-names = "default"; 149b8bcf0e1SAndre Przywara pinctrl-0 = <&i2c1_pins>; 150b8bcf0e1SAndre Przywara status = "okay"; 151b8bcf0e1SAndre Przywara}; 152b8bcf0e1SAndre Przywara 153b8bcf0e1SAndre Przywara&i2c1_pins { 154b8bcf0e1SAndre Przywara bias-pull-up; 155b8bcf0e1SAndre Przywara}; 156b8bcf0e1SAndre Przywara 15794f44288SCorentin Labbe&mdio { 15894f44288SCorentin Labbe ext_rgmii_phy: ethernet-phy@1 { 15994f44288SCorentin Labbe compatible = "ethernet-phy-ieee802.3-c22"; 16094f44288SCorentin Labbe reg = <1>; 16194f44288SCorentin Labbe }; 16294f44288SCorentin Labbe}; 16394f44288SCorentin Labbe 164b8bcf0e1SAndre Przywara&mmc0 { 165b8bcf0e1SAndre Przywara pinctrl-names = "default"; 166b8bcf0e1SAndre Przywara pinctrl-0 = <&mmc0_pins>; 1670ff75efbSIcenowy Zheng vmmc-supply = <®_dcdc1>; 168b75cb68dSTuomas Tynkkynen cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; 169b8bcf0e1SAndre Przywara disable-wp; 170b8bcf0e1SAndre Przywara bus-width = <4>; 171b8bcf0e1SAndre Przywara status = "okay"; 172b8bcf0e1SAndre Przywara}; 173b8bcf0e1SAndre Przywara 174b8bcf0e1SAndre Przywara&mmc1 { 175b8bcf0e1SAndre Przywara pinctrl-names = "default"; 176b8bcf0e1SAndre Przywara pinctrl-0 = <&mmc1_pins>; 1770ff75efbSIcenowy Zheng vmmc-supply = <®_dldo2>; 1780ff75efbSIcenowy Zheng vqmmc-supply = <®_dldo4>; 1793bc1de8cSIcenowy Zheng mmc-pwrseq = <&wifi_pwrseq>; 180b8bcf0e1SAndre Przywara bus-width = <4>; 181b8bcf0e1SAndre Przywara non-removable; 182b8bcf0e1SAndre Przywara status = "okay"; 1833bc1de8cSIcenowy Zheng 1843bc1de8cSIcenowy Zheng brcmf: wifi@1 { 1853bc1de8cSIcenowy Zheng reg = <1>; 1863bc1de8cSIcenowy Zheng compatible = "brcm,bcm4329-fmac"; 1873bc1de8cSIcenowy Zheng interrupt-parent = <&r_pio>; 1883bc1de8cSIcenowy Zheng interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */ 1893bc1de8cSIcenowy Zheng interrupt-names = "host-wake"; 1903bc1de8cSIcenowy Zheng }; 191b8bcf0e1SAndre Przywara}; 192b8bcf0e1SAndre Przywara 193b8bcf0e1SAndre Przywara&mmc2 { 194b8bcf0e1SAndre Przywara pinctrl-names = "default"; 195fa59dd2eSChen-Yu Tsai pinctrl-0 = <&mmc2_pins>, <&mmc2_ds_pin>; 1960ff75efbSIcenowy Zheng vmmc-supply = <®_dcdc1>; 197b8bcf0e1SAndre Przywara bus-width = <8>; 198b8bcf0e1SAndre Przywara non-removable; 199b8bcf0e1SAndre Przywara cap-mmc-hw-reset; 200b8bcf0e1SAndre Przywara status = "okay"; 201b8bcf0e1SAndre Przywara}; 202b8bcf0e1SAndre Przywara 20381866805SJagan Teki&ohci0 { 20481866805SJagan Teki status = "okay"; 20581866805SJagan Teki}; 20681866805SJagan Teki 20715ec9598SIcenowy Zheng&ohci1 { 20815ec9598SIcenowy Zheng status = "okay"; 20915ec9598SIcenowy Zheng}; 21015ec9598SIcenowy Zheng 2110ff75efbSIcenowy Zheng&r_rsb { 2120ff75efbSIcenowy Zheng status = "okay"; 2130ff75efbSIcenowy Zheng 2140ff75efbSIcenowy Zheng axp803: pmic@3a3 { 2150ff75efbSIcenowy Zheng compatible = "x-powers,axp803"; 2160ff75efbSIcenowy Zheng reg = <0x3a3>; 2170ff75efbSIcenowy Zheng interrupt-parent = <&r_intc>; 2180ff75efbSIcenowy Zheng interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 21981866805SJagan Teki x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */ 2200ff75efbSIcenowy Zheng }; 2210ff75efbSIcenowy Zheng}; 2220ff75efbSIcenowy Zheng 2230ff75efbSIcenowy Zheng#include "axp803.dtsi" 2240ff75efbSIcenowy Zheng 225a24270afSChen-Yu Tsai&ac_power_supply { 226a24270afSChen-Yu Tsai status = "okay"; 227a24270afSChen-Yu Tsai}; 228a24270afSChen-Yu Tsai 229a24270afSChen-Yu Tsai&battery_power_supply { 230a24270afSChen-Yu Tsai status = "okay"; 231a24270afSChen-Yu Tsai}; 232a24270afSChen-Yu Tsai 23336252668SChen-Yu Tsai®_aldo1 { 23436252668SChen-Yu Tsai /* 23536252668SChen-Yu Tsai * This regulator also drives the PE pingroup GPIOs, 23636252668SChen-Yu Tsai * which also controls two LEDs. 23736252668SChen-Yu Tsai */ 23836252668SChen-Yu Tsai regulator-always-on; 23936252668SChen-Yu Tsai regulator-min-microvolt = <2800000>; 24036252668SChen-Yu Tsai regulator-max-microvolt = <2800000>; 24136252668SChen-Yu Tsai regulator-name = "afvcc-csi"; 24236252668SChen-Yu Tsai}; 24336252668SChen-Yu Tsai 2440ff75efbSIcenowy Zheng®_aldo2 { 2450ff75efbSIcenowy Zheng regulator-always-on; 2460ff75efbSIcenowy Zheng regulator-min-microvolt = <1800000>; 2470ff75efbSIcenowy Zheng regulator-max-microvolt = <3300000>; 2480ff75efbSIcenowy Zheng regulator-name = "vcc-pl"; 2490ff75efbSIcenowy Zheng}; 2500ff75efbSIcenowy Zheng 2510ff75efbSIcenowy Zheng®_aldo3 { 2520ff75efbSIcenowy Zheng regulator-always-on; 2530ff75efbSIcenowy Zheng regulator-min-microvolt = <3000000>; 2540ff75efbSIcenowy Zheng regulator-max-microvolt = <3000000>; 2550ff75efbSIcenowy Zheng regulator-name = "vcc-pll-avcc"; 2560ff75efbSIcenowy Zheng}; 2570ff75efbSIcenowy Zheng 2580ff75efbSIcenowy Zheng®_dc1sw { 25936252668SChen-Yu Tsai /* 26036252668SChen-Yu Tsai * This regulator also indirectly drives the PD pingroup GPIOs, 26136252668SChen-Yu Tsai * which also controls the power LED. 26236252668SChen-Yu Tsai */ 26336252668SChen-Yu Tsai regulator-always-on; 2640ff75efbSIcenowy Zheng regulator-name = "vcc-phy"; 2650ff75efbSIcenowy Zheng}; 2660ff75efbSIcenowy Zheng 2670ff75efbSIcenowy Zheng®_dcdc1 { 2680ff75efbSIcenowy Zheng regulator-always-on; 2690ff75efbSIcenowy Zheng regulator-min-microvolt = <3300000>; 2700ff75efbSIcenowy Zheng regulator-max-microvolt = <3300000>; 2710ff75efbSIcenowy Zheng regulator-name = "vcc-3v3"; 2720ff75efbSIcenowy Zheng}; 2730ff75efbSIcenowy Zheng 2740ff75efbSIcenowy Zheng®_dcdc2 { 2750ff75efbSIcenowy Zheng regulator-always-on; 2760ff75efbSIcenowy Zheng regulator-min-microvolt = <1040000>; 2770ff75efbSIcenowy Zheng regulator-max-microvolt = <1300000>; 2780ff75efbSIcenowy Zheng regulator-name = "vdd-cpux"; 2790ff75efbSIcenowy Zheng}; 2800ff75efbSIcenowy Zheng 2810ff75efbSIcenowy Zheng/* DCDC3 is polyphased with DCDC2 */ 2820ff75efbSIcenowy Zheng 2830ff75efbSIcenowy Zheng®_dcdc5 { 2840ff75efbSIcenowy Zheng regulator-always-on; 2850ff75efbSIcenowy Zheng regulator-min-microvolt = <1500000>; 2860ff75efbSIcenowy Zheng regulator-max-microvolt = <1500000>; 2870ff75efbSIcenowy Zheng regulator-name = "vcc-dram"; 2880ff75efbSIcenowy Zheng}; 2890ff75efbSIcenowy Zheng 2900ff75efbSIcenowy Zheng®_dcdc6 { 2910ff75efbSIcenowy Zheng regulator-always-on; 2920ff75efbSIcenowy Zheng regulator-min-microvolt = <1100000>; 2930ff75efbSIcenowy Zheng regulator-max-microvolt = <1100000>; 2940ff75efbSIcenowy Zheng regulator-name = "vdd-sys"; 2950ff75efbSIcenowy Zheng}; 2960ff75efbSIcenowy Zheng 2970ff75efbSIcenowy Zheng®_dldo1 { 2980ff75efbSIcenowy Zheng regulator-min-microvolt = <3300000>; 2990ff75efbSIcenowy Zheng regulator-max-microvolt = <3300000>; 3000ff75efbSIcenowy Zheng regulator-name = "vcc-hdmi-dsi"; 3010ff75efbSIcenowy Zheng}; 3020ff75efbSIcenowy Zheng 3030ff75efbSIcenowy Zheng®_dldo2 { 3040ff75efbSIcenowy Zheng regulator-min-microvolt = <3300000>; 3050ff75efbSIcenowy Zheng regulator-max-microvolt = <3300000>; 3060ff75efbSIcenowy Zheng regulator-name = "vcc-wifi"; 3070ff75efbSIcenowy Zheng}; 3080ff75efbSIcenowy Zheng 3090ff75efbSIcenowy Zheng®_dldo4 { 3100ff75efbSIcenowy Zheng regulator-min-microvolt = <1800000>; 3110ff75efbSIcenowy Zheng regulator-max-microvolt = <3300000>; 3120ff75efbSIcenowy Zheng regulator-name = "vcc-wifi-io"; 3130ff75efbSIcenowy Zheng}; 3140ff75efbSIcenowy Zheng 31581866805SJagan Teki®_drivevbus { 31681866805SJagan Teki regulator-name = "usb0-vbus"; 31781866805SJagan Teki status = "okay"; 31881866805SJagan Teki}; 31981866805SJagan Teki 3200ff75efbSIcenowy Zheng®_eldo1 { 3210ff75efbSIcenowy Zheng regulator-min-microvolt = <1800000>; 3220ff75efbSIcenowy Zheng regulator-max-microvolt = <1800000>; 3230ff75efbSIcenowy Zheng regulator-name = "cpvdd"; 3240ff75efbSIcenowy Zheng}; 3250ff75efbSIcenowy Zheng 3260ff75efbSIcenowy Zheng®_fldo1 { 3270ff75efbSIcenowy Zheng regulator-min-microvolt = <1200000>; 3280ff75efbSIcenowy Zheng regulator-max-microvolt = <1200000>; 3290ff75efbSIcenowy Zheng regulator-name = "vcc-1v2-hsic"; 3300ff75efbSIcenowy Zheng}; 3310ff75efbSIcenowy Zheng 3320ff75efbSIcenowy Zheng/* 3330ff75efbSIcenowy Zheng * The A64 chip cannot work without this regulator off, although 3340ff75efbSIcenowy Zheng * it seems to be only driving the AR100 core. 3350ff75efbSIcenowy Zheng * Maybe we don't still know well about CPUs domain. 3360ff75efbSIcenowy Zheng */ 3370ff75efbSIcenowy Zheng®_fldo2 { 3380ff75efbSIcenowy Zheng regulator-always-on; 3390ff75efbSIcenowy Zheng regulator-min-microvolt = <1100000>; 3400ff75efbSIcenowy Zheng regulator-max-microvolt = <1100000>; 3410ff75efbSIcenowy Zheng regulator-name = "vdd-cpus"; 3420ff75efbSIcenowy Zheng}; 3430ff75efbSIcenowy Zheng 3440ff75efbSIcenowy Zheng®_rtc_ldo { 3450ff75efbSIcenowy Zheng regulator-name = "vcc-rtc"; 3460ff75efbSIcenowy Zheng}; 3470ff75efbSIcenowy Zheng 3485cbef9f9SIcenowy Zheng&simplefb_hdmi { 3495cbef9f9SIcenowy Zheng vcc-hdmi-supply = <®_dldo1>; 3505cbef9f9SIcenowy Zheng}; 3515cbef9f9SIcenowy Zheng 352c56689e6SChen-Yu Tsai&sound { 353c56689e6SChen-Yu Tsai status = "okay"; 354c56689e6SChen-Yu Tsai simple-audio-card,widgets = "Headphone", "Headphone Jack", 355c56689e6SChen-Yu Tsai "Microphone", "Microphone Jack", 356c56689e6SChen-Yu Tsai "Microphone", "Onboard Microphone"; 357c56689e6SChen-Yu Tsai simple-audio-card,routing = 358c56689e6SChen-Yu Tsai "Left DAC", "AIF1 Slot 0 Left", 359c56689e6SChen-Yu Tsai "Right DAC", "AIF1 Slot 0 Right", 360c56689e6SChen-Yu Tsai "AIF1 Slot 0 Left ADC", "Left ADC", 361c56689e6SChen-Yu Tsai "AIF1 Slot 0 Right ADC", "Right ADC", 362c56689e6SChen-Yu Tsai "Headphone Jack", "HP", 363c56689e6SChen-Yu Tsai "MIC2", "Microphone Jack", 364c56689e6SChen-Yu Tsai "Onboard Microphone", "MBIAS", 365c56689e6SChen-Yu Tsai "MIC1", "Onboard Microphone"; 366c56689e6SChen-Yu Tsai}; 367c56689e6SChen-Yu Tsai 368b8bcf0e1SAndre Przywara&uart0 { 369b8bcf0e1SAndre Przywara pinctrl-names = "default"; 370d91ebb95SChen-Yu Tsai pinctrl-0 = <&uart0_pb_pins>; 371b8bcf0e1SAndre Przywara status = "okay"; 372b8bcf0e1SAndre Przywara}; 373b8bcf0e1SAndre Przywara 374b8bcf0e1SAndre Przywara&uart1 { 375b8bcf0e1SAndre Przywara pinctrl-names = "default"; 376b8bcf0e1SAndre Przywara pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; 377c266a2b4SChen-Yu Tsai uart-has-rtscts; 378b8bcf0e1SAndre Przywara status = "okay"; 379c266a2b4SChen-Yu Tsai 380c266a2b4SChen-Yu Tsai bluetooth { 381c266a2b4SChen-Yu Tsai compatible = "brcm,bcm43438-bt"; 382c266a2b4SChen-Yu Tsai clocks = <&rtc 1>; 383c266a2b4SChen-Yu Tsai clock-names = "lpo"; 384c266a2b4SChen-Yu Tsai vbat-supply = <®_dldo2>; 385c266a2b4SChen-Yu Tsai vddio-supply = <®_dldo4>; 386c266a2b4SChen-Yu Tsai device-wakeup-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ 387c266a2b4SChen-Yu Tsai host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */ 388c266a2b4SChen-Yu Tsai shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ 389c266a2b4SChen-Yu Tsai }; 390b8bcf0e1SAndre Przywara}; 39115ec9598SIcenowy Zheng 39281866805SJagan Teki&usb_otg { 39381866805SJagan Teki dr_mode = "otg"; 39481866805SJagan Teki status = "okay"; 39581866805SJagan Teki}; 39681866805SJagan Teki 39715ec9598SIcenowy Zheng&usbphy { 39881866805SJagan Teki usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ 39981866805SJagan Teki usb0_vbus-supply = <®_drivevbus>; 40015ec9598SIcenowy Zheng status = "okay"; 40115ec9598SIcenowy Zheng}; 402