1*d2912cb1SThomas Gleixner/* SPDX-License-Identifier: GPL-2.0-only */ 21da177e4SLinus Torvalds/* 31da177e4SLinus Torvalds * linux/arch/arm/mm/tlbv4.S 41da177e4SLinus Torvalds * 51da177e4SLinus Torvalds * Copyright (C) 1997-2002 Russell King 61da177e4SLinus Torvalds * 71da177e4SLinus Torvalds * ARM architecture version 4 TLB handling functions. 81da177e4SLinus Torvalds * These assume a split I/D TLBs, and no write buffer. 91da177e4SLinus Torvalds * 101da177e4SLinus Torvalds * Processors: ARM720T 111da177e4SLinus Torvalds */ 121da177e4SLinus Torvalds#include <linux/linkage.h> 131da177e4SLinus Torvalds#include <linux/init.h> 146ebbf2ceSRussell King#include <asm/assembler.h> 15e6ae744dSSam Ravnborg#include <asm/asm-offsets.h> 161da177e4SLinus Torvalds#include <asm/tlbflush.h> 171da177e4SLinus Torvalds#include "proc-macros.S" 181da177e4SLinus Torvalds 191da177e4SLinus Torvalds .align 5 201da177e4SLinus Torvalds/* 211da177e4SLinus Torvalds * v4_flush_user_tlb_range(start, end, mm) 221da177e4SLinus Torvalds * 231da177e4SLinus Torvalds * Invalidate a range of TLB entries in the specified user address space. 241da177e4SLinus Torvalds * 251da177e4SLinus Torvalds * - start - range start address 261da177e4SLinus Torvalds * - end - range end address 271da177e4SLinus Torvalds * - mm - mm_struct describing address space 281da177e4SLinus Torvalds */ 291da177e4SLinus Torvalds .align 5 301da177e4SLinus TorvaldsENTRY(v4_flush_user_tlb_range) 311da177e4SLinus Torvalds vma_vm_mm ip, r2 321da177e4SLinus Torvalds act_mm r3 @ get current->active_mm 331da177e4SLinus Torvalds eors r3, ip, r3 @ == mm ? 346ebbf2ceSRussell King retne lr @ no, we dont do anything 351da177e4SLinus Torvalds.v4_flush_kern_tlb_range: 361da177e4SLinus Torvalds bic r0, r0, #0x0ff 371da177e4SLinus Torvalds bic r0, r0, #0xf00 381da177e4SLinus Torvalds1: mcr p15, 0, r0, c8, c7, 1 @ invalidate TLB entry 391da177e4SLinus Torvalds add r0, r0, #PAGE_SZ 401da177e4SLinus Torvalds cmp r0, r1 411da177e4SLinus Torvalds blo 1b 426ebbf2ceSRussell King ret lr 431da177e4SLinus Torvalds 441da177e4SLinus Torvalds/* 451da177e4SLinus Torvalds * v4_flush_kern_tlb_range(start, end) 461da177e4SLinus Torvalds * 471da177e4SLinus Torvalds * Invalidate a range of TLB entries in the specified kernel 481da177e4SLinus Torvalds * address range. 491da177e4SLinus Torvalds * 501da177e4SLinus Torvalds * - start - virtual address (may not be aligned) 511da177e4SLinus Torvalds * - end - virtual address (may not be aligned) 521da177e4SLinus Torvalds */ 531da177e4SLinus Torvalds.globl v4_flush_kern_tlb_range 541da177e4SLinus Torvalds.equ v4_flush_kern_tlb_range, .v4_flush_kern_tlb_range 551da177e4SLinus Torvalds 561da177e4SLinus Torvalds __INITDATA 571da177e4SLinus Torvalds 58f249a642SDave Martin /* define struct cpu_tlb_fns (see <asm/tlbflush.h> and proc-macros.S) */ 59f249a642SDave Martin define_tlb_functions v4, v4_tlb_flags 60