xref: /openbmc/linux/arch/arm/mm/copypage-v4wt.c (revision d73e60b7144a86baf0fdfcc9537a70bb4f72e11c)
1 /*
2  *  linux/arch/arm/mm/copypage-v4wt.S
3  *
4  *  Copyright (C) 1995-1999 Russell King
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  *  This is for CPUs with a writethrough cache and 'flush ID cache' is
11  *  the only supported cache operation.
12  */
13 #include <linux/init.h>
14 
15 #include <asm/page.h>
16 
17 /*
18  * ARMv4 optimised copy_user_page
19  *
20  * Since we have writethrough caches, we don't have to worry about
21  * dirty data in the cache.  However, we do have to ensure that
22  * subsequent reads are up to date.
23  */
24 void __attribute__((naked))
25 v4wt_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
26 {
27 	asm("\
28 	stmfd	sp!, {r4, lr}			@ 2\n\
29 	mov	r2, %0				@ 1\n\
30 	ldmia	r1!, {r3, r4, ip, lr}		@ 4\n\
31 1:	stmia	r0!, {r3, r4, ip, lr}		@ 4\n\
32 	ldmia	r1!, {r3, r4, ip, lr}		@ 4+1\n\
33 	stmia	r0!, {r3, r4, ip, lr}		@ 4\n\
34 	ldmia	r1!, {r3, r4, ip, lr}		@ 4\n\
35 	stmia	r0!, {r3, r4, ip, lr}		@ 4\n\
36 	ldmia	r1!, {r3, r4, ip, lr}		@ 4\n\
37 	subs	r2, r2, #1			@ 1\n\
38 	stmia	r0!, {r3, r4, ip, lr}		@ 4\n\
39 	ldmneia	r1!, {r3, r4, ip, lr}		@ 4\n\
40 	bne	1b				@ 1\n\
41 	mcr	p15, 0, r2, c7, c7, 0		@ flush ID cache\n\
42 	ldmfd	sp!, {r4, pc}			@ 3"
43 	:
44 	: "I" (PAGE_SIZE / 64));
45 }
46 
47 /*
48  * ARMv4 optimised clear_user_page
49  *
50  * Same story as above.
51  */
52 void __attribute__((naked))
53 v4wt_clear_user_page(void *kaddr, unsigned long vaddr)
54 {
55 	asm("\
56 	str	lr, [sp, #-4]!\n\
57 	mov	r1, %0				@ 1\n\
58 	mov	r2, #0				@ 1\n\
59 	mov	r3, #0				@ 1\n\
60 	mov	ip, #0				@ 1\n\
61 	mov	lr, #0				@ 1\n\
62 1:	stmia	r0!, {r2, r3, ip, lr}		@ 4\n\
63 	stmia	r0!, {r2, r3, ip, lr}		@ 4\n\
64 	stmia	r0!, {r2, r3, ip, lr}		@ 4\n\
65 	stmia	r0!, {r2, r3, ip, lr}		@ 4\n\
66 	subs	r1, r1, #1			@ 1\n\
67 	bne	1b				@ 1\n\
68 	mcr	p15, 0, r2, c7, c7, 0		@ flush ID cache\n\
69 	ldr	pc, [sp], #4"
70 	:
71 	: "I" (PAGE_SIZE / 64));
72 }
73 
74 struct cpu_user_fns v4wt_user_fns __initdata = {
75 	.cpu_clear_user_page	= v4wt_clear_user_page,
76 	.cpu_copy_user_page	= v4wt_copy_user_page,
77 };
78