xref: /openbmc/linux/arch/arm/mm/copypage-v4wt.c (revision 063b0a4207e43acbeff3d4b09f43e750e0212b48)
1d73e60b7SRussell King /*
2d73e60b7SRussell King  *  linux/arch/arm/mm/copypage-v4wt.S
3d73e60b7SRussell King  *
4d73e60b7SRussell King  *  Copyright (C) 1995-1999 Russell King
5d73e60b7SRussell King  *
6d73e60b7SRussell King  * This program is free software; you can redistribute it and/or modify
7d73e60b7SRussell King  * it under the terms of the GNU General Public License version 2 as
8d73e60b7SRussell King  * published by the Free Software Foundation.
9d73e60b7SRussell King  *
10d73e60b7SRussell King  *  This is for CPUs with a writethrough cache and 'flush ID cache' is
11d73e60b7SRussell King  *  the only supported cache operation.
12d73e60b7SRussell King  */
13d73e60b7SRussell King #include <linux/init.h>
14*063b0a42SRussell King #include <linux/highmem.h>
15d73e60b7SRussell King 
16d73e60b7SRussell King /*
17*063b0a42SRussell King  * ARMv4 optimised copy_user_highpage
18d73e60b7SRussell King  *
19d73e60b7SRussell King  * Since we have writethrough caches, we don't have to worry about
20d73e60b7SRussell King  * dirty data in the cache.  However, we do have to ensure that
21d73e60b7SRussell King  * subsequent reads are up to date.
22d73e60b7SRussell King  */
23*063b0a42SRussell King static void __attribute__((naked))
24*063b0a42SRussell King v4wt_copy_user_page(void *kto, const void *kfrom)
25d73e60b7SRussell King {
26d73e60b7SRussell King 	asm("\
27d73e60b7SRussell King 	stmfd	sp!, {r4, lr}			@ 2\n\
28d73e60b7SRussell King 	mov	r2, %0				@ 1\n\
29d73e60b7SRussell King 	ldmia	r1!, {r3, r4, ip, lr}		@ 4\n\
30d73e60b7SRussell King 1:	stmia	r0!, {r3, r4, ip, lr}		@ 4\n\
31d73e60b7SRussell King 	ldmia	r1!, {r3, r4, ip, lr}		@ 4+1\n\
32d73e60b7SRussell King 	stmia	r0!, {r3, r4, ip, lr}		@ 4\n\
33d73e60b7SRussell King 	ldmia	r1!, {r3, r4, ip, lr}		@ 4\n\
34d73e60b7SRussell King 	stmia	r0!, {r3, r4, ip, lr}		@ 4\n\
35d73e60b7SRussell King 	ldmia	r1!, {r3, r4, ip, lr}		@ 4\n\
36d73e60b7SRussell King 	subs	r2, r2, #1			@ 1\n\
37d73e60b7SRussell King 	stmia	r0!, {r3, r4, ip, lr}		@ 4\n\
38d73e60b7SRussell King 	ldmneia	r1!, {r3, r4, ip, lr}		@ 4\n\
39d73e60b7SRussell King 	bne	1b				@ 1\n\
40d73e60b7SRussell King 	mcr	p15, 0, r2, c7, c7, 0		@ flush ID cache\n\
41d73e60b7SRussell King 	ldmfd	sp!, {r4, pc}			@ 3"
42d73e60b7SRussell King 	:
43d73e60b7SRussell King 	: "I" (PAGE_SIZE / 64));
44d73e60b7SRussell King }
45d73e60b7SRussell King 
46*063b0a42SRussell King void v4wt_copy_user_highpage(struct page *to, struct page *from,
47*063b0a42SRussell King 	unsigned long vaddr)
48*063b0a42SRussell King {
49*063b0a42SRussell King 	void *kto, *kfrom;
50*063b0a42SRussell King 
51*063b0a42SRussell King 	kto = kmap_atomic(to, KM_USER0);
52*063b0a42SRussell King 	kfrom = kmap_atomic(from, KM_USER1);
53*063b0a42SRussell King 	v4wt_copy_user_page(kto, kfrom);
54*063b0a42SRussell King 	kunmap_atomic(kfrom, KM_USER1);
55*063b0a42SRussell King 	kunmap_atomic(kto, KM_USER0);
56*063b0a42SRussell King }
57*063b0a42SRussell King 
58d73e60b7SRussell King /*
59d73e60b7SRussell King  * ARMv4 optimised clear_user_page
60d73e60b7SRussell King  *
61d73e60b7SRussell King  * Same story as above.
62d73e60b7SRussell King  */
63d73e60b7SRussell King void __attribute__((naked))
64d73e60b7SRussell King v4wt_clear_user_page(void *kaddr, unsigned long vaddr)
65d73e60b7SRussell King {
66d73e60b7SRussell King 	asm("\
67d73e60b7SRussell King 	str	lr, [sp, #-4]!\n\
68d73e60b7SRussell King 	mov	r1, %0				@ 1\n\
69d73e60b7SRussell King 	mov	r2, #0				@ 1\n\
70d73e60b7SRussell King 	mov	r3, #0				@ 1\n\
71d73e60b7SRussell King 	mov	ip, #0				@ 1\n\
72d73e60b7SRussell King 	mov	lr, #0				@ 1\n\
73d73e60b7SRussell King 1:	stmia	r0!, {r2, r3, ip, lr}		@ 4\n\
74d73e60b7SRussell King 	stmia	r0!, {r2, r3, ip, lr}		@ 4\n\
75d73e60b7SRussell King 	stmia	r0!, {r2, r3, ip, lr}		@ 4\n\
76d73e60b7SRussell King 	stmia	r0!, {r2, r3, ip, lr}		@ 4\n\
77d73e60b7SRussell King 	subs	r1, r1, #1			@ 1\n\
78d73e60b7SRussell King 	bne	1b				@ 1\n\
79d73e60b7SRussell King 	mcr	p15, 0, r2, c7, c7, 0		@ flush ID cache\n\
80d73e60b7SRussell King 	ldr	pc, [sp], #4"
81d73e60b7SRussell King 	:
82d73e60b7SRussell King 	: "I" (PAGE_SIZE / 64));
83d73e60b7SRussell King }
84d73e60b7SRussell King 
85d73e60b7SRussell King struct cpu_user_fns v4wt_user_fns __initdata = {
86d73e60b7SRussell King 	.cpu_clear_user_page	= v4wt_clear_user_page,
87*063b0a42SRussell King 	.cpu_copy_user_highpage	= v4wt_copy_user_highpage,
88d73e60b7SRussell King };
89