1bbe88886SCatalin Marinas#include <linux/linkage.h> 2bbe88886SCatalin Marinas#include <asm/assembler.h> 3bbe88886SCatalin Marinas/* 4bbe88886SCatalin Marinas * Function: v7_early_abort 5bbe88886SCatalin Marinas * 6*da740472SRussell King * Params : r2 = pt_regs 7*da740472SRussell King * : r4 = aborted context pc 83e287becSRussell King * : r5 = aborted context psr 9bbe88886SCatalin Marinas * 10*da740472SRussell King * Returns : r4 - r11, r13 preserved 11bbe88886SCatalin Marinas * 12bbe88886SCatalin Marinas * Purpose : obtain information about current aborted instruction. 13bbe88886SCatalin Marinas */ 14bbe88886SCatalin Marinas .align 5 15bbe88886SCatalin MarinasENTRY(v7_early_abort) 16bbe88886SCatalin Marinas /* 17bbe88886SCatalin Marinas * The effect of data aborts on on the exclusive access monitor are 18bbe88886SCatalin Marinas * UNPREDICTABLE. Do a CLREX to clear the state 19bbe88886SCatalin Marinas */ 20bbe88886SCatalin Marinas clrex 21bbe88886SCatalin Marinas 22bbe88886SCatalin Marinas mrc p15, 0, r1, c5, c0, 0 @ get FSR 23bbe88886SCatalin Marinas mrc p15, 0, r0, c6, c0, 0 @ get FAR 24bbe88886SCatalin Marinas 25bbe88886SCatalin Marinas /* 26bbe88886SCatalin Marinas * V6 code adjusts the returned DFSR. 27bbe88886SCatalin Marinas * New designs should not need to patch up faults. 28bbe88886SCatalin Marinas */ 29e220ba60SDave Estes 30e220ba60SDave Estes#if defined(CONFIG_VERIFY_PERMISSION_FAULT) 31e220ba60SDave Estes /* 32e220ba60SDave Estes * Detect erroneous permission failures and fix 33e220ba60SDave Estes */ 34e220ba60SDave Estes ldr r3, =0x40d @ On permission fault 35e220ba60SDave Estes and r3, r1, r3 36e220ba60SDave Estes cmp r3, #0x0d 37*da740472SRussell King bne do_DataAbort 38e220ba60SDave Estes 39e220ba60SDave Estes mcr p15, 0, r0, c7, c8, 0 @ Retranslate FAR 40e220ba60SDave Estes isb 410d147db0SRussell King mrc p15, 0, ip, c7, c4, 0 @ Read the PAR 420d147db0SRussell King and r3, ip, #0x7b @ On translation fault 43e220ba60SDave Estes cmp r3, #0x0b 44*da740472SRussell King bne do_DataAbort 45e220ba60SDave Estes bic r1, r1, #0xf @ Fix up FSR FS[5:0] 460d147db0SRussell King and ip, ip, #0x7e 470d147db0SRussell King orr r1, r1, ip, LSR #1 48e220ba60SDave Estes#endif 49e220ba60SDave Estes 50*da740472SRussell King b do_DataAbort 5193ed3970SCatalin MarinasENDPROC(v7_early_abort) 52