xref: /openbmc/linux/arch/arm/mm/abort-ev7.S (revision bbe888864ec32435e93923c40b9d6ce2bb73844b)
1*bbe88886SCatalin Marinas#include <linux/linkage.h>
2*bbe88886SCatalin Marinas#include <asm/assembler.h>
3*bbe88886SCatalin Marinas/*
4*bbe88886SCatalin Marinas * Function: v7_early_abort
5*bbe88886SCatalin Marinas *
6*bbe88886SCatalin Marinas * Params  : r2 = address of aborted instruction
7*bbe88886SCatalin Marinas *         : r3 = saved SPSR
8*bbe88886SCatalin Marinas *
9*bbe88886SCatalin Marinas * Returns : r0 = address of abort
10*bbe88886SCatalin Marinas *	   : r1 = FSR, bit 11 = write
11*bbe88886SCatalin Marinas *	   : r2-r8 = corrupted
12*bbe88886SCatalin Marinas *	   : r9 = preserved
13*bbe88886SCatalin Marinas *	   : sp = pointer to registers
14*bbe88886SCatalin Marinas *
15*bbe88886SCatalin Marinas * Purpose : obtain information about current aborted instruction.
16*bbe88886SCatalin Marinas */
17*bbe88886SCatalin Marinas	.align	5
18*bbe88886SCatalin MarinasENTRY(v7_early_abort)
19*bbe88886SCatalin Marinas	/*
20*bbe88886SCatalin Marinas	 * The effect of data aborts on on the exclusive access monitor are
21*bbe88886SCatalin Marinas	 * UNPREDICTABLE. Do a CLREX to clear the state
22*bbe88886SCatalin Marinas	 */
23*bbe88886SCatalin Marinas	clrex
24*bbe88886SCatalin Marinas
25*bbe88886SCatalin Marinas	mrc	p15, 0, r1, c5, c0, 0		@ get FSR
26*bbe88886SCatalin Marinas	mrc	p15, 0, r0, c6, c0, 0		@ get FAR
27*bbe88886SCatalin Marinas
28*bbe88886SCatalin Marinas	/*
29*bbe88886SCatalin Marinas	 * V6 code adjusts the returned DFSR.
30*bbe88886SCatalin Marinas	 * New designs should not need to patch up faults.
31*bbe88886SCatalin Marinas	 */
32*bbe88886SCatalin Marinas	mov	pc, lr
33