1bbe88886SCatalin Marinas#include <linux/linkage.h> 2bbe88886SCatalin Marinas#include <asm/assembler.h> 3bbe88886SCatalin Marinas/* 4bbe88886SCatalin Marinas * Function: v7_early_abort 5bbe88886SCatalin Marinas * 6bbe88886SCatalin Marinas * Params : r2 = address of aborted instruction 7bbe88886SCatalin Marinas * : r3 = saved SPSR 8bbe88886SCatalin Marinas * 9bbe88886SCatalin Marinas * Returns : r0 = address of abort 10bbe88886SCatalin Marinas * : r1 = FSR, bit 11 = write 11bbe88886SCatalin Marinas * : r2-r8 = corrupted 12bbe88886SCatalin Marinas * : r9 = preserved 13bbe88886SCatalin Marinas * : sp = pointer to registers 14bbe88886SCatalin Marinas * 15bbe88886SCatalin Marinas * Purpose : obtain information about current aborted instruction. 16bbe88886SCatalin Marinas */ 17bbe88886SCatalin Marinas .align 5 18bbe88886SCatalin MarinasENTRY(v7_early_abort) 19bbe88886SCatalin Marinas /* 20bbe88886SCatalin Marinas * The effect of data aborts on on the exclusive access monitor are 21bbe88886SCatalin Marinas * UNPREDICTABLE. Do a CLREX to clear the state 22bbe88886SCatalin Marinas */ 23bbe88886SCatalin Marinas clrex 24bbe88886SCatalin Marinas 25bbe88886SCatalin Marinas mrc p15, 0, r1, c5, c0, 0 @ get FSR 26bbe88886SCatalin Marinas mrc p15, 0, r0, c6, c0, 0 @ get FAR 27bbe88886SCatalin Marinas 28bbe88886SCatalin Marinas /* 29bbe88886SCatalin Marinas * V6 code adjusts the returned DFSR. 30bbe88886SCatalin Marinas * New designs should not need to patch up faults. 31bbe88886SCatalin Marinas */ 32bbe88886SCatalin Marinas mov pc, lr 33*93ed3970SCatalin MarinasENDPROC(v7_early_abort) 34