1bbe88886SCatalin Marinas#include <linux/linkage.h> 2bbe88886SCatalin Marinas#include <asm/assembler.h> 3bbe88886SCatalin Marinas/* 4bbe88886SCatalin Marinas * Function: v7_early_abort 5bbe88886SCatalin Marinas * 6*3e287becSRussell King * Params : r4 = aborted context pc 7*3e287becSRussell King * : r5 = aborted context psr 8bbe88886SCatalin Marinas * 9bbe88886SCatalin Marinas * Returns : r0 = address of abort 10bbe88886SCatalin Marinas * : r1 = FSR, bit 11 = write 11bbe88886SCatalin Marinas * : r2-r8 = corrupted 12bbe88886SCatalin Marinas * : r9 = preserved 13bbe88886SCatalin Marinas * : sp = pointer to registers 14bbe88886SCatalin Marinas * 15bbe88886SCatalin Marinas * Purpose : obtain information about current aborted instruction. 16bbe88886SCatalin Marinas */ 17bbe88886SCatalin Marinas .align 5 18bbe88886SCatalin MarinasENTRY(v7_early_abort) 19bbe88886SCatalin Marinas /* 20bbe88886SCatalin Marinas * The effect of data aborts on on the exclusive access monitor are 21bbe88886SCatalin Marinas * UNPREDICTABLE. Do a CLREX to clear the state 22bbe88886SCatalin Marinas */ 23bbe88886SCatalin Marinas clrex 24bbe88886SCatalin Marinas 25bbe88886SCatalin Marinas mrc p15, 0, r1, c5, c0, 0 @ get FSR 26bbe88886SCatalin Marinas mrc p15, 0, r0, c6, c0, 0 @ get FAR 27bbe88886SCatalin Marinas 28bbe88886SCatalin Marinas /* 29bbe88886SCatalin Marinas * V6 code adjusts the returned DFSR. 30bbe88886SCatalin Marinas * New designs should not need to patch up faults. 31bbe88886SCatalin Marinas */ 32e220ba60SDave Estes 33e220ba60SDave Estes#if defined(CONFIG_VERIFY_PERMISSION_FAULT) 34e220ba60SDave Estes /* 35e220ba60SDave Estes * Detect erroneous permission failures and fix 36e220ba60SDave Estes */ 37e220ba60SDave Estes ldr r3, =0x40d @ On permission fault 38e220ba60SDave Estes and r3, r1, r3 39e220ba60SDave Estes cmp r3, #0x0d 40e220ba60SDave Estes movne pc, lr 41e220ba60SDave Estes 42e220ba60SDave Estes mcr p15, 0, r0, c7, c8, 0 @ Retranslate FAR 43e220ba60SDave Estes isb 44e220ba60SDave Estes mrc p15, 0, r2, c7, c4, 0 @ Read the PAR 45e220ba60SDave Estes and r3, r2, #0x7b @ On translation fault 46e220ba60SDave Estes cmp r3, #0x0b 47e220ba60SDave Estes movne pc, lr 48e220ba60SDave Estes bic r1, r1, #0xf @ Fix up FSR FS[5:0] 49e220ba60SDave Estes and r2, r2, #0x7e 50e220ba60SDave Estes orr r1, r1, r2, LSR #1 51e220ba60SDave Estes#endif 52e220ba60SDave Estes 53bbe88886SCatalin Marinas mov pc, lr 5493ed3970SCatalin MarinasENDPROC(v7_early_abort) 55