1*d7445676SArnd Bergmann/* SPDX-License-Identifier: GPL-2.0-only */ 2*d7445676SArnd Bergmann/* 3*d7445676SArnd Bergmann * Created by: Dave Martin, 2012-06-22 4*d7445676SArnd Bergmann * Copyright: (C) 2012-2013 Linaro Limited 5*d7445676SArnd Bergmann */ 6*d7445676SArnd Bergmann 7*d7445676SArnd Bergmann#include <linux/linkage.h> 8*d7445676SArnd Bergmann 9*d7445676SArnd Bergmann 10*d7445676SArnd BergmannENTRY(dcscb_power_up_setup) 11*d7445676SArnd Bergmann 12*d7445676SArnd Bergmann cmp r0, #0 @ check affinity level 13*d7445676SArnd Bergmann beq 2f 14*d7445676SArnd Bergmann 15*d7445676SArnd Bergmann/* 16*d7445676SArnd Bergmann * Enable cluster-level coherency, in preparation for turning on the MMU. 17*d7445676SArnd Bergmann * The ACTLR SMP bit does not need to be set here, because cpu_resume() 18*d7445676SArnd Bergmann * already restores that. 19*d7445676SArnd Bergmann * 20*d7445676SArnd Bergmann * A15/A7 may not require explicit L2 invalidation on reset, dependent 21*d7445676SArnd Bergmann * on hardware integration decisions. 22*d7445676SArnd Bergmann * For now, this code assumes that L2 is either already invalidated, 23*d7445676SArnd Bergmann * or invalidation is not required. 24*d7445676SArnd Bergmann */ 25*d7445676SArnd Bergmann 26*d7445676SArnd Bergmann b cci_enable_port_for_self 27*d7445676SArnd Bergmann 28*d7445676SArnd Bergmann2: @ Implementation-specific local CPU setup operations should go here, 29*d7445676SArnd Bergmann @ if any. In this case, there is nothing to do. 30*d7445676SArnd Bergmann 31*d7445676SArnd Bergmann bx lr 32*d7445676SArnd Bergmann 33*d7445676SArnd BergmannENDPROC(dcscb_power_up_setup) 34