15ad36c5fSErik Gilling /* 2938fa349SColin Cross * Copyright (C) 2011 Google, Inc. 35ad36c5fSErik Gilling * 45ad36c5fSErik Gilling * Author: 5938fa349SColin Cross * Colin Cross <ccross@android.com> 65ad36c5fSErik Gilling * 7e307cc89SJoseph Lo * Copyright (C) 2010,2013, NVIDIA Corporation 8460907bcSGary King * 95ad36c5fSErik Gilling * This software is licensed under the terms of the GNU General Public 105ad36c5fSErik Gilling * License version 2, as published by the Free Software Foundation, and 115ad36c5fSErik Gilling * may be copied, distributed, and modified under those terms. 125ad36c5fSErik Gilling * 135ad36c5fSErik Gilling * This program is distributed in the hope that it will be useful, 145ad36c5fSErik Gilling * but WITHOUT ANY WARRANTY; without even the implied warranty of 155ad36c5fSErik Gilling * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 165ad36c5fSErik Gilling * GNU General Public License for more details. 175ad36c5fSErik Gilling * 185ad36c5fSErik Gilling */ 195ad36c5fSErik Gilling 207e8b15dbSJoseph Lo #include <linux/cpu_pm.h> 215ad36c5fSErik Gilling #include <linux/interrupt.h> 225ad36c5fSErik Gilling #include <linux/io.h> 23520f7bd7SRob Herring #include <linux/irqchip/arm-gic.h> 24a0524accSThierry Reding #include <linux/irq.h> 25a0524accSThierry Reding #include <linux/kernel.h> 26a0524accSThierry Reding #include <linux/of_address.h> 27a0524accSThierry Reding #include <linux/of.h> 28e307cc89SJoseph Lo #include <linux/syscore_ops.h> 295ad36c5fSErik Gilling 305ad36c5fSErik Gilling #include "board.h" 312be39c07SStephen Warren #include "iomap.h" 325ad36c5fSErik Gilling 33d4b92fb2SJoseph Lo #define SGI_MASK 0xFFFF 34d4b92fb2SJoseph Lo 35e307cc89SJoseph Lo #ifdef CONFIG_PM_SLEEP 367e8b15dbSJoseph Lo static void __iomem *tegra_gic_cpu_base; 37e307cc89SJoseph Lo #endif 38e307cc89SJoseph Lo 39d4b92fb2SJoseph Lo bool tegra_pending_sgi(void) 40d4b92fb2SJoseph Lo { 41d4b92fb2SJoseph Lo u32 pending_set; 42d4b92fb2SJoseph Lo void __iomem *distbase = IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE); 43d4b92fb2SJoseph Lo 44d4b92fb2SJoseph Lo pending_set = readl_relaxed(distbase + GIC_DIST_PENDING_SET); 45d4b92fb2SJoseph Lo 46d4b92fb2SJoseph Lo if (pending_set & SGI_MASK) 47d4b92fb2SJoseph Lo return true; 48d4b92fb2SJoseph Lo 49d4b92fb2SJoseph Lo return false; 50d4b92fb2SJoseph Lo } 51d4b92fb2SJoseph Lo 52e307cc89SJoseph Lo #ifdef CONFIG_PM_SLEEP 537e8b15dbSJoseph Lo static int tegra_gic_notifier(struct notifier_block *self, 547e8b15dbSJoseph Lo unsigned long cmd, void *v) 557e8b15dbSJoseph Lo { 567e8b15dbSJoseph Lo switch (cmd) { 577e8b15dbSJoseph Lo case CPU_PM_ENTER: 587e8b15dbSJoseph Lo writel_relaxed(0x1E0, tegra_gic_cpu_base + GIC_CPU_CTRL); 597e8b15dbSJoseph Lo break; 607e8b15dbSJoseph Lo } 617e8b15dbSJoseph Lo 627e8b15dbSJoseph Lo return NOTIFY_OK; 637e8b15dbSJoseph Lo } 647e8b15dbSJoseph Lo 657e8b15dbSJoseph Lo static struct notifier_block tegra_gic_notifier_block = { 667e8b15dbSJoseph Lo .notifier_call = tegra_gic_notifier, 677e8b15dbSJoseph Lo }; 687e8b15dbSJoseph Lo 697e8b15dbSJoseph Lo static const struct of_device_id tegra114_dt_gic_match[] __initconst = { 707e8b15dbSJoseph Lo { .compatible = "arm,cortex-a15-gic" }, 717e8b15dbSJoseph Lo { } 727e8b15dbSJoseph Lo }; 737e8b15dbSJoseph Lo 747e8b15dbSJoseph Lo static void tegra114_gic_cpu_pm_registration(void) 757e8b15dbSJoseph Lo { 767e8b15dbSJoseph Lo struct device_node *dn; 777e8b15dbSJoseph Lo 787e8b15dbSJoseph Lo dn = of_find_matching_node(NULL, tegra114_dt_gic_match); 797e8b15dbSJoseph Lo if (!dn) 807e8b15dbSJoseph Lo return; 817e8b15dbSJoseph Lo 827e8b15dbSJoseph Lo tegra_gic_cpu_base = of_iomap(dn, 1); 837e8b15dbSJoseph Lo 847e8b15dbSJoseph Lo cpu_pm_register_notifier(&tegra_gic_notifier_block); 857e8b15dbSJoseph Lo } 86e307cc89SJoseph Lo #else 877e8b15dbSJoseph Lo static void tegra114_gic_cpu_pm_registration(void) { } 88e307cc89SJoseph Lo #endif 89e307cc89SJoseph Lo 90e9479e0eSMarc Zyngier static const struct of_device_id tegra_ictlr_match[] __initconst = { 91e9479e0eSMarc Zyngier { .compatible = "nvidia,tegra20-ictlr" }, 92e9479e0eSMarc Zyngier { .compatible = "nvidia,tegra30-ictlr" }, 93e9479e0eSMarc Zyngier { } 94e9479e0eSMarc Zyngier }; 95e9479e0eSMarc Zyngier 965ad36c5fSErik Gilling void __init tegra_init_irq(void) 975ad36c5fSErik Gilling { 98*1a703bffSMarc Zyngier if (WARN_ON(!of_find_matching_node(NULL, tegra_ictlr_match))) 99*1a703bffSMarc Zyngier pr_warn("Outdated DT detected, suspend/resume will NOT work\n"); 100d1d8c666SColin Cross 1017e8b15dbSJoseph Lo tegra114_gic_cpu_pm_registration(); 102460907bcSGary King } 103