1a7ed099fSArnd Bergmann /* 2a7ed099fSArnd Bergmann * arch/arm/mach-spear3xx/spear3xx.c 3a7ed099fSArnd Bergmann * 4a7ed099fSArnd Bergmann * SPEAr3XX machines common source file 5a7ed099fSArnd Bergmann * 6a7ed099fSArnd Bergmann * Copyright (C) 2009-2012 ST Microelectronics 7da89947bSViresh Kumar * Viresh Kumar <vireshk@kernel.org> 8a7ed099fSArnd Bergmann * 9a7ed099fSArnd Bergmann * This file is licensed under the terms of the GNU General Public 10a7ed099fSArnd Bergmann * License version 2. This program is licensed "as is" without any 11a7ed099fSArnd Bergmann * warranty of any kind, whether express or implied. 12a7ed099fSArnd Bergmann */ 13a7ed099fSArnd Bergmann 14a7ed099fSArnd Bergmann #define pr_fmt(fmt) "SPEAr3xx: " fmt 15a7ed099fSArnd Bergmann 16a7ed099fSArnd Bergmann #include <linux/amba/pl022.h> 17a7ed099fSArnd Bergmann #include <linux/amba/pl080.h> 18a7ed099fSArnd Bergmann #include <linux/clk.h> 19a7ed099fSArnd Bergmann #include <linux/io.h> 20a7ed099fSArnd Bergmann #include <asm/mach/map.h> 212b9c613cSArnd Bergmann #include "pl080.h" 222b9c613cSArnd Bergmann #include "generic.h" 23*c164620aSArnd Bergmann #include "spear.h" 24*c164620aSArnd Bergmann #include "misc_regs.h" 25a7ed099fSArnd Bergmann 26a7ed099fSArnd Bergmann /* ssp device registration */ 27a7ed099fSArnd Bergmann struct pl022_ssp_controller pl022_plat_data = { 28a7ed099fSArnd Bergmann .bus_id = 0, 29a7ed099fSArnd Bergmann .enable_dma = 1, 30a7ed099fSArnd Bergmann .dma_filter = pl08x_filter_id, 31a7ed099fSArnd Bergmann .dma_tx_param = "ssp0_tx", 32a7ed099fSArnd Bergmann .dma_rx_param = "ssp0_rx", 33a7ed099fSArnd Bergmann }; 34a7ed099fSArnd Bergmann 35a7ed099fSArnd Bergmann /* dmac device registration */ 36a7ed099fSArnd Bergmann struct pl08x_platform_data pl080_plat_data = { 374166a56aSLinus Walleij .memcpy_burst_size = PL08X_BURST_SZ_16, 384166a56aSLinus Walleij .memcpy_bus_width = PL08X_BUS_WIDTH_32_BITS, 394166a56aSLinus Walleij .memcpy_prot_buff = true, 404166a56aSLinus Walleij .memcpy_prot_cache = true, 41a7ed099fSArnd Bergmann .lli_buses = PL08X_AHB1, 42a7ed099fSArnd Bergmann .mem_buses = PL08X_AHB1, 43d7cabeedSMark Brown .get_xfer_signal = pl080_get_signal, 44d7cabeedSMark Brown .put_xfer_signal = pl080_put_signal, 45a7ed099fSArnd Bergmann }; 46a7ed099fSArnd Bergmann 47a7ed099fSArnd Bergmann /* 48a7ed099fSArnd Bergmann * Following will create 16MB static virtual/physical mappings 49a7ed099fSArnd Bergmann * PHYSICAL VIRTUAL 50a7ed099fSArnd Bergmann * 0xD0000000 0xFD000000 51a7ed099fSArnd Bergmann * 0xFC000000 0xFC000000 52a7ed099fSArnd Bergmann */ 53a7ed099fSArnd Bergmann struct map_desc spear3xx_io_desc[] __initdata = { 54a7ed099fSArnd Bergmann { 55d9909ebeSArnd Bergmann .virtual = (unsigned long)VA_SPEAR_ICM1_2_BASE, 56a7ed099fSArnd Bergmann .pfn = __phys_to_pfn(SPEAR_ICM1_2_BASE), 57a7ed099fSArnd Bergmann .length = SZ_16M, 58a7ed099fSArnd Bergmann .type = MT_DEVICE 59a7ed099fSArnd Bergmann }, { 60d9909ebeSArnd Bergmann .virtual = (unsigned long)VA_SPEAR_ICM3_SMI_CTRL_BASE, 61a7ed099fSArnd Bergmann .pfn = __phys_to_pfn(SPEAR_ICM3_SMI_CTRL_BASE), 62a7ed099fSArnd Bergmann .length = SZ_16M, 63a7ed099fSArnd Bergmann .type = MT_DEVICE 64a7ed099fSArnd Bergmann }, 65a7ed099fSArnd Bergmann }; 66a7ed099fSArnd Bergmann 67a7ed099fSArnd Bergmann /* This will create static memory mapping for selected devices */ 68a7ed099fSArnd Bergmann void __init spear3xx_map_io(void) 69a7ed099fSArnd Bergmann { 70a7ed099fSArnd Bergmann iotable_init(spear3xx_io_desc, ARRAY_SIZE(spear3xx_io_desc)); 71a7ed099fSArnd Bergmann } 72a7ed099fSArnd Bergmann 73a7ed099fSArnd Bergmann void __init spear3xx_timer_init(void) 74a7ed099fSArnd Bergmann { 75a7ed099fSArnd Bergmann char pclk_name[] = "pll3_clk"; 76a7ed099fSArnd Bergmann struct clk *gpt_clk, *pclk; 77a7ed099fSArnd Bergmann 78d9909ebeSArnd Bergmann spear3xx_clk_init(MISC_BASE, VA_SPEAR320_SOC_CONFIG_BASE); 79a7ed099fSArnd Bergmann 80a7ed099fSArnd Bergmann /* get the system timer clock */ 81a7ed099fSArnd Bergmann gpt_clk = clk_get_sys("gpt0", NULL); 82a7ed099fSArnd Bergmann if (IS_ERR(gpt_clk)) { 83a7ed099fSArnd Bergmann pr_err("%s:couldn't get clk for gpt\n", __func__); 84a7ed099fSArnd Bergmann BUG(); 85a7ed099fSArnd Bergmann } 86a7ed099fSArnd Bergmann 87a7ed099fSArnd Bergmann /* get the suitable parent clock for timer*/ 88a7ed099fSArnd Bergmann pclk = clk_get(NULL, pclk_name); 89a7ed099fSArnd Bergmann if (IS_ERR(pclk)) { 90a7ed099fSArnd Bergmann pr_err("%s:couldn't get %s as parent for gpt\n", 91a7ed099fSArnd Bergmann __func__, pclk_name); 92a7ed099fSArnd Bergmann BUG(); 93a7ed099fSArnd Bergmann } 94a7ed099fSArnd Bergmann 95a7ed099fSArnd Bergmann clk_set_parent(gpt_clk, pclk); 96a7ed099fSArnd Bergmann clk_put(gpt_clk); 97a7ed099fSArnd Bergmann clk_put(pclk); 98a7ed099fSArnd Bergmann 99a7ed099fSArnd Bergmann spear_setup_of_timer(); 100a7ed099fSArnd Bergmann } 101