1*0fdebc5eSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2a7ed099fSArnd Bergmann /* 3a7ed099fSArnd Bergmann * arch/arm/mach-spear3xx/spear3xx.c 4a7ed099fSArnd Bergmann * 5a7ed099fSArnd Bergmann * SPEAr3XX machines common source file 6a7ed099fSArnd Bergmann * 7a7ed099fSArnd Bergmann * Copyright (C) 2009-2012 ST Microelectronics 8da89947bSViresh Kumar * Viresh Kumar <vireshk@kernel.org> 9a7ed099fSArnd Bergmann */ 10a7ed099fSArnd Bergmann 11a7ed099fSArnd Bergmann #define pr_fmt(fmt) "SPEAr3xx: " fmt 12a7ed099fSArnd Bergmann 13a7ed099fSArnd Bergmann #include <linux/amba/pl022.h> 14a7ed099fSArnd Bergmann #include <linux/amba/pl080.h> 15a7ed099fSArnd Bergmann #include <linux/clk.h> 16a7ed099fSArnd Bergmann #include <linux/io.h> 17a7ed099fSArnd Bergmann #include <asm/mach/map.h> 182b9c613cSArnd Bergmann #include "pl080.h" 192b9c613cSArnd Bergmann #include "generic.h" 20c164620aSArnd Bergmann #include "spear.h" 21c164620aSArnd Bergmann #include "misc_regs.h" 22a7ed099fSArnd Bergmann 23a7ed099fSArnd Bergmann /* ssp device registration */ 24a7ed099fSArnd Bergmann struct pl022_ssp_controller pl022_plat_data = { 25a7ed099fSArnd Bergmann .bus_id = 0, 26a7ed099fSArnd Bergmann .enable_dma = 1, 27a7ed099fSArnd Bergmann .dma_filter = pl08x_filter_id, 28a7ed099fSArnd Bergmann .dma_tx_param = "ssp0_tx", 29a7ed099fSArnd Bergmann .dma_rx_param = "ssp0_rx", 30a7ed099fSArnd Bergmann }; 31a7ed099fSArnd Bergmann 32a7ed099fSArnd Bergmann /* dmac device registration */ 33a7ed099fSArnd Bergmann struct pl08x_platform_data pl080_plat_data = { 344166a56aSLinus Walleij .memcpy_burst_size = PL08X_BURST_SZ_16, 354166a56aSLinus Walleij .memcpy_bus_width = PL08X_BUS_WIDTH_32_BITS, 364166a56aSLinus Walleij .memcpy_prot_buff = true, 374166a56aSLinus Walleij .memcpy_prot_cache = true, 38a7ed099fSArnd Bergmann .lli_buses = PL08X_AHB1, 39a7ed099fSArnd Bergmann .mem_buses = PL08X_AHB1, 40d7cabeedSMark Brown .get_xfer_signal = pl080_get_signal, 41d7cabeedSMark Brown .put_xfer_signal = pl080_put_signal, 42a7ed099fSArnd Bergmann }; 43a7ed099fSArnd Bergmann 44a7ed099fSArnd Bergmann /* 45a7ed099fSArnd Bergmann * Following will create 16MB static virtual/physical mappings 46a7ed099fSArnd Bergmann * PHYSICAL VIRTUAL 47a7ed099fSArnd Bergmann * 0xD0000000 0xFD000000 48a7ed099fSArnd Bergmann * 0xFC000000 0xFC000000 49a7ed099fSArnd Bergmann */ 50a7ed099fSArnd Bergmann struct map_desc spear3xx_io_desc[] __initdata = { 51a7ed099fSArnd Bergmann { 52d9909ebeSArnd Bergmann .virtual = (unsigned long)VA_SPEAR_ICM1_2_BASE, 53a7ed099fSArnd Bergmann .pfn = __phys_to_pfn(SPEAR_ICM1_2_BASE), 54a7ed099fSArnd Bergmann .length = SZ_16M, 55a7ed099fSArnd Bergmann .type = MT_DEVICE 56a7ed099fSArnd Bergmann }, { 57d9909ebeSArnd Bergmann .virtual = (unsigned long)VA_SPEAR_ICM3_SMI_CTRL_BASE, 58a7ed099fSArnd Bergmann .pfn = __phys_to_pfn(SPEAR_ICM3_SMI_CTRL_BASE), 59a7ed099fSArnd Bergmann .length = SZ_16M, 60a7ed099fSArnd Bergmann .type = MT_DEVICE 61a7ed099fSArnd Bergmann }, 62a7ed099fSArnd Bergmann }; 63a7ed099fSArnd Bergmann 64a7ed099fSArnd Bergmann /* This will create static memory mapping for selected devices */ 65a7ed099fSArnd Bergmann void __init spear3xx_map_io(void) 66a7ed099fSArnd Bergmann { 67a7ed099fSArnd Bergmann iotable_init(spear3xx_io_desc, ARRAY_SIZE(spear3xx_io_desc)); 68a7ed099fSArnd Bergmann } 69a7ed099fSArnd Bergmann 70a7ed099fSArnd Bergmann void __init spear3xx_timer_init(void) 71a7ed099fSArnd Bergmann { 72a7ed099fSArnd Bergmann char pclk_name[] = "pll3_clk"; 73a7ed099fSArnd Bergmann struct clk *gpt_clk, *pclk; 74a7ed099fSArnd Bergmann 75d9909ebeSArnd Bergmann spear3xx_clk_init(MISC_BASE, VA_SPEAR320_SOC_CONFIG_BASE); 76a7ed099fSArnd Bergmann 77a7ed099fSArnd Bergmann /* get the system timer clock */ 78a7ed099fSArnd Bergmann gpt_clk = clk_get_sys("gpt0", NULL); 79a7ed099fSArnd Bergmann if (IS_ERR(gpt_clk)) { 80a7ed099fSArnd Bergmann pr_err("%s:couldn't get clk for gpt\n", __func__); 81a7ed099fSArnd Bergmann BUG(); 82a7ed099fSArnd Bergmann } 83a7ed099fSArnd Bergmann 84a7ed099fSArnd Bergmann /* get the suitable parent clock for timer*/ 85a7ed099fSArnd Bergmann pclk = clk_get(NULL, pclk_name); 86a7ed099fSArnd Bergmann if (IS_ERR(pclk)) { 87a7ed099fSArnd Bergmann pr_err("%s:couldn't get %s as parent for gpt\n", 88a7ed099fSArnd Bergmann __func__, pclk_name); 89a7ed099fSArnd Bergmann BUG(); 90a7ed099fSArnd Bergmann } 91a7ed099fSArnd Bergmann 92a7ed099fSArnd Bergmann clk_set_parent(gpt_clk, pclk); 93a7ed099fSArnd Bergmann clk_put(gpt_clk); 94a7ed099fSArnd Bergmann clk_put(pclk); 95a7ed099fSArnd Bergmann 96a7ed099fSArnd Bergmann spear_setup_of_timer(); 97a7ed099fSArnd Bergmann } 98