1*2874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
29dd0b194SLennert Buytenhek /*
39dd0b194SLennert Buytenhek * QNAP TS-109/TS-209 Board Setup
49dd0b194SLennert Buytenhek *
59dd0b194SLennert Buytenhek * Maintainer: Byron Bradley <byron.bbradley@gmail.com>
69dd0b194SLennert Buytenhek */
72f8163baSRussell King #include <linux/gpio.h>
89dd0b194SLennert Buytenhek #include <linux/kernel.h>
99dd0b194SLennert Buytenhek #include <linux/init.h>
109dd0b194SLennert Buytenhek #include <linux/platform_device.h>
119dd0b194SLennert Buytenhek #include <linux/pci.h>
129dd0b194SLennert Buytenhek #include <linux/irq.h>
139dd0b194SLennert Buytenhek #include <linux/mtd/physmap.h>
14d4092d76SBoris Brezillon #include <linux/mtd/rawnand.h>
159dd0b194SLennert Buytenhek #include <linux/mv643xx_eth.h>
169dd0b194SLennert Buytenhek #include <linux/gpio_keys.h>
179dd0b194SLennert Buytenhek #include <linux/input.h>
189dd0b194SLennert Buytenhek #include <linux/i2c.h>
199dd0b194SLennert Buytenhek #include <linux/serial_reg.h>
209dd0b194SLennert Buytenhek #include <linux/ata_platform.h>
219dd0b194SLennert Buytenhek #include <asm/mach-types.h>
229dd0b194SLennert Buytenhek #include <asm/mach/arch.h>
239dd0b194SLennert Buytenhek #include <asm/mach/pci.h>
249dd0b194SLennert Buytenhek #include "common.h"
2519cfd5c0SLennert Buytenhek #include "mpp.h"
26c22c2c60SArnd Bergmann #include "orion5x.h"
27530c854aSSylver Bruneau #include "tsx09-common.h"
289dd0b194SLennert Buytenhek
299dd0b194SLennert Buytenhek #define QNAP_TS209_NOR_BOOT_BASE 0xf4000000
309dd0b194SLennert Buytenhek #define QNAP_TS209_NOR_BOOT_SIZE SZ_8M
319dd0b194SLennert Buytenhek
329dd0b194SLennert Buytenhek /****************************************************************************
339dd0b194SLennert Buytenhek * 8MiB NOR flash. The struct mtd_partition is not in the same order as the
3425985edcSLucas De Marchi * partitions on the device because we want to keep compatibility with
359dd0b194SLennert Buytenhek * existing QNAP firmware.
369dd0b194SLennert Buytenhek *
379dd0b194SLennert Buytenhek * Layout as used by QNAP:
389dd0b194SLennert Buytenhek * [2] 0x00000000-0x00200000 : "Kernel"
399dd0b194SLennert Buytenhek * [3] 0x00200000-0x00600000 : "RootFS1"
409dd0b194SLennert Buytenhek * [4] 0x00600000-0x00700000 : "RootFS2"
419dd0b194SLennert Buytenhek * [6] 0x00700000-0x00760000 : "NAS Config" (read-only)
429dd0b194SLennert Buytenhek * [5] 0x00760000-0x00780000 : "U-Boot Config"
439dd0b194SLennert Buytenhek * [1] 0x00780000-0x00800000 : "U-Boot" (read-only)
449dd0b194SLennert Buytenhek ***************************************************************************/
459dd0b194SLennert Buytenhek static struct mtd_partition qnap_ts209_partitions[] = {
469dd0b194SLennert Buytenhek {
479dd0b194SLennert Buytenhek .name = "U-Boot",
489dd0b194SLennert Buytenhek .size = 0x00080000,
499dd0b194SLennert Buytenhek .offset = 0x00780000,
509dd0b194SLennert Buytenhek .mask_flags = MTD_WRITEABLE,
519dd0b194SLennert Buytenhek }, {
529dd0b194SLennert Buytenhek .name = "Kernel",
539dd0b194SLennert Buytenhek .size = 0x00200000,
549dd0b194SLennert Buytenhek .offset = 0,
559dd0b194SLennert Buytenhek }, {
569dd0b194SLennert Buytenhek .name = "RootFS1",
579dd0b194SLennert Buytenhek .size = 0x00400000,
589dd0b194SLennert Buytenhek .offset = 0x00200000,
599dd0b194SLennert Buytenhek }, {
609dd0b194SLennert Buytenhek .name = "RootFS2",
619dd0b194SLennert Buytenhek .size = 0x00100000,
629dd0b194SLennert Buytenhek .offset = 0x00600000,
639dd0b194SLennert Buytenhek }, {
649dd0b194SLennert Buytenhek .name = "U-Boot Config",
659dd0b194SLennert Buytenhek .size = 0x00020000,
669dd0b194SLennert Buytenhek .offset = 0x00760000,
679dd0b194SLennert Buytenhek }, {
689dd0b194SLennert Buytenhek .name = "NAS Config",
699dd0b194SLennert Buytenhek .size = 0x00060000,
709dd0b194SLennert Buytenhek .offset = 0x00700000,
719dd0b194SLennert Buytenhek .mask_flags = MTD_WRITEABLE,
72e7068ad3SLennert Buytenhek },
739dd0b194SLennert Buytenhek };
749dd0b194SLennert Buytenhek
759dd0b194SLennert Buytenhek static struct physmap_flash_data qnap_ts209_nor_flash_data = {
769dd0b194SLennert Buytenhek .width = 1,
779dd0b194SLennert Buytenhek .parts = qnap_ts209_partitions,
789dd0b194SLennert Buytenhek .nr_parts = ARRAY_SIZE(qnap_ts209_partitions)
799dd0b194SLennert Buytenhek };
809dd0b194SLennert Buytenhek
819dd0b194SLennert Buytenhek static struct resource qnap_ts209_nor_flash_resource = {
829dd0b194SLennert Buytenhek .flags = IORESOURCE_MEM,
839dd0b194SLennert Buytenhek .start = QNAP_TS209_NOR_BOOT_BASE,
849dd0b194SLennert Buytenhek .end = QNAP_TS209_NOR_BOOT_BASE + QNAP_TS209_NOR_BOOT_SIZE - 1,
859dd0b194SLennert Buytenhek };
869dd0b194SLennert Buytenhek
879dd0b194SLennert Buytenhek static struct platform_device qnap_ts209_nor_flash = {
889dd0b194SLennert Buytenhek .name = "physmap-flash",
899dd0b194SLennert Buytenhek .id = 0,
90e7068ad3SLennert Buytenhek .dev = {
91e7068ad3SLennert Buytenhek .platform_data = &qnap_ts209_nor_flash_data,
92e7068ad3SLennert Buytenhek },
939dd0b194SLennert Buytenhek .resource = &qnap_ts209_nor_flash_resource,
949dd0b194SLennert Buytenhek .num_resources = 1,
959dd0b194SLennert Buytenhek };
969dd0b194SLennert Buytenhek
979dd0b194SLennert Buytenhek /*****************************************************************************
989dd0b194SLennert Buytenhek * PCI
999dd0b194SLennert Buytenhek ****************************************************************************/
1009dd0b194SLennert Buytenhek
1019dd0b194SLennert Buytenhek #define QNAP_TS209_PCI_SLOT0_OFFS 7
1029dd0b194SLennert Buytenhek #define QNAP_TS209_PCI_SLOT0_IRQ_PIN 6
1039dd0b194SLennert Buytenhek #define QNAP_TS209_PCI_SLOT1_IRQ_PIN 7
1049dd0b194SLennert Buytenhek
qnap_ts209_pci_preinit(void)10542366666SAndrew Lunn static void __init qnap_ts209_pci_preinit(void)
1069dd0b194SLennert Buytenhek {
1079dd0b194SLennert Buytenhek int pin;
1089dd0b194SLennert Buytenhek
1099dd0b194SLennert Buytenhek /*
1109dd0b194SLennert Buytenhek * Configure PCI GPIO IRQ pins
1119dd0b194SLennert Buytenhek */
1129dd0b194SLennert Buytenhek pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN;
1139dd0b194SLennert Buytenhek if (gpio_request(pin, "PCI Int1") == 0) {
1149dd0b194SLennert Buytenhek if (gpio_direction_input(pin) == 0) {
1156845664aSThomas Gleixner irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
1169dd0b194SLennert Buytenhek } else {
1179dd0b194SLennert Buytenhek printk(KERN_ERR "qnap_ts209_pci_preinit failed to "
1189dd0b194SLennert Buytenhek "set_irq_type pin %d\n", pin);
1199dd0b194SLennert Buytenhek gpio_free(pin);
1209dd0b194SLennert Buytenhek }
1219dd0b194SLennert Buytenhek } else {
1229dd0b194SLennert Buytenhek printk(KERN_ERR "qnap_ts209_pci_preinit failed to gpio_request "
1239dd0b194SLennert Buytenhek "%d\n", pin);
1249dd0b194SLennert Buytenhek }
1259dd0b194SLennert Buytenhek
1269dd0b194SLennert Buytenhek pin = QNAP_TS209_PCI_SLOT1_IRQ_PIN;
1279dd0b194SLennert Buytenhek if (gpio_request(pin, "PCI Int2") == 0) {
1289dd0b194SLennert Buytenhek if (gpio_direction_input(pin) == 0) {
1296845664aSThomas Gleixner irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
1309dd0b194SLennert Buytenhek } else {
1319dd0b194SLennert Buytenhek printk(KERN_ERR "qnap_ts209_pci_preinit failed "
1329dd0b194SLennert Buytenhek "to set_irq_type pin %d\n", pin);
1339dd0b194SLennert Buytenhek gpio_free(pin);
1349dd0b194SLennert Buytenhek }
1359dd0b194SLennert Buytenhek } else {
1369dd0b194SLennert Buytenhek printk(KERN_ERR "qnap_ts209_pci_preinit failed to gpio_request "
1379dd0b194SLennert Buytenhek "%d\n", pin);
1389dd0b194SLennert Buytenhek }
1399dd0b194SLennert Buytenhek }
1409dd0b194SLennert Buytenhek
qnap_ts209_pci_map_irq(const struct pci_dev * dev,u8 slot,u8 pin)141d5341942SRalf Baechle static int __init qnap_ts209_pci_map_irq(const struct pci_dev *dev, u8 slot,
142d5341942SRalf Baechle u8 pin)
1439dd0b194SLennert Buytenhek {
14492b913b0SLennert Buytenhek int irq;
1459dd0b194SLennert Buytenhek
1469dd0b194SLennert Buytenhek /*
14792b913b0SLennert Buytenhek * Check for devices with hard-wired IRQs.
14892b913b0SLennert Buytenhek */
14992b913b0SLennert Buytenhek irq = orion5x_pci_map_irq(dev, slot, pin);
15092b913b0SLennert Buytenhek if (irq != -1)
15192b913b0SLennert Buytenhek return irq;
15292b913b0SLennert Buytenhek
15392b913b0SLennert Buytenhek /*
15492b913b0SLennert Buytenhek * PCI IRQs are connected via GPIOs.
1559dd0b194SLennert Buytenhek */
1569dd0b194SLennert Buytenhek switch (slot - QNAP_TS209_PCI_SLOT0_OFFS) {
1579dd0b194SLennert Buytenhek case 0:
1589dd0b194SLennert Buytenhek return gpio_to_irq(QNAP_TS209_PCI_SLOT0_IRQ_PIN);
1599dd0b194SLennert Buytenhek case 1:
1609dd0b194SLennert Buytenhek return gpio_to_irq(QNAP_TS209_PCI_SLOT1_IRQ_PIN);
1619dd0b194SLennert Buytenhek default:
1629dd0b194SLennert Buytenhek return -1;
1639dd0b194SLennert Buytenhek }
1649dd0b194SLennert Buytenhek }
1659dd0b194SLennert Buytenhek
1669dd0b194SLennert Buytenhek static struct hw_pci qnap_ts209_pci __initdata = {
1679dd0b194SLennert Buytenhek .nr_controllers = 2,
1689dd0b194SLennert Buytenhek .preinit = qnap_ts209_pci_preinit,
1699dd0b194SLennert Buytenhek .setup = orion5x_pci_sys_setup,
1709dd0b194SLennert Buytenhek .scan = orion5x_pci_sys_scan_bus,
1719dd0b194SLennert Buytenhek .map_irq = qnap_ts209_pci_map_irq,
1729dd0b194SLennert Buytenhek };
1739dd0b194SLennert Buytenhek
qnap_ts209_pci_init(void)1749dd0b194SLennert Buytenhek static int __init qnap_ts209_pci_init(void)
1759dd0b194SLennert Buytenhek {
176d22759edSJon Medhurst (Tixy) if (machine_is_ts209())
1779dd0b194SLennert Buytenhek pci_common_init(&qnap_ts209_pci);
1789dd0b194SLennert Buytenhek
1799dd0b194SLennert Buytenhek return 0;
1809dd0b194SLennert Buytenhek }
1819dd0b194SLennert Buytenhek
1829dd0b194SLennert Buytenhek subsys_initcall(qnap_ts209_pci_init);
1839dd0b194SLennert Buytenhek
1849dd0b194SLennert Buytenhek /*****************************************************************************
1859dd0b194SLennert Buytenhek * RTC S35390A on I2C bus
1869dd0b194SLennert Buytenhek ****************************************************************************/
1879dd0b194SLennert Buytenhek
1889dd0b194SLennert Buytenhek #define TS209_RTC_GPIO 3
1899dd0b194SLennert Buytenhek
1909dd0b194SLennert Buytenhek static struct i2c_board_info __initdata qnap_ts209_i2c_rtc = {
1913760f736SJean Delvare I2C_BOARD_INFO("s35390a", 0x30),
1929dd0b194SLennert Buytenhek .irq = 0,
1939dd0b194SLennert Buytenhek };
1949dd0b194SLennert Buytenhek
1959dd0b194SLennert Buytenhek /****************************************************************************
1969dd0b194SLennert Buytenhek * GPIO Attached Keys
1979dd0b194SLennert Buytenhek * Power button is attached to the PIC microcontroller
1989dd0b194SLennert Buytenhek ****************************************************************************/
1999dd0b194SLennert Buytenhek
2009dd0b194SLennert Buytenhek #define QNAP_TS209_GPIO_KEY_MEDIA 1
2019dd0b194SLennert Buytenhek #define QNAP_TS209_GPIO_KEY_RESET 2
2029dd0b194SLennert Buytenhek
2039dd0b194SLennert Buytenhek static struct gpio_keys_button qnap_ts209_buttons[] = {
2049dd0b194SLennert Buytenhek {
20528ca8c80SMartin Michlmayr .code = KEY_COPY,
2069dd0b194SLennert Buytenhek .gpio = QNAP_TS209_GPIO_KEY_MEDIA,
2079dd0b194SLennert Buytenhek .desc = "USB Copy Button",
2089dd0b194SLennert Buytenhek .active_low = 1,
209e7068ad3SLennert Buytenhek }, {
21028ca8c80SMartin Michlmayr .code = KEY_RESTART,
2119dd0b194SLennert Buytenhek .gpio = QNAP_TS209_GPIO_KEY_RESET,
2129dd0b194SLennert Buytenhek .desc = "Reset Button",
2139dd0b194SLennert Buytenhek .active_low = 1,
214e7068ad3SLennert Buytenhek },
2159dd0b194SLennert Buytenhek };
2169dd0b194SLennert Buytenhek
2179dd0b194SLennert Buytenhek static struct gpio_keys_platform_data qnap_ts209_button_data = {
2189dd0b194SLennert Buytenhek .buttons = qnap_ts209_buttons,
2199dd0b194SLennert Buytenhek .nbuttons = ARRAY_SIZE(qnap_ts209_buttons),
2209dd0b194SLennert Buytenhek };
2219dd0b194SLennert Buytenhek
2229dd0b194SLennert Buytenhek static struct platform_device qnap_ts209_button_device = {
2239dd0b194SLennert Buytenhek .name = "gpio-keys",
2249dd0b194SLennert Buytenhek .id = -1,
2259dd0b194SLennert Buytenhek .num_resources = 0,
226e7068ad3SLennert Buytenhek .dev = {
227e7068ad3SLennert Buytenhek .platform_data = &qnap_ts209_button_data,
228e7068ad3SLennert Buytenhek },
2299dd0b194SLennert Buytenhek };
2309dd0b194SLennert Buytenhek
2319dd0b194SLennert Buytenhek /*****************************************************************************
2329dd0b194SLennert Buytenhek * SATA
2339dd0b194SLennert Buytenhek ****************************************************************************/
2349dd0b194SLennert Buytenhek static struct mv_sata_platform_data qnap_ts209_sata_data = {
2359dd0b194SLennert Buytenhek .n_ports = 2,
2369dd0b194SLennert Buytenhek };
2379dd0b194SLennert Buytenhek
2389dd0b194SLennert Buytenhek /*****************************************************************************
2399dd0b194SLennert Buytenhek
2409dd0b194SLennert Buytenhek * General Setup
2419dd0b194SLennert Buytenhek ****************************************************************************/
242554cdaefSAndrew Lunn static unsigned int ts209_mpp_modes[] __initdata = {
243554cdaefSAndrew Lunn MPP0_UNUSED,
244554cdaefSAndrew Lunn MPP1_GPIO, /* USB copy button */
245554cdaefSAndrew Lunn MPP2_GPIO, /* Load defaults button */
246554cdaefSAndrew Lunn MPP3_GPIO, /* GPIO RTC */
247554cdaefSAndrew Lunn MPP4_UNUSED,
248554cdaefSAndrew Lunn MPP5_UNUSED,
249554cdaefSAndrew Lunn MPP6_GPIO, /* PCI Int A */
250554cdaefSAndrew Lunn MPP7_GPIO, /* PCI Int B */
251554cdaefSAndrew Lunn MPP8_UNUSED,
252554cdaefSAndrew Lunn MPP9_UNUSED,
253554cdaefSAndrew Lunn MPP10_UNUSED,
254554cdaefSAndrew Lunn MPP11_UNUSED,
255554cdaefSAndrew Lunn MPP12_SATA_LED, /* SATA 0 presence */
256554cdaefSAndrew Lunn MPP13_SATA_LED, /* SATA 1 presence */
257554cdaefSAndrew Lunn MPP14_SATA_LED, /* SATA 0 active */
258554cdaefSAndrew Lunn MPP15_SATA_LED, /* SATA 1 active */
259554cdaefSAndrew Lunn MPP16_UART, /* UART1 RXD */
260554cdaefSAndrew Lunn MPP17_UART, /* UART1 TXD */
261554cdaefSAndrew Lunn MPP18_GPIO, /* SW_RST */
262554cdaefSAndrew Lunn MPP19_UNUSED,
263554cdaefSAndrew Lunn 0,
26419cfd5c0SLennert Buytenhek };
26519cfd5c0SLennert Buytenhek
qnap_ts209_init(void)2669dd0b194SLennert Buytenhek static void __init qnap_ts209_init(void)
2679dd0b194SLennert Buytenhek {
2689dd0b194SLennert Buytenhek /*
2699dd0b194SLennert Buytenhek * Setup basic Orion functions. Need to be called early.
2709dd0b194SLennert Buytenhek */
2719dd0b194SLennert Buytenhek orion5x_init();
2729dd0b194SLennert Buytenhek
27319cfd5c0SLennert Buytenhek orion5x_mpp_conf(ts209_mpp_modes);
27419cfd5c0SLennert Buytenhek
2759dd0b194SLennert Buytenhek /*
2769dd0b194SLennert Buytenhek * MPP[20] PCI clock 0
2779dd0b194SLennert Buytenhek * MPP[21] PCI clock 1
2789dd0b194SLennert Buytenhek * MPP[22] USB 0 over current
2799dd0b194SLennert Buytenhek * MPP[23-25] Reserved
2809dd0b194SLennert Buytenhek */
2819dd0b194SLennert Buytenhek
282044f6c7cSLennert Buytenhek /*
283044f6c7cSLennert Buytenhek * Configure peripherals.
284044f6c7cSLennert Buytenhek */
2854ca2c040SThomas Petazzoni mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
2864ca2c040SThomas Petazzoni ORION_MBUS_DEVBUS_BOOT_ATTR,
2874ca2c040SThomas Petazzoni QNAP_TS209_NOR_BOOT_BASE,
28835228e84SMartin Michlmayr QNAP_TS209_NOR_BOOT_SIZE);
28935228e84SMartin Michlmayr platform_device_register(&qnap_ts209_nor_flash);
29035228e84SMartin Michlmayr
291044f6c7cSLennert Buytenhek orion5x_ehci0_init();
292044f6c7cSLennert Buytenhek orion5x_ehci1_init();
293530c854aSSylver Bruneau qnap_tsx09_find_mac_addr(QNAP_TS209_NOR_BOOT_BASE +
294530c854aSSylver Bruneau qnap_ts209_partitions[5].offset,
295530c854aSSylver Bruneau qnap_ts209_partitions[5].size);
296530c854aSSylver Bruneau orion5x_eth_init(&qnap_tsx09_eth_data);
297044f6c7cSLennert Buytenhek orion5x_i2c_init();
298044f6c7cSLennert Buytenhek orion5x_sata_init(&qnap_ts209_sata_data);
299044f6c7cSLennert Buytenhek orion5x_uart0_init();
300e45772b2SMartin Michlmayr orion5x_uart1_init();
3011d5a1a6eSSaeed Bishara orion5x_xor_init();
3029dd0b194SLennert Buytenhek
303044f6c7cSLennert Buytenhek platform_device_register(&qnap_ts209_button_device);
3049dd0b194SLennert Buytenhek
3059dd0b194SLennert Buytenhek /* Get RTC IRQ and register the chip */
3069dd0b194SLennert Buytenhek if (gpio_request(TS209_RTC_GPIO, "rtc") == 0) {
3079dd0b194SLennert Buytenhek if (gpio_direction_input(TS209_RTC_GPIO) == 0)
3089dd0b194SLennert Buytenhek qnap_ts209_i2c_rtc.irq = gpio_to_irq(TS209_RTC_GPIO);
3099dd0b194SLennert Buytenhek else
3109dd0b194SLennert Buytenhek gpio_free(TS209_RTC_GPIO);
3119dd0b194SLennert Buytenhek }
3129dd0b194SLennert Buytenhek if (qnap_ts209_i2c_rtc.irq == 0)
3139d06d34bSJoe Perches pr_warn("qnap_ts209_init: failed to get RTC IRQ\n");
3149dd0b194SLennert Buytenhek i2c_register_board_info(0, &qnap_ts209_i2c_rtc, 1);
3159dd0b194SLennert Buytenhek
316530c854aSSylver Bruneau /* register tsx09 specific power-off method */
317530c854aSSylver Bruneau pm_power_off = qnap_tsx09_power_off;
3189dd0b194SLennert Buytenhek }
3199dd0b194SLennert Buytenhek
3209dd0b194SLennert Buytenhek MACHINE_START(TS209, "QNAP TS-109/TS-209")
3219dd0b194SLennert Buytenhek /* Maintainer: Byron Bradley <byron.bbradley@gmail.com> */
32265aa1b1eSNicolas Pitre .atag_offset = 0x100,
3235cdbe5d2SArnd Bergmann .nr_irqs = ORION5X_NR_IRQS,
3249dd0b194SLennert Buytenhek .init_machine = qnap_ts209_init,
3259dd0b194SLennert Buytenhek .map_io = orion5x_map_io,
3264ee1f6b5SLennert Buytenhek .init_early = orion5x_init_early,
3279dd0b194SLennert Buytenhek .init_irq = orion5x_init_irq,
3286bb27d73SStephen Warren .init_time = orion5x_timer_init,
3299dd0b194SLennert Buytenhek .fixup = tag_fixup_mem32,
330764cbcc2SRussell King .restart = orion5x_restart,
3319dd0b194SLennert Buytenhek MACHINE_END
332