1d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2c0718df4SPaul Walmsley /* 3c0718df4SPaul Walmsley * OMAP3/4 Voltage Controller (VC) structure and macro definitions 4c0718df4SPaul Walmsley * 5c0718df4SPaul Walmsley * Copyright (C) 2007, 2010 Texas Instruments, Inc. 6c0718df4SPaul Walmsley * Rajendra Nayak <rnayak@ti.com> 7c0718df4SPaul Walmsley * Lesly A M <x0080970@ti.com> 8c0718df4SPaul Walmsley * Thara Gopinath <thara@ti.com> 9c0718df4SPaul Walmsley * 10c0718df4SPaul Walmsley * Copyright (C) 2008, 2011 Nokia Corporation 11c0718df4SPaul Walmsley * Kalle Jokiniemi 12c0718df4SPaul Walmsley * Paul Walmsley 13c0718df4SPaul Walmsley */ 14c0718df4SPaul Walmsley #ifndef __ARCH_ARM_MACH_OMAP2_VC_H 15c0718df4SPaul Walmsley #define __ARCH_ARM_MACH_OMAP2_VC_H 16c0718df4SPaul Walmsley 17c0718df4SPaul Walmsley #include <linux/kernel.h> 18c0718df4SPaul Walmsley 19ccd5ca77SKevin Hilman struct voltagedomain; 20ccd5ca77SKevin Hilman 21c0718df4SPaul Walmsley /** 22d84adcf4SKevin Hilman * struct omap_vc_common - per-VC register/bitfield data 23c0718df4SPaul Walmsley * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register 24c0718df4SPaul Walmsley * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register 25c0718df4SPaul Walmsley * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start 26c0718df4SPaul Walmsley * @data_shift: DATA field shift in PRM_VC_BYPASS_VAL register 27c0718df4SPaul Walmsley * @slaveaddr_shift: SLAVEADDR field shift in PRM_VC_BYPASS_VAL register 28c0718df4SPaul Walmsley * @regaddr_shift: REGADDR field shift in PRM_VC_BYPASS_VAL register 29c0718df4SPaul Walmsley * @cmd_on_shift: ON field shift in PRM_VC_CMD_VAL_* register 30c0718df4SPaul Walmsley * @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register 31c0718df4SPaul Walmsley * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register 32c0718df4SPaul Walmsley * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register 33f5395480SKevin Hilman * @i2c_cfg_reg: I2C configuration register offset 34102bcb6eSTony Lindgren * @i2c_cfg_clear_mask: high-speed mode bit clear mask in I2C config register 35f5395480SKevin Hilman * @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register 36f5395480SKevin Hilman * @i2c_mcode_mask: MCODE field mask for I2C config register 37c0718df4SPaul Walmsley * 38c0718df4SPaul Walmsley * XXX One of cmd_on_mask and cmd_on_shift are not needed 39c0718df4SPaul Walmsley * XXX VALID should probably be a shift, not a mask 40c0718df4SPaul Walmsley */ 41d84adcf4SKevin Hilman struct omap_vc_common { 42c0718df4SPaul Walmsley u32 cmd_on_mask; 43c0718df4SPaul Walmsley u32 valid; 44c0718df4SPaul Walmsley u8 bypass_val_reg; 45c0718df4SPaul Walmsley u8 data_shift; 46c0718df4SPaul Walmsley u8 slaveaddr_shift; 47c0718df4SPaul Walmsley u8 regaddr_shift; 48c0718df4SPaul Walmsley u8 cmd_on_shift; 49c0718df4SPaul Walmsley u8 cmd_onlp_shift; 50c0718df4SPaul Walmsley u8 cmd_ret_shift; 51c0718df4SPaul Walmsley u8 cmd_off_shift; 52f5395480SKevin Hilman u8 i2c_cfg_reg; 53102bcb6eSTony Lindgren u8 i2c_cfg_clear_mask; 54f5395480SKevin Hilman u8 i2c_cfg_hsen_mask; 55f5395480SKevin Hilman u8 i2c_mcode_mask; 56c0718df4SPaul Walmsley }; 57c0718df4SPaul Walmsley 5824d3194aSKevin Hilman /* omap_vc_channel.flags values */ 5924d3194aSKevin Hilman #define OMAP_VC_CHANNEL_DEFAULT BIT(0) 608abc0b58SKevin Hilman #define OMAP_VC_CHANNEL_CFG_MUTANT BIT(1) 6124d3194aSKevin Hilman 62c0718df4SPaul Walmsley /** 63d84adcf4SKevin Hilman * struct omap_vc_channel - VC per-instance data 64ba112a4eSKevin Hilman * @i2c_slave_addr: I2C slave address of PMIC for this VC channel 65e4e021c5SKevin Hilman * @volt_reg_addr: voltage configuration register address 66e4e021c5SKevin Hilman * @cmd_reg_addr: command configuration register address 675892bb1fSKevin Hilman * @setup_time: setup time (in sys_clk cycles) of regulator for this channel 68ce8ebe0dSKevin Hilman * @cfg_channel: current value of VC channel configuration register 69f5395480SKevin Hilman * @i2c_high_speed: whether or not to use I2C high-speed mode 70ce8ebe0dSKevin Hilman * 71d84adcf4SKevin Hilman * @common: pointer to VC common data for this platform 72ba112a4eSKevin Hilman * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register 73c0718df4SPaul Walmsley * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register 74e4e021c5SKevin Hilman * @smps_cmdra_mask: CMDRA* bitmask in the PRM_VC_CMD_RA register 75e4e021c5SKevin Hilman * @cmdval_reg: register for on/ret/off voltage level values for this channel 765876c940SKevin Hilman * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start 775876c940SKevin Hilman * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start 785876c940SKevin Hilman * @smps_cmdra_reg: Offset of PRM_VC_SMPS_CMD_RA reg from PRM start 795876c940SKevin Hilman * @cfg_channel_reg: VC channel configuration register 80ce8ebe0dSKevin Hilman * @cfg_channel_sa_shift: bit shift for slave address cfg_channel register 8124d3194aSKevin Hilman * @flags: VC channel-specific flags (optional) 82c0718df4SPaul Walmsley */ 83d84adcf4SKevin Hilman struct omap_vc_channel { 84ba112a4eSKevin Hilman /* channel state */ 85ba112a4eSKevin Hilman u16 i2c_slave_addr; 86e4e021c5SKevin Hilman u16 volt_reg_addr; 87e4e021c5SKevin Hilman u16 cmd_reg_addr; 8824d3194aSKevin Hilman u8 cfg_channel; 89f5395480SKevin Hilman bool i2c_high_speed; 90ba112a4eSKevin Hilman 91ba112a4eSKevin Hilman /* register access data */ 92d84adcf4SKevin Hilman const struct omap_vc_common *common; 93c0718df4SPaul Walmsley u32 smps_sa_mask; 94c0718df4SPaul Walmsley u32 smps_volra_mask; 95e4e021c5SKevin Hilman u32 smps_cmdra_mask; 96c0718df4SPaul Walmsley u8 cmdval_reg; 975876c940SKevin Hilman u8 smps_sa_reg; 985876c940SKevin Hilman u8 smps_volra_reg; 995876c940SKevin Hilman u8 smps_cmdra_reg; 1005876c940SKevin Hilman u8 cfg_channel_reg; 10124d3194aSKevin Hilman u8 cfg_channel_sa_shift; 10224d3194aSKevin Hilman u8 flags; 103c0718df4SPaul Walmsley }; 104c0718df4SPaul Walmsley 105d84adcf4SKevin Hilman extern struct omap_vc_channel omap3_vc_mpu; 106d84adcf4SKevin Hilman extern struct omap_vc_channel omap3_vc_core; 107c0718df4SPaul Walmsley 108d84adcf4SKevin Hilman extern struct omap_vc_channel omap4_vc_mpu; 109d84adcf4SKevin Hilman extern struct omap_vc_channel omap4_vc_iva; 110d84adcf4SKevin Hilman extern struct omap_vc_channel omap4_vc_core; 111c0718df4SPaul Walmsley 1128b5d8c0dSTero Kristo extern struct omap_vc_param omap3_mpu_vc_data; 1138b5d8c0dSTero Kristo extern struct omap_vc_param omap3_core_vc_data; 1148b5d8c0dSTero Kristo 1158b5d8c0dSTero Kristo extern struct omap_vc_param omap4_mpu_vc_data; 1168b5d8c0dSTero Kristo extern struct omap_vc_param omap4_iva_vc_data; 1178b5d8c0dSTero Kristo extern struct omap_vc_param omap4_core_vc_data; 1188b5d8c0dSTero Kristo 1193b8c4ebbSTony Lindgren void omap3_vc_set_pmic_signaling(int core_next_state); 120*71065d3fSTony Lindgren void omap4_vc_set_pmic_signaling(int core_next_state); 1213b8c4ebbSTony Lindgren 122ccd5ca77SKevin Hilman void omap_vc_init_channel(struct voltagedomain *voltdm); 123ccd5ca77SKevin Hilman int omap_vc_pre_scale(struct voltagedomain *voltdm, 124ccd5ca77SKevin Hilman unsigned long target_volt, 125ccd5ca77SKevin Hilman u8 *target_vsel, u8 *current_vsel); 126ccd5ca77SKevin Hilman void omap_vc_post_scale(struct voltagedomain *voltdm, 127ccd5ca77SKevin Hilman unsigned long target_volt, 128ccd5ca77SKevin Hilman u8 target_vsel, u8 current_vsel); 129d84adcf4SKevin Hilman int omap_vc_bypass_scale(struct voltagedomain *voltdm, 130ccd5ca77SKevin Hilman unsigned long target_volt); 131ccd5ca77SKevin Hilman 132c0718df4SPaul Walmsley #endif 133c0718df4SPaul Walmsley 134