1*cf21405fSPaul Walmsley /* 2*cf21405fSPaul Walmsley * OMAP2/3 PRM module functions 3*cf21405fSPaul Walmsley * 4*cf21405fSPaul Walmsley * Copyright (C) 2010 Texas Instruments, Inc. 5*cf21405fSPaul Walmsley * Copyright (C) 2010 Nokia Corporation 6*cf21405fSPaul Walmsley * Benoît Cousson 7*cf21405fSPaul Walmsley * Paul Walmsley 8*cf21405fSPaul Walmsley * 9*cf21405fSPaul Walmsley * This program is free software; you can redistribute it and/or modify 10*cf21405fSPaul Walmsley * it under the terms of the GNU General Public License version 2 as 11*cf21405fSPaul Walmsley * published by the Free Software Foundation. 12*cf21405fSPaul Walmsley */ 13*cf21405fSPaul Walmsley 14*cf21405fSPaul Walmsley #include <linux/kernel.h> 15*cf21405fSPaul Walmsley #include <linux/delay.h> 16*cf21405fSPaul Walmsley #include <linux/errno.h> 17*cf21405fSPaul Walmsley #include <linux/err.h> 18*cf21405fSPaul Walmsley 19*cf21405fSPaul Walmsley #include <plat/common.h> 20*cf21405fSPaul Walmsley #include <plat/cpu.h> 21*cf21405fSPaul Walmsley #include <plat/prcm.h> 22*cf21405fSPaul Walmsley 23*cf21405fSPaul Walmsley #include "prm.h" 24*cf21405fSPaul Walmsley #include "prm-regbits-24xx.h" 25*cf21405fSPaul Walmsley #include "prm-regbits-34xx.h" 26*cf21405fSPaul Walmsley 27*cf21405fSPaul Walmsley /** 28*cf21405fSPaul Walmsley * omap2_prm_is_hardreset_asserted - read the HW reset line state of 29*cf21405fSPaul Walmsley * submodules contained in the hwmod module 30*cf21405fSPaul Walmsley * @prm_mod: PRM submodule base (e.g. CORE_MOD) 31*cf21405fSPaul Walmsley * @shift: register bit shift corresponding to the reset line to check 32*cf21405fSPaul Walmsley * 33*cf21405fSPaul Walmsley * Returns 1 if the (sub)module hardreset line is currently asserted, 34*cf21405fSPaul Walmsley * 0 if the (sub)module hardreset line is not currently asserted, or 35*cf21405fSPaul Walmsley * -EINVAL if called while running on a non-OMAP2/3 chip. 36*cf21405fSPaul Walmsley */ 37*cf21405fSPaul Walmsley int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift) 38*cf21405fSPaul Walmsley { 39*cf21405fSPaul Walmsley if (!(cpu_is_omap24xx() || cpu_is_omap34xx())) 40*cf21405fSPaul Walmsley return -EINVAL; 41*cf21405fSPaul Walmsley 42*cf21405fSPaul Walmsley return prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, 43*cf21405fSPaul Walmsley (1 << shift)); 44*cf21405fSPaul Walmsley } 45*cf21405fSPaul Walmsley 46*cf21405fSPaul Walmsley /** 47*cf21405fSPaul Walmsley * omap2_prm_assert_hardreset - assert the HW reset line of a submodule 48*cf21405fSPaul Walmsley * @prm_mod: PRM submodule base (e.g. CORE_MOD) 49*cf21405fSPaul Walmsley * @shift: register bit shift corresponding to the reset line to assert 50*cf21405fSPaul Walmsley * 51*cf21405fSPaul Walmsley * Some IPs like dsp or iva contain processors that require an HW 52*cf21405fSPaul Walmsley * reset line to be asserted / deasserted in order to fully enable the 53*cf21405fSPaul Walmsley * IP. These modules may have multiple hard-reset lines that reset 54*cf21405fSPaul Walmsley * different 'submodules' inside the IP block. This function will 55*cf21405fSPaul Walmsley * place the submodule into reset. Returns 0 upon success or -EINVAL 56*cf21405fSPaul Walmsley * upon an argument error. 57*cf21405fSPaul Walmsley */ 58*cf21405fSPaul Walmsley int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift) 59*cf21405fSPaul Walmsley { 60*cf21405fSPaul Walmsley u32 mask; 61*cf21405fSPaul Walmsley 62*cf21405fSPaul Walmsley if (!(cpu_is_omap24xx() || cpu_is_omap34xx())) 63*cf21405fSPaul Walmsley return -EINVAL; 64*cf21405fSPaul Walmsley 65*cf21405fSPaul Walmsley mask = 1 << shift; 66*cf21405fSPaul Walmsley prm_rmw_mod_reg_bits(mask, mask, prm_mod, OMAP2_RM_RSTCTRL); 67*cf21405fSPaul Walmsley 68*cf21405fSPaul Walmsley return 0; 69*cf21405fSPaul Walmsley } 70*cf21405fSPaul Walmsley 71*cf21405fSPaul Walmsley /** 72*cf21405fSPaul Walmsley * omap2_prm_deassert_hardreset - deassert a submodule hardreset line and wait 73*cf21405fSPaul Walmsley * @prm_mod: PRM submodule base (e.g. CORE_MOD) 74*cf21405fSPaul Walmsley * @shift: register bit shift corresponding to the reset line to deassert 75*cf21405fSPaul Walmsley * 76*cf21405fSPaul Walmsley * Some IPs like dsp or iva contain processors that require an HW 77*cf21405fSPaul Walmsley * reset line to be asserted / deasserted in order to fully enable the 78*cf21405fSPaul Walmsley * IP. These modules may have multiple hard-reset lines that reset 79*cf21405fSPaul Walmsley * different 'submodules' inside the IP block. This function will 80*cf21405fSPaul Walmsley * take the submodule out of reset and wait until the PRCM indicates 81*cf21405fSPaul Walmsley * that the reset has completed before returning. Returns 0 upon success or 82*cf21405fSPaul Walmsley * -EINVAL upon an argument error, -EEXIST if the submodule was already out 83*cf21405fSPaul Walmsley * of reset, or -EBUSY if the submodule did not exit reset promptly. 84*cf21405fSPaul Walmsley */ 85*cf21405fSPaul Walmsley int omap2_prm_deassert_hardreset(s16 prm_mod, u8 shift) 86*cf21405fSPaul Walmsley { 87*cf21405fSPaul Walmsley u32 mask; 88*cf21405fSPaul Walmsley int c; 89*cf21405fSPaul Walmsley 90*cf21405fSPaul Walmsley if (!(cpu_is_omap24xx() || cpu_is_omap34xx())) 91*cf21405fSPaul Walmsley return -EINVAL; 92*cf21405fSPaul Walmsley 93*cf21405fSPaul Walmsley mask = 1 << shift; 94*cf21405fSPaul Walmsley 95*cf21405fSPaul Walmsley /* Check the current status to avoid de-asserting the line twice */ 96*cf21405fSPaul Walmsley if (prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, mask) == 0) 97*cf21405fSPaul Walmsley return -EEXIST; 98*cf21405fSPaul Walmsley 99*cf21405fSPaul Walmsley /* Clear the reset status by writing 1 to the status bit */ 100*cf21405fSPaul Walmsley prm_rmw_mod_reg_bits(0xffffffff, mask, prm_mod, OMAP2_RM_RSTST); 101*cf21405fSPaul Walmsley /* de-assert the reset control line */ 102*cf21405fSPaul Walmsley prm_rmw_mod_reg_bits(mask, 0, prm_mod, OMAP2_RM_RSTCTRL); 103*cf21405fSPaul Walmsley /* wait the status to be set */ 104*cf21405fSPaul Walmsley omap_test_timeout(prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTST, 105*cf21405fSPaul Walmsley mask), 106*cf21405fSPaul Walmsley MAX_MODULE_HARDRESET_WAIT, c); 107*cf21405fSPaul Walmsley 108*cf21405fSPaul Walmsley return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; 109*cf21405fSPaul Walmsley } 110*cf21405fSPaul Walmsley 111