1*d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2eadc62fcSAmbresh K /*
3eadc62fcSAmbresh K * AM43xx Power domains framework
4eadc62fcSAmbresh K *
5eadc62fcSAmbresh K * Copyright (C) 2013 Texas Instruments, Inc.
6eadc62fcSAmbresh K */
7eadc62fcSAmbresh K
8eadc62fcSAmbresh K #include <linux/kernel.h>
9eadc62fcSAmbresh K #include <linux/init.h>
10eadc62fcSAmbresh K
11eadc62fcSAmbresh K #include "powerdomain.h"
12eadc62fcSAmbresh K
13eadc62fcSAmbresh K #include "prcm-common.h"
14eadc62fcSAmbresh K #include "prcm44xx.h"
15eadc62fcSAmbresh K #include "prcm43xx.h"
16eadc62fcSAmbresh K
17eadc62fcSAmbresh K static struct powerdomain gfx_43xx_pwrdm = {
18eadc62fcSAmbresh K .name = "gfx_pwrdm",
19eadc62fcSAmbresh K .voltdm = { .name = "core" },
20eadc62fcSAmbresh K .prcm_offs = AM43XX_PRM_GFX_INST,
21eadc62fcSAmbresh K .prcm_partition = AM43XX_PRM_PARTITION,
22eadc62fcSAmbresh K .pwrsts = PWRSTS_OFF_ON,
23eadc62fcSAmbresh K .banks = 1,
24eadc62fcSAmbresh K .pwrsts_mem_on = {
25eadc62fcSAmbresh K [0] = PWRSTS_ON, /* gfx_mem */
26eadc62fcSAmbresh K },
27eadc62fcSAmbresh K .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
28eadc62fcSAmbresh K };
29eadc62fcSAmbresh K
30eadc62fcSAmbresh K static struct powerdomain mpu_43xx_pwrdm = {
31eadc62fcSAmbresh K .name = "mpu_pwrdm",
32eadc62fcSAmbresh K .voltdm = { .name = "mpu" },
33eadc62fcSAmbresh K .prcm_offs = AM43XX_PRM_MPU_INST,
34eadc62fcSAmbresh K .prcm_partition = AM43XX_PRM_PARTITION,
35eadc62fcSAmbresh K .pwrsts = PWRSTS_OFF_RET_ON,
36eadc62fcSAmbresh K .pwrsts_logic_ret = PWRSTS_OFF_RET,
37eadc62fcSAmbresh K .banks = 3,
38eadc62fcSAmbresh K .pwrsts_mem_ret = {
39eadc62fcSAmbresh K [0] = PWRSTS_OFF_RET, /* mpu_l1 */
40eadc62fcSAmbresh K [1] = PWRSTS_OFF_RET, /* mpu_l2 */
41eadc62fcSAmbresh K [2] = PWRSTS_OFF_RET, /* mpu_ram */
42eadc62fcSAmbresh K },
43eadc62fcSAmbresh K .pwrsts_mem_on = {
44eadc62fcSAmbresh K [0] = PWRSTS_ON, /* mpu_l1 */
45eadc62fcSAmbresh K [1] = PWRSTS_ON, /* mpu_l2 */
46eadc62fcSAmbresh K [2] = PWRSTS_ON, /* mpu_ram */
47eadc62fcSAmbresh K },
48eadc62fcSAmbresh K .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
49eadc62fcSAmbresh K };
50eadc62fcSAmbresh K
51eadc62fcSAmbresh K static struct powerdomain rtc_43xx_pwrdm = {
52eadc62fcSAmbresh K .name = "rtc_pwrdm",
53eadc62fcSAmbresh K .voltdm = { .name = "rtc" },
54eadc62fcSAmbresh K .prcm_offs = AM43XX_PRM_RTC_INST,
55eadc62fcSAmbresh K .prcm_partition = AM43XX_PRM_PARTITION,
56eadc62fcSAmbresh K .pwrsts = PWRSTS_ON,
57eadc62fcSAmbresh K };
58eadc62fcSAmbresh K
59eadc62fcSAmbresh K static struct powerdomain wkup_43xx_pwrdm = {
60eadc62fcSAmbresh K .name = "wkup_pwrdm",
61eadc62fcSAmbresh K .voltdm = { .name = "core" },
62eadc62fcSAmbresh K .prcm_offs = AM43XX_PRM_WKUP_INST,
63eadc62fcSAmbresh K .prcm_partition = AM43XX_PRM_PARTITION,
64eadc62fcSAmbresh K .pwrsts = PWRSTS_ON,
65eadc62fcSAmbresh K .banks = 1,
66eadc62fcSAmbresh K .pwrsts_mem_on = {
67eadc62fcSAmbresh K [0] = PWRSTS_ON, /* debugss_mem */
68eadc62fcSAmbresh K },
69eadc62fcSAmbresh K };
70eadc62fcSAmbresh K
71eadc62fcSAmbresh K static struct powerdomain tamper_43xx_pwrdm = {
72eadc62fcSAmbresh K .name = "tamper_pwrdm",
73eadc62fcSAmbresh K .voltdm = { .name = "tamper" },
74eadc62fcSAmbresh K .prcm_offs = AM43XX_PRM_TAMPER_INST,
75eadc62fcSAmbresh K .prcm_partition = AM43XX_PRM_PARTITION,
76eadc62fcSAmbresh K .pwrsts = PWRSTS_ON,
77eadc62fcSAmbresh K };
78eadc62fcSAmbresh K
79eadc62fcSAmbresh K static struct powerdomain cefuse_43xx_pwrdm = {
80eadc62fcSAmbresh K .name = "cefuse_pwrdm",
81eadc62fcSAmbresh K .voltdm = { .name = "core" },
82eadc62fcSAmbresh K .prcm_offs = AM43XX_PRM_CEFUSE_INST,
83eadc62fcSAmbresh K .prcm_partition = AM43XX_PRM_PARTITION,
84eadc62fcSAmbresh K .pwrsts = PWRSTS_OFF_ON,
85eadc62fcSAmbresh K .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
86eadc62fcSAmbresh K };
87eadc62fcSAmbresh K
88eadc62fcSAmbresh K static struct powerdomain per_43xx_pwrdm = {
89eadc62fcSAmbresh K .name = "per_pwrdm",
90eadc62fcSAmbresh K .voltdm = { .name = "core" },
91eadc62fcSAmbresh K .prcm_offs = AM43XX_PRM_PER_INST,
92eadc62fcSAmbresh K .prcm_partition = AM43XX_PRM_PARTITION,
93eadc62fcSAmbresh K .pwrsts = PWRSTS_OFF_RET_ON,
94eadc62fcSAmbresh K .pwrsts_logic_ret = PWRSTS_OFF_RET,
95eadc62fcSAmbresh K .banks = 4,
96eadc62fcSAmbresh K .pwrsts_mem_ret = {
97eadc62fcSAmbresh K [0] = PWRSTS_OFF_RET, /* icss_mem */
98eadc62fcSAmbresh K [1] = PWRSTS_OFF_RET, /* per_mem */
99eadc62fcSAmbresh K [2] = PWRSTS_OFF_RET, /* ram1_mem */
100eadc62fcSAmbresh K [3] = PWRSTS_OFF_RET, /* ram2_mem */
101eadc62fcSAmbresh K },
102eadc62fcSAmbresh K .pwrsts_mem_on = {
103eadc62fcSAmbresh K [0] = PWRSTS_ON, /* icss_mem */
104eadc62fcSAmbresh K [1] = PWRSTS_ON, /* per_mem */
105eadc62fcSAmbresh K [2] = PWRSTS_ON, /* ram1_mem */
106eadc62fcSAmbresh K [3] = PWRSTS_ON, /* ram2_mem */
107eadc62fcSAmbresh K },
108eadc62fcSAmbresh K .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
109eadc62fcSAmbresh K };
110eadc62fcSAmbresh K
111eadc62fcSAmbresh K static struct powerdomain *powerdomains_am43xx[] __initdata = {
112eadc62fcSAmbresh K &gfx_43xx_pwrdm,
113eadc62fcSAmbresh K &mpu_43xx_pwrdm,
114eadc62fcSAmbresh K &rtc_43xx_pwrdm,
115eadc62fcSAmbresh K &wkup_43xx_pwrdm,
116eadc62fcSAmbresh K &tamper_43xx_pwrdm,
117eadc62fcSAmbresh K &cefuse_43xx_pwrdm,
118eadc62fcSAmbresh K &per_43xx_pwrdm,
119eadc62fcSAmbresh K NULL
120eadc62fcSAmbresh K };
121eadc62fcSAmbresh K
am43xx_check_vcvp(void)122eadc62fcSAmbresh K static int am43xx_check_vcvp(void)
123eadc62fcSAmbresh K {
124eadc62fcSAmbresh K return 0;
125eadc62fcSAmbresh K }
126eadc62fcSAmbresh K
am43xx_powerdomains_init(void)127eadc62fcSAmbresh K void __init am43xx_powerdomains_init(void)
128eadc62fcSAmbresh K {
129eadc62fcSAmbresh K omap4_pwrdm_operations.pwrdm_has_voltdm = am43xx_check_vcvp;
130eadc62fcSAmbresh K pwrdm_register_platform_funcs(&omap4_pwrdm_operations);
131eadc62fcSAmbresh K pwrdm_register_pwrdms(powerdomains_am43xx);
132eadc62fcSAmbresh K pwrdm_complete_init();
133eadc62fcSAmbresh K }
134